Redo the previous:
GC all of the backward branch code (which wasn't used). Separate the a.out stuff into a separate .h file. Some other random cleanup. Leave the arm_preserved_register() hack for now.
This commit is contained in:
mycroft
parent
76f0e60111
commit
2ea86fa2ea
File diff suppressed because it is too large
Load Diff
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@ -794,7 +794,8 @@ extern int arm_preserved_register(int n);
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int volatile_func = arm_volatile_func (); \
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int volatile_func = arm_volatile_func (); \
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if ((FROM) == ARG_POINTER_REGNUM && (TO) == HARD_FRAME_POINTER_REGNUM)\
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if ((FROM) == ARG_POINTER_REGNUM && (TO) == HARD_FRAME_POINTER_REGNUM)\
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(OFFSET) = 0; \
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(OFFSET) = 0; \
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else if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM)\
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else if ((FROM) == FRAME_POINTER_REGNUM \
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&& (TO) == STACK_POINTER_REGNUM) \
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(OFFSET) = (get_frame_size () + 3 & ~3); \
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(OFFSET) = (get_frame_size () + 3 & ~3); \
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else \
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else \
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{ \
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{ \
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@ -817,7 +818,8 @@ extern int arm_preserved_register(int n);
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{ \
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{ \
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if (! frame_pointer_needed) \
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if (! frame_pointer_needed) \
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offset -= 16; \
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offset -= 16; \
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if (! volatile_func && (regs_ever_live[14] || saved_hard_reg)) \
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if (! volatile_func \
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&& (regs_ever_live[14] || saved_hard_reg)) \
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offset += 4; \
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offset += 4; \
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(OFFSET) = (get_frame_size () + 3 & ~3) + offset; \
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(OFFSET) = (get_frame_size () + 3 & ~3) + offset; \
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} \
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} \
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@ -1167,7 +1169,7 @@ extern struct rtx_def *legitimize_pic_address ();
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if (xop0 != XEXP (X, 0) || xop1 != XEXP (X, 1)) \
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if (xop0 != XEXP (X, 0) || xop1 != XEXP (X, 1)) \
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(X) = gen_rtx (MINUS, SImode, xop0, xop1); \
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(X) = gen_rtx (MINUS, SImode, xop0, xop1); \
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} \
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} \
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if (flag_pic) \
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if (flag_pic) \
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(X) = legitimize_pic_address (OLDX, MODE, NULL_RTX); \
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(X) = legitimize_pic_address (OLDX, MODE, NULL_RTX); \
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if (memory_address_p (MODE, X)) \
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if (memory_address_p (MODE, X)) \
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goto WIN; \
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goto WIN; \
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@ -1389,149 +1391,24 @@ extern int arm_compare_fp;
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/* Assembler output control */
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/* Assembler output control */
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#ifndef ARM_OS_NAME
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#define ARM_OS_NAME "(generic)"
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#endif
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/* The text to go at the start of the assembler file */
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#define ASM_FILE_START(STREAM) \
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{ \
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extern char *version_string; \
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fprintf (STREAM,"%s Generated by gcc %s for ARM/%s\n", \
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ASM_COMMENT_START, version_string, ARM_OS_NAME); \
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fprintf (STREAM,"%srfp\t.req\t%sr9\n", REGISTER_PREFIX, REGISTER_PREFIX); \
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fprintf (STREAM,"%ssl\t.req\t%sr10\n", REGISTER_PREFIX, REGISTER_PREFIX); \
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fprintf (STREAM,"%sfp\t.req\t%sr11\n", REGISTER_PREFIX, REGISTER_PREFIX); \
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fprintf (STREAM,"%sip\t.req\t%sr12\n", REGISTER_PREFIX, REGISTER_PREFIX); \
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fprintf (STREAM,"%ssp\t.req\t%sr13\n", REGISTER_PREFIX, REGISTER_PREFIX); \
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fprintf (STREAM,"%slr\t.req\t%sr14\n", REGISTER_PREFIX, REGISTER_PREFIX); \
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fprintf (STREAM,"%spc\t.req\t%sr15\n", REGISTER_PREFIX, REGISTER_PREFIX); \
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}
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#define ASM_APP_ON ""
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#define ASM_APP_OFF ""
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/* Switch to the text or data segment. */
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#define TEXT_SECTION_ASM_OP ".text"
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#define DATA_SECTION_ASM_OP ".data"
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#define REGISTER_PREFIX ""
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#define USER_LABEL_PREFIX "_"
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#define LOCAL_LABEL_PREFIX ""
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/* The assembler's names for the registers. */
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#ifndef REGISTER_NAMES
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#define REGISTER_NAMES \
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{ \
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
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"r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc", \
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"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
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"cc", "sfp", "afp" \
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}
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#endif
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#ifndef ADDITIONAL_REGISTER_NAMES
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#define ADDITIONAL_REGISTER_NAMES \
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{ \
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{"a1", 0}, \
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{"a2", 1}, \
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{"a3", 2}, \
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{"a4", 3}, \
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{"v1", 4}, \
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{"v2", 5}, \
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{"v3", 6}, \
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{"v4", 7}, \
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{"v5", 8}, \
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{"v6", 9}, \
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{"rfp", 9}, /* Gcc used to call it this */ \
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{"sb", 9}, \
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{"v7", 10}, \
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{"r10", 10}, \
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{"r11", 11}, /* fp */ \
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{"r12", 12}, /* ip */ \
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{"r13", 13}, /* sp */ \
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{"r14", 14}, /* lr */ \
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{"r15", 15} /* pc */ \
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}
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#endif
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/* Arm Assembler barfs on dollars */
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#define DOLLARS_IN_IDENTIFIERS 0
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#define NO_DOLLAR_IN_LABEL
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/* DBX register number for a given compiler register number */
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#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
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/* Generate DBX debugging information. riscix.h will undefine this because
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the native assembler does not support stabs. */
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#define DBX_DEBUGGING_INFO 1
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/* Acorn dbx moans about continuation chars, so don't use any. */
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#ifndef DBX_CONTIN_LENGTH
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#define DBX_CONTIN_LENGTH 0
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#endif
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/* Output a source filename for the debugger. RISCiX dbx insists that the
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``desc'' field is set to compiler version number >= 315 (sic). */
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#define DBX_OUTPUT_MAIN_SOURCE_FILENAME(STREAM,NAME) \
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do { \
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fprintf (STREAM, ".stabs \"%s\",%d,0,315,%s\n", (NAME), N_SO, \
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<ext_label_name[1]); \
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text_section (); \
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ASM_OUTPUT_INTERNAL_LABEL (STREAM, "Ltext", 0); \
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} while (0)
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/* Output a label definition. */
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#define ASM_OUTPUT_LABEL(STREAM,NAME) \
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arm_asm_output_label ((STREAM), (NAME))
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/* Output a function label definition. */
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#define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL) \
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ASM_OUTPUT_LABEL(STREAM, NAME)
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/* Output a globalising directive for a label. */
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#define ASM_GLOBALIZE_LABEL(STREAM,NAME) \
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(fprintf (STREAM, "\t.global\t"), \
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assemble_name (STREAM, NAME), \
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fputc ('\n',STREAM)) \
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/* Output a reference to a label. */
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#define ASM_OUTPUT_LABELREF(STREAM,NAME) \
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fprintf (STREAM, "%s%s", USER_LABEL_PREFIX, NAME)
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/* Make an internal label into a string. */
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#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
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sprintf (STRING, "*%s%d", PREFIX, NUM)
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/* Output an internal label definition. */
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/* Output an internal label definition. */
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#define ASM_OUTPUT_INTERNAL_LABEL(STREAM, PREFIX, NUM) \
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#define ASM_OUTPUT_INTERNAL_LABEL(STREAM, PREFIX, NUM) \
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do \
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do \
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{ \
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{ \
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char *s = (char *) alloca (11 + strlen (PREFIX)); \
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char *s = (char *) alloca (40 + strlen (PREFIX)); \
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extern int arm_target_label, arm_ccfsm_state; \
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extern int arm_target_label, arm_ccfsm_state; \
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extern rtx arm_target_insn; \
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extern rtx arm_target_insn; \
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\
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\
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if (arm_ccfsm_state == 3 && arm_target_label == (NUM) \
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if (arm_ccfsm_state == 3 && arm_target_label == (NUM) \
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&& !strcmp (PREFIX, "L")) \
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&& !strcmp (PREFIX, "L")) \
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{ \
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{ \
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arm_ccfsm_state = 0; \
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arm_ccfsm_state = 0; \
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arm_target_insn = NULL; \
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arm_target_insn = NULL; \
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} \
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} \
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strcpy (s, "*"); \
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ASM_GENERATE_INTERNAL_LABEL (s, (PREFIX), (NUM)); \
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sprintf (&s[strlen (s)], "%s%d", (PREFIX), (NUM)); \
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ASM_OUTPUT_LABEL (STREAM, s); \
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arm_asm_output_label (STREAM, s); \
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} while (0)
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} while (0)
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/* Nothing special is done about jump tables */
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/* #define ASM_OUTPUT_CASE_LABEL(STREAM,PREFIX,NUM,TABLE) */
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/* #define ASM_OUTPUT_CASE_END(STREAM,NUM,TABLE) */
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/* Construct a private name. */
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#define ASM_FORMAT_PRIVATE_NAME(OUTVAR,NAME,NUMBER) \
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((OUTVAR) = (char *) alloca (strlen (NAME) + 10), \
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sprintf ((OUTVAR), "%s.%d", (NAME), (NUMBER)))
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/* Output a push or a pop instruction (only used when profiling). */
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/* Output a push or a pop instruction (only used when profiling). */
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#define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \
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#define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \
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fprintf(STREAM,"\tstmfd\t%ssp!,{%s%s}\n", \
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fprintf(STREAM,"\tstmfd\t%ssp!,{%s%s}\n", \
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@ -1541,136 +1418,6 @@ do { \
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fprintf(STREAM,"\tldmfd\t%ssp!,{%s%s}\n", \
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fprintf(STREAM,"\tldmfd\t%ssp!,{%s%s}\n", \
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REGISTER_PREFIX, REGISTER_PREFIX, reg_names[REGNO])
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REGISTER_PREFIX, REGISTER_PREFIX, reg_names[REGNO])
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/* Output a relative address. Not needed since jump tables are absolute
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but we must define it anyway. */
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#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM,VALUE,REL) \
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fprintf (STREAM, "\tb L%d\n", VALUE)
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/* Output an element of a dispatch table. */
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#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM,VALUE) \
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fprintf (STREAM, "\t.word\tL%d\n", VALUE)
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/* Output various types of constants. For real numbers we output hex, with
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a comment containing the "human" value, this allows us to pass NaN's which
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the riscix assembler doesn't understand (it also makes cross-assembling
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less likely to fail). */
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#define ASM_OUTPUT_LONG_DOUBLE(STREAM,VALUE) \
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do { char dstr[30]; \
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long l[3]; \
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arm_increase_location (12); \
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REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
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REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \
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if (sizeof (int) == sizeof (long)) \
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fprintf (STREAM, "\t.long 0x%x,0x%x,0x%x\t%s long double %s\n", \
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l[2], l[1], l[0], ASM_COMMENT_START, dstr); \
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else \
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fprintf (STREAM, "\t.long 0x%lx,0x%lx,0x%lx\t%s long double %s\n",\
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l[0], l[1], l[2], ASM_COMMENT_START, dstr); \
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} while (0)
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#define ASM_OUTPUT_DOUBLE(STREAM, VALUE) \
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do { char dstr[30]; \
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long l[2]; \
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arm_increase_location (8); \
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REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
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REAL_VALUE_TO_DECIMAL (VALUE, "%.14g", dstr); \
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if (sizeof (int) == sizeof (long)) \
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fprintf (STREAM, "\t.long 0x%x, 0x%x\t%s double %s\n", l[0], \
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l[1], ASM_COMMENT_START, dstr); \
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else \
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fprintf (STREAM, "\t.long 0x%lx, 0x%lx\t%s double %s\n", l[0], \
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l[1], ASM_COMMENT_START, dstr); \
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} while (0)
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#define ASM_OUTPUT_FLOAT(STREAM, VALUE) \
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do { char dstr[30]; \
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long l; \
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arm_increase_location (4); \
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REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
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REAL_VALUE_TO_DECIMAL (VALUE, "%.7g", dstr); \
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if (sizeof (int) == sizeof (long)) \
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fprintf (STREAM, "\t.word 0x%x\t%s float %s\n", l, \
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ASM_COMMENT_START, dstr); \
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else \
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fprintf (STREAM, "\t.word 0x%lx\t%s float %s\n", l, \
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ASM_COMMENT_START, dstr); \
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} while (0);
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#define ASM_OUTPUT_INT(STREAM, EXP) \
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{fprintf (STREAM, "\t.word\t"); \
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if (flag_pic && GET_CODE(EXP) == CONST && is_pic(EXP)) \
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{ \
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output_pic_addr_const(STREAM, EXP); \
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} \
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else output_addr_const(STREAM, EXP); \
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arm_increase_location (4); \
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fputc ('\n', STREAM);}
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#define ASM_OUTPUT_SHORT(STREAM, EXP) \
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(fprintf (STREAM, "\t.short\t"), \
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output_addr_const (STREAM, (EXP)), \
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arm_increase_location (2), \
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fputc ('\n', STREAM))
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#define ASM_OUTPUT_CHAR(STREAM, EXP) \
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(fprintf (STREAM, "\t.byte\t"), \
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output_addr_const (STREAM, (EXP)), \
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arm_increase_location (1), \
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fputc ('\n', STREAM))
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#define ASM_OUTPUT_BYTE(STREAM, VALUE) \
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(fprintf (STREAM, "\t.byte\t%d\n", VALUE), \
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arm_increase_location (1))
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#define ASM_OUTPUT_ASCII(STREAM, PTR, LEN) \
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output_ascii_pseudo_op ((STREAM), (unsigned char *)(PTR), (LEN))
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/* Output a gap. In fact we fill it with nulls. */
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#define ASM_OUTPUT_SKIP(STREAM, NBYTES) \
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(arm_increase_location (NBYTES), \
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fprintf (STREAM, "\t.space\t%d\n", NBYTES))
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/* Align output to a power of two. Horrible /bin/as. */
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#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
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do \
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{ \
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register int amount = 1 << (POWER); \
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extern int arm_text_location; \
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\
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if (amount == 2) \
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fprintf (STREAM, "\t.even\n"); \
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else \
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fprintf (STREAM, "\t.align\t%d\n", amount - 4); \
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\
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if (in_text_section ()) \
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arm_text_location = ((arm_text_location + amount - 1) \
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& ~(amount - 1)); \
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} while (0)
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/* Output a common block */
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#define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
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(fprintf (STREAM, "\t.comm\t"), \
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assemble_name ((STREAM), (NAME)), \
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fprintf(STREAM, ", %d\t%s %d\n", ROUNDED, ASM_COMMENT_START, SIZE))
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/* Output a local common block. /bin/as can't do this, so hack a `.space' into
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the bss segment. Note that this is *bad* practice. */
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#define ASM_OUTPUT_LOCAL(STREAM,NAME,SIZE,ROUNDED) \
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output_lcomm_directive (STREAM, NAME, SIZE, ROUNDED)
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/* Output a source line for the debugger. */
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/* #define ASM_OUTPUT_SOURCE_LINE(STREAM,LINE) */
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/* Output a #ident directive. */
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#define ASM_OUTPUT_IDENT(STREAM,STRING) \
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fprintf (STREAM,"- - - ident %s\n",STRING)
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/* The assembler's parentheses characters. */
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#define ASM_OPEN_PAREN "("
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||||||
#define ASM_CLOSE_PAREN ")"
|
|
||||||
|
|
||||||
/* Target characters. */
|
/* Target characters. */
|
||||||
#define TARGET_BELL 007
|
#define TARGET_BELL 007
|
||||||
#define TARGET_BS 010
|
#define TARGET_BS 010
|
||||||
|
|
@ -1686,14 +1433,9 @@ do { char dstr[30]; \
|
||||||
if (optimize) \
|
if (optimize) \
|
||||||
final_prescan_insn (INSN, OPVEC, NOPERANDS)
|
final_prescan_insn (INSN, OPVEC, NOPERANDS)
|
||||||
|
|
||||||
#ifndef ASM_COMMENT_START
|
|
||||||
#define ASM_COMMENT_START "@"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
|
#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
|
||||||
((CODE) == '?' || (CODE) == '|' || (CODE) == '@')
|
((CODE) == '?' || (CODE) == '|' || (CODE) == '@')
|
||||||
/* Output an operand of an instruction. */
|
/* Output an operand of an instruction. */
|
||||||
|
|
||||||
#define PRINT_OPERAND(STREAM, X, CODE) \
|
#define PRINT_OPERAND(STREAM, X, CODE) \
|
||||||
arm_print_operand (STREAM, X, CODE)
|
arm_print_operand (STREAM, X, CODE)
|
||||||
|
|
||||||
|
|
@ -1706,6 +1448,82 @@ do { char dstr[30]; \
|
||||||
: 0))))
|
: 0))))
|
||||||
|
|
||||||
/* Output the address of an operand. */
|
/* Output the address of an operand. */
|
||||||
|
#define PRINT_OPERAND_ADDRESS(STREAM,X) \
|
||||||
|
{ \
|
||||||
|
int is_minus = GET_CODE (X) == MINUS; \
|
||||||
|
\
|
||||||
|
if (GET_CODE (X) == REG) \
|
||||||
|
fprintf (STREAM, "[%s%s, #0]", REGISTER_PREFIX, \
|
||||||
|
reg_names[REGNO (X)]); \
|
||||||
|
else if (GET_CODE (X) == PLUS || is_minus) \
|
||||||
|
{ \
|
||||||
|
rtx base = XEXP (X, 0); \
|
||||||
|
rtx index = XEXP (X, 1); \
|
||||||
|
char *base_reg_name; \
|
||||||
|
HOST_WIDE_INT offset = 0; \
|
||||||
|
if (GET_CODE (base) != REG) \
|
||||||
|
{ \
|
||||||
|
/* Ensure that BASE is a register (one of them must be). */ \
|
||||||
|
rtx temp = base; \
|
||||||
|
base = index; \
|
||||||
|
index = temp; \
|
||||||
|
} \
|
||||||
|
base_reg_name = reg_names[REGNO (base)]; \
|
||||||
|
switch (GET_CODE (index)) \
|
||||||
|
{ \
|
||||||
|
case CONST_INT: \
|
||||||
|
offset = INTVAL (index); \
|
||||||
|
if (is_minus) \
|
||||||
|
offset = -offset; \
|
||||||
|
fprintf (STREAM, "[%s%s, #%d]", REGISTER_PREFIX, \
|
||||||
|
base_reg_name, offset); \
|
||||||
|
break; \
|
||||||
|
\
|
||||||
|
case REG: \
|
||||||
|
fprintf (STREAM, "[%s%s, %s%s%s]", REGISTER_PREFIX, \
|
||||||
|
base_reg_name, is_minus ? "-" : "", \
|
||||||
|
REGISTER_PREFIX, reg_names[REGNO (index)] ); \
|
||||||
|
break; \
|
||||||
|
\
|
||||||
|
case MULT: \
|
||||||
|
case ASHIFTRT: \
|
||||||
|
case LSHIFTRT: \
|
||||||
|
case ASHIFT: \
|
||||||
|
case ROTATERT: \
|
||||||
|
{ \
|
||||||
|
fprintf (STREAM, "[%s%s, %s%s%s", REGISTER_PREFIX, \
|
||||||
|
base_reg_name, is_minus ? "-" : "", REGISTER_PREFIX,\
|
||||||
|
reg_names[REGNO (XEXP (index, 0))]); \
|
||||||
|
arm_print_operand (STREAM, index, 'S'); \
|
||||||
|
fputs ("]", STREAM); \
|
||||||
|
break; \
|
||||||
|
} \
|
||||||
|
\
|
||||||
|
default: \
|
||||||
|
abort(); \
|
||||||
|
} \
|
||||||
|
} \
|
||||||
|
else if (GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC \
|
||||||
|
|| GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC) \
|
||||||
|
{ \
|
||||||
|
extern int output_memory_reference_mode; \
|
||||||
|
\
|
||||||
|
if (GET_CODE (XEXP (X, 0)) != REG) \
|
||||||
|
abort (); \
|
||||||
|
\
|
||||||
|
if (GET_CODE (X) == PRE_DEC || GET_CODE (X) == PRE_INC) \
|
||||||
|
fprintf (STREAM, "[%s%s, #%s%d]!", REGISTER_PREFIX, \
|
||||||
|
reg_names[REGNO (XEXP (X, 0))], \
|
||||||
|
GET_CODE (X) == PRE_DEC ? "-" : "", \
|
||||||
|
GET_MODE_SIZE (output_memory_reference_mode)); \
|
||||||
|
else \
|
||||||
|
fprintf (STREAM, "[%s%s], #%s%d", REGISTER_PREFIX, \
|
||||||
|
reg_names[REGNO (XEXP (X, 0))], \
|
||||||
|
GET_CODE (X) == POST_DEC ? "-" : "", \
|
||||||
|
GET_MODE_SIZE (output_memory_reference_mode)); \
|
||||||
|
} \
|
||||||
|
else output_addr_const(STREAM, X); \
|
||||||
|
}
|
||||||
|
|
||||||
/* Handles PIC addr specially */
|
/* Handles PIC addr specially */
|
||||||
#define OUTPUT_INT_ADDR_CONST(STREAM,X) \
|
#define OUTPUT_INT_ADDR_CONST(STREAM,X) \
|
||||||
|
|
@ -1720,10 +1538,6 @@ do { char dstr[30]; \
|
||||||
else output_addr_const(STREAM, X); \
|
else output_addr_const(STREAM, X); \
|
||||||
}
|
}
|
||||||
|
|
||||||
extern arm_print_operand_address();
|
|
||||||
|
|
||||||
#define PRINT_OPERAND_ADDRESS(STREAM,X) arm_print_operand_address(STREAM,X)
|
|
||||||
|
|
||||||
/* Position Independent Code. */
|
/* Position Independent Code. */
|
||||||
/* We decide which register to use based on the compilation options and
|
/* We decide which register to use based on the compilation options and
|
||||||
the assembler in use; this is more general than the APCS restriction of
|
the assembler in use; this is more general than the APCS restriction of
|
||||||
|
|
|
||||||
|
|
@ -2024,8 +2024,7 @@
|
||||||
DONE;
|
DONE;
|
||||||
}
|
}
|
||||||
if (flag_pic &&
|
if (flag_pic &&
|
||||||
(CONSTANT_P (operands[1])
|
(CONSTANT_P (operands[1]) || CONSTANT_POOL_ADDRESS_P (operands[1])))
|
||||||
|| CONSTANT_POOL_ADDRESS_P(operands[1])))
|
|
||||||
operands[1] = legitimize_pic_address (operands[1], SImode,
|
operands[1] = legitimize_pic_address (operands[1], SImode,
|
||||||
((reload_in_progress
|
((reload_in_progress
|
||||||
|| reload_completed)
|
|| reload_completed)
|
||||||
|
|
@ -3516,14 +3515,14 @@
|
||||||
arm_ccfsm_state += 2;
|
arm_ccfsm_state += 2;
|
||||||
return \"\";
|
return \"\";
|
||||||
}
|
}
|
||||||
return output_return_instruction (NULL, TRUE);
|
return output_return_instruction (NULL, TRUE, FALSE);
|
||||||
}"
|
}"
|
||||||
[(set_attr "type" "load")])
|
[(set_attr "type" "load")])
|
||||||
|
|
||||||
(define_insn ""
|
(define_insn ""
|
||||||
[(set (pc)
|
[(set (pc)
|
||||||
(if_then_else (match_operator 0 "comparison_operator"
|
(if_then_else (match_operator 0 "comparison_operator"
|
||||||
[(reg 24) (const_int 0)])
|
[(match_operand 1 "cc_register" "") (const_int 0)])
|
||||||
(return)
|
(return)
|
||||||
(pc)))]
|
(pc)))]
|
||||||
"USE_RETURN_INSN"
|
"USE_RETURN_INSN"
|
||||||
|
|
@ -3536,7 +3535,7 @@
|
||||||
arm_ccfsm_state += 2;
|
arm_ccfsm_state += 2;
|
||||||
return \"\";
|
return \"\";
|
||||||
}
|
}
|
||||||
return output_return_instruction (operands[0], TRUE);
|
return output_return_instruction (operands[0], TRUE, FALSE);
|
||||||
}"
|
}"
|
||||||
[(set_attr "conds" "use")
|
[(set_attr "conds" "use")
|
||||||
(set_attr "type" "load")])
|
(set_attr "type" "load")])
|
||||||
|
|
@ -3544,7 +3543,7 @@
|
||||||
(define_insn ""
|
(define_insn ""
|
||||||
[(set (pc)
|
[(set (pc)
|
||||||
(if_then_else (match_operator 0 "comparison_operator"
|
(if_then_else (match_operator 0 "comparison_operator"
|
||||||
[(reg 24) (const_int 0)])
|
[(match_operand 1 "cc_register" "") (const_int 0)])
|
||||||
(pc)
|
(pc)
|
||||||
(return)))]
|
(return)))]
|
||||||
"USE_RETURN_INSN"
|
"USE_RETURN_INSN"
|
||||||
|
|
@ -3557,11 +3556,7 @@
|
||||||
arm_ccfsm_state += 2;
|
arm_ccfsm_state += 2;
|
||||||
return \"\";
|
return \"\";
|
||||||
}
|
}
|
||||||
return output_return_instruction
|
return output_return_instruction (operands[0], TRUE, TRUE);
|
||||||
(gen_rtx (reverse_condition (GET_CODE (operands[0])),
|
|
||||||
GET_MODE (operands[0]), XEXP (operands[0], 0),
|
|
||||||
XEXP (operands[0], 1)),
|
|
||||||
TRUE);
|
|
||||||
}"
|
}"
|
||||||
[(set_attr "conds" "use")
|
[(set_attr "conds" "use")
|
||||||
(set_attr "type" "load")])
|
(set_attr "type" "load")])
|
||||||
|
|
@ -5316,12 +5311,12 @@
|
||||||
if (arm_ccfsm_state && arm_target_insn && INSN_DELETED_P (arm_target_insn))
|
if (arm_ccfsm_state && arm_target_insn && INSN_DELETED_P (arm_target_insn))
|
||||||
{
|
{
|
||||||
arm_current_cc ^= 1;
|
arm_current_cc ^= 1;
|
||||||
output_return_instruction (NULL, TRUE);
|
output_return_instruction (NULL, TRUE, FALSE);
|
||||||
arm_ccfsm_state = 0;
|
arm_ccfsm_state = 0;
|
||||||
arm_target_insn = NULL;
|
arm_target_insn = NULL;
|
||||||
}
|
}
|
||||||
|
|
||||||
output_return_instruction (NULL, FALSE);
|
output_return_instruction (NULL, FALSE, FALSE);
|
||||||
return \"b%?\\t%a0\";
|
return \"b%?\\t%a0\";
|
||||||
}"
|
}"
|
||||||
[(set (attr "conds")
|
[(set (attr "conds")
|
||||||
|
|
@ -5347,12 +5342,12 @@
|
||||||
if (arm_ccfsm_state && arm_target_insn && INSN_DELETED_P (arm_target_insn))
|
if (arm_ccfsm_state && arm_target_insn && INSN_DELETED_P (arm_target_insn))
|
||||||
{
|
{
|
||||||
arm_current_cc ^= 1;
|
arm_current_cc ^= 1;
|
||||||
output_return_instruction (NULL, TRUE);
|
output_return_instruction (NULL, TRUE, FALSE);
|
||||||
arm_ccfsm_state = 0;
|
arm_ccfsm_state = 0;
|
||||||
arm_target_insn = NULL;
|
arm_target_insn = NULL;
|
||||||
}
|
}
|
||||||
|
|
||||||
output_return_instruction (NULL, FALSE);
|
output_return_instruction (NULL, FALSE, FALSE);
|
||||||
return \"b%?\\t%a1\";
|
return \"b%?\\t%a1\";
|
||||||
}"
|
}"
|
||||||
[(set (attr "conds")
|
[(set (attr "conds")
|
||||||
|
|
@ -5382,12 +5377,12 @@
|
||||||
if (arm_ccfsm_state && arm_target_insn && INSN_DELETED_P (arm_target_insn))
|
if (arm_ccfsm_state && arm_target_insn && INSN_DELETED_P (arm_target_insn))
|
||||||
{
|
{
|
||||||
arm_current_cc ^= 1;
|
arm_current_cc ^= 1;
|
||||||
output_return_instruction (NULL, TRUE);
|
output_return_instruction (NULL, TRUE, FALSE);
|
||||||
arm_ccfsm_state = 0;
|
arm_ccfsm_state = 0;
|
||||||
arm_target_insn = NULL;
|
arm_target_insn = NULL;
|
||||||
}
|
}
|
||||||
|
|
||||||
output_return_instruction (NULL, FALSE);
|
output_return_instruction (NULL, FALSE, FALSE);
|
||||||
return \"b%?\\t%a1\";
|
return \"b%?\\t%a1\";
|
||||||
}"
|
}"
|
||||||
[(set (attr "conds")
|
[(set (attr "conds")
|
||||||
|
|
@ -5396,104 +5391,6 @@
|
||||||
(const_string "nocond")))
|
(const_string "nocond")))
|
||||||
(set_attr "length" "8")])
|
(set_attr "length" "8")])
|
||||||
|
|
||||||
;; If calling a subroutine and then jumping back to somewhere else, but not
|
|
||||||
;; too far away, then we can set the link register with the branch address
|
|
||||||
;; and jump direct to the subroutine. On return from the subroutine
|
|
||||||
;; execution continues at the branch; this avoids a prefetch stall.
|
|
||||||
;; We use the length attribute (via short_branch ()) to establish whether or
|
|
||||||
;; not this is possible, this is the same as the sparc does.
|
|
||||||
|
|
||||||
(define_peephole
|
|
||||||
[(parallel[(call (mem:SI (match_operand:SI 0 "" "X"))
|
|
||||||
(match_operand:SI 1 "general_operand" "g"))
|
|
||||||
(clobber (reg:SI 14))])
|
|
||||||
(set (pc)
|
|
||||||
(label_ref (match_operand 2 "" "")))]
|
|
||||||
"0 && GET_CODE (operands[0]) == SYMBOL_REF
|
|
||||||
&& short_branch (INSN_UID (insn), INSN_UID (operands[2]))
|
|
||||||
&& arm_insn_not_targeted (insn)"
|
|
||||||
"*
|
|
||||||
{
|
|
||||||
int backward = arm_backwards_branch (INSN_UID (insn),
|
|
||||||
INSN_UID (operands[2]));
|
|
||||||
|
|
||||||
#if 0
|
|
||||||
/* Putting this in means that TARGET_6 code will ONLY run on an arm6 or
|
|
||||||
* above, leaving it out means that the code will still run on an arm 2 or 3
|
|
||||||
*/
|
|
||||||
if (TARGET_6)
|
|
||||||
{
|
|
||||||
if (backward)
|
|
||||||
output_asm_insn (\"sub%?\\t%|lr, %|pc, #(8 + . -%l2)\", operands);
|
|
||||||
else
|
|
||||||
output_asm_insn (\"add%?\\t%|lr, %|pc, #(%l2 - . -8)\", operands);
|
|
||||||
}
|
|
||||||
else
|
|
||||||
#endif
|
|
||||||
{
|
|
||||||
output_asm_insn (\"mov%?\\t%|lr, %|pc\\t%@ protect cc\", operands);
|
|
||||||
if (backward)
|
|
||||||
output_asm_insn (\"sub%?\\t%|lr, %|lr, #(4 + . -%l2)\", operands);
|
|
||||||
else
|
|
||||||
output_asm_insn (\"add%?\\t%|lr, %|lr, #(%l2 - . -4)\", operands);
|
|
||||||
}
|
|
||||||
return \"b%?\\t%a0\";
|
|
||||||
}"
|
|
||||||
[(set (attr "conds")
|
|
||||||
(if_then_else (eq_attr "cpu" "arm6")
|
|
||||||
(const_string "clob")
|
|
||||||
(const_string "nocond")))
|
|
||||||
(set (attr "length")
|
|
||||||
(if_then_else (eq_attr "cpu" "arm6")
|
|
||||||
(const_int 8)
|
|
||||||
(const_int 12)))])
|
|
||||||
|
|
||||||
(define_peephole
|
|
||||||
[(parallel[(set (match_operand:SI 0 "s_register_operand" "=r")
|
|
||||||
(call (mem:SI (match_operand:SI 1 "" "X"))
|
|
||||||
(match_operand:SI 2 "general_operand" "g")))
|
|
||||||
(clobber (reg:SI 14))])
|
|
||||||
(set (pc)
|
|
||||||
(label_ref (match_operand 3 "" "")))]
|
|
||||||
"0 && GET_CODE (operands[0]) == SYMBOL_REF
|
|
||||||
&& short_branch (INSN_UID (insn), INSN_UID (operands[3]))
|
|
||||||
&& arm_insn_not_targeted (insn)"
|
|
||||||
"*
|
|
||||||
{
|
|
||||||
int backward = arm_backwards_branch (INSN_UID (insn),
|
|
||||||
INSN_UID (operands[3]));
|
|
||||||
|
|
||||||
#if 0
|
|
||||||
/* Putting this in means that TARGET_6 code will ONLY run on an arm6 or
|
|
||||||
* above, leaving it out means that the code will still run on an arm 2 or 3
|
|
||||||
*/
|
|
||||||
if (TARGET_6)
|
|
||||||
{
|
|
||||||
if (backward)
|
|
||||||
output_asm_insn (\"sub%?\\t%|lr, %|pc, #(8 + . -%l3)\", operands);
|
|
||||||
else
|
|
||||||
output_asm_insn (\"add%?\\t%|lr, %|pc, #(%l3 - . -8)\", operands);
|
|
||||||
}
|
|
||||||
else
|
|
||||||
#endif
|
|
||||||
{
|
|
||||||
output_asm_insn (\"mov%?\\t%|lr, %|pc\\t%@ protect cc\", operands);
|
|
||||||
if (backward)
|
|
||||||
output_asm_insn (\"sub%?\\t%|lr, %|lr, #(4 + . -%l3)\", operands);
|
|
||||||
else
|
|
||||||
output_asm_insn (\"add%?\\t%|lr, %|lr, #(%l3 - . -4)\", operands);
|
|
||||||
}
|
|
||||||
return \"b%?\\t%a1\";
|
|
||||||
}"
|
|
||||||
[(set (attr "conds")
|
|
||||||
(if_then_else (eq_attr "cpu" "arm6")
|
|
||||||
(const_string "clob")
|
|
||||||
(const_string "nocond")))
|
|
||||||
(set (attr "length")
|
|
||||||
(if_then_else (eq_attr "cpu" "arm6")
|
|
||||||
(const_int 8)
|
|
||||||
(const_int 12)))])
|
|
||||||
|
|
||||||
(define_split
|
(define_split
|
||||||
[(set (pc)
|
[(set (pc)
|
||||||
(if_then_else (match_operator 0 "comparison_operator"
|
(if_then_else (match_operator 0 "comparison_operator"
|
||||||
|
|
|
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@ -54,7 +54,7 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
|
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|
||||||
/*#undef ASM_DECLARE_FUNCTION_NAME*/
|
/*#undef ASM_DECLARE_FUNCTION_NAME*/
|
||||||
|
|
||||||
#include "arm32/arm32.h"
|
#include "arm32/aout.h"
|
||||||
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|
||||||
/* NetBSD assembler can cope with $ in labels so lets be compatible */
|
/* NetBSD assembler can cope with $ in labels so lets be compatible */
|
||||||
|
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue