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Redo the previous:

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GC all of the backward branch code (which wasn't used).
Separate the a.out stuff into a separate .h file.
Some other random cleanup.
Leave the arm_preserved_register() hack for now.
This commit is contained in:
mycroft 1998-11-12 11:03:23 +00:00
parent 76f0e60111
commit 2ea86fa2ea
4 changed files with 391 additions and 1005 deletions
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889
gnu/usr.bin/gcc/arch/arm32/arm32.c
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File diff suppressed because it is too large Load Diff

378
gnu/usr.bin/gcc/arch/arm32/arm32.h
View File

@ -794,7 +794,8 @@ extern int arm_preserved_register(int n);
int volatile_func = arm_volatile_func (); \
if ((FROM) == ARG_POINTER_REGNUM && (TO) == HARD_FRAME_POINTER_REGNUM)\
(OFFSET) = 0; \
else if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM)\
else if ((FROM) == FRAME_POINTER_REGNUM \
&& (TO) == STACK_POINTER_REGNUM) \
(OFFSET) = (get_frame_size () + 3 & ~3); \
else \
{ \
@ -817,7 +818,8 @@ extern int arm_preserved_register(int n);
{ \
if (! frame_pointer_needed) \
offset -= 16; \
if (! volatile_func && (regs_ever_live[14] || saved_hard_reg)) \
if (! volatile_func \
&& (regs_ever_live[14] || saved_hard_reg)) \
offset += 4; \
(OFFSET) = (get_frame_size () + 3 & ~3) + offset; \
} \
@ -1167,7 +1169,7 @@ extern struct rtx_def *legitimize_pic_address ();
if (xop0 != XEXP (X, 0) || xop1 != XEXP (X, 1)) \
(X) = gen_rtx (MINUS, SImode, xop0, xop1); \
} \
if (flag_pic) \
if (flag_pic) \
(X) = legitimize_pic_address (OLDX, MODE, NULL_RTX); \
if (memory_address_p (MODE, X)) \
goto WIN; \
@ -1389,149 +1391,24 @@ extern int arm_compare_fp;
/* Assembler output control */
#ifndef ARM_OS_NAME
#define ARM_OS_NAME "(generic)"
#endif
/* The text to go at the start of the assembler file */
#define ASM_FILE_START(STREAM) \
{ \
extern char *version_string; \
fprintf (STREAM,"%s Generated by gcc %s for ARM/%s\n", \
ASM_COMMENT_START, version_string, ARM_OS_NAME); \
fprintf (STREAM,"%srfp\t.req\t%sr9\n", REGISTER_PREFIX, REGISTER_PREFIX); \
fprintf (STREAM,"%ssl\t.req\t%sr10\n", REGISTER_PREFIX, REGISTER_PREFIX); \
fprintf (STREAM,"%sfp\t.req\t%sr11\n", REGISTER_PREFIX, REGISTER_PREFIX); \
fprintf (STREAM,"%sip\t.req\t%sr12\n", REGISTER_PREFIX, REGISTER_PREFIX); \
fprintf (STREAM,"%ssp\t.req\t%sr13\n", REGISTER_PREFIX, REGISTER_PREFIX); \
fprintf (STREAM,"%slr\t.req\t%sr14\n", REGISTER_PREFIX, REGISTER_PREFIX); \
fprintf (STREAM,"%spc\t.req\t%sr15\n", REGISTER_PREFIX, REGISTER_PREFIX); \
}
#define ASM_APP_ON ""
#define ASM_APP_OFF ""
/* Switch to the text or data segment. */
#define TEXT_SECTION_ASM_OP ".text"
#define DATA_SECTION_ASM_OP ".data"
#define REGISTER_PREFIX ""
#define USER_LABEL_PREFIX "_"
#define LOCAL_LABEL_PREFIX ""
/* The assembler's names for the registers. */
#ifndef REGISTER_NAMES
#define REGISTER_NAMES \
{ \
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
"r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc", \
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
"cc", "sfp", "afp" \
}
#endif
#ifndef ADDITIONAL_REGISTER_NAMES
#define ADDITIONAL_REGISTER_NAMES \
{ \
{"a1", 0}, \
{"a2", 1}, \
{"a3", 2}, \
{"a4", 3}, \
{"v1", 4}, \
{"v2", 5}, \
{"v3", 6}, \
{"v4", 7}, \
{"v5", 8}, \
{"v6", 9}, \
{"rfp", 9}, /* Gcc used to call it this */ \
{"sb", 9}, \
{"v7", 10}, \
{"r10", 10}, \
{"r11", 11}, /* fp */ \
{"r12", 12}, /* ip */ \
{"r13", 13}, /* sp */ \
{"r14", 14}, /* lr */ \
{"r15", 15} /* pc */ \
}
#endif
/* Arm Assembler barfs on dollars */
#define DOLLARS_IN_IDENTIFIERS 0
#define NO_DOLLAR_IN_LABEL
/* DBX register number for a given compiler register number */
#define DBX_REGISTER_NUMBER(REGNO) (REGNO)
/* Generate DBX debugging information. riscix.h will undefine this because
the native assembler does not support stabs. */
#define DBX_DEBUGGING_INFO 1
/* Acorn dbx moans about continuation chars, so don't use any. */
#ifndef DBX_CONTIN_LENGTH
#define DBX_CONTIN_LENGTH 0
#endif
/* Output a source filename for the debugger. RISCiX dbx insists that the
``desc'' field is set to compiler version number >= 315 (sic). */
#define DBX_OUTPUT_MAIN_SOURCE_FILENAME(STREAM,NAME) \
do { \
fprintf (STREAM, ".stabs \"%s\",%d,0,315,%s\n", (NAME), N_SO, \
&ltext_label_name[1]); \
text_section (); \
ASM_OUTPUT_INTERNAL_LABEL (STREAM, "Ltext", 0); \
} while (0)
/* Output a label definition. */
#define ASM_OUTPUT_LABEL(STREAM,NAME) \
arm_asm_output_label ((STREAM), (NAME))
/* Output a function label definition. */
#define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL) \
ASM_OUTPUT_LABEL(STREAM, NAME)
/* Output a globalising directive for a label. */
#define ASM_GLOBALIZE_LABEL(STREAM,NAME) \
(fprintf (STREAM, "\t.global\t"), \
assemble_name (STREAM, NAME), \
fputc ('\n',STREAM)) \
/* Output a reference to a label. */
#define ASM_OUTPUT_LABELREF(STREAM,NAME) \
fprintf (STREAM, "%s%s", USER_LABEL_PREFIX, NAME)
/* Make an internal label into a string. */
#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
sprintf (STRING, "*%s%d", PREFIX, NUM)
/* Output an internal label definition. */
#define ASM_OUTPUT_INTERNAL_LABEL(STREAM, PREFIX, NUM) \
do \
{ \
char *s = (char *) alloca (11 + strlen (PREFIX)); \
extern int arm_target_label, arm_ccfsm_state; \
extern rtx arm_target_insn; \
\
if (arm_ccfsm_state == 3 && arm_target_label == (NUM) \
&& !strcmp (PREFIX, "L")) \
{ \
arm_ccfsm_state = 0; \
arm_target_insn = NULL; \
} \
strcpy (s, "*"); \
sprintf (&s[strlen (s)], "%s%d", (PREFIX), (NUM)); \
arm_asm_output_label (STREAM, s); \
#define ASM_OUTPUT_INTERNAL_LABEL(STREAM, PREFIX, NUM) \
do \
{ \
char *s = (char *) alloca (40 + strlen (PREFIX)); \
extern int arm_target_label, arm_ccfsm_state; \
extern rtx arm_target_insn; \
\
if (arm_ccfsm_state == 3 && arm_target_label == (NUM) \
&& !strcmp (PREFIX, "L")) \
{ \
arm_ccfsm_state = 0; \
arm_target_insn = NULL; \
} \
ASM_GENERATE_INTERNAL_LABEL (s, (PREFIX), (NUM)); \
ASM_OUTPUT_LABEL (STREAM, s); \
} while (0)
/* Nothing special is done about jump tables */
/* #define ASM_OUTPUT_CASE_LABEL(STREAM,PREFIX,NUM,TABLE) */
/* #define ASM_OUTPUT_CASE_END(STREAM,NUM,TABLE) */
/* Construct a private name. */
#define ASM_FORMAT_PRIVATE_NAME(OUTVAR,NAME,NUMBER) \
((OUTVAR) = (char *) alloca (strlen (NAME) + 10), \
sprintf ((OUTVAR), "%s.%d", (NAME), (NUMBER)))
/* Output a push or a pop instruction (only used when profiling). */
#define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \
fprintf(STREAM,"\tstmfd\t%ssp!,{%s%s}\n", \
@ -1541,136 +1418,6 @@ do { \
fprintf(STREAM,"\tldmfd\t%ssp!,{%s%s}\n", \
REGISTER_PREFIX, REGISTER_PREFIX, reg_names[REGNO])
/* Output a relative address. Not needed since jump tables are absolute
but we must define it anyway. */
#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM,VALUE,REL) \
fprintf (STREAM, "\tb L%d\n", VALUE)
/* Output an element of a dispatch table. */
#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM,VALUE) \
fprintf (STREAM, "\t.word\tL%d\n", VALUE)
/* Output various types of constants. For real numbers we output hex, with
a comment containing the "human" value, this allows us to pass NaN's which
the riscix assembler doesn't understand (it also makes cross-assembling
less likely to fail). */
#define ASM_OUTPUT_LONG_DOUBLE(STREAM,VALUE) \
do { char dstr[30]; \
long l[3]; \
arm_increase_location (12); \
REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
REAL_VALUE_TO_DECIMAL (VALUE, "%.20g", dstr); \
if (sizeof (int) == sizeof (long)) \
fprintf (STREAM, "\t.long 0x%x,0x%x,0x%x\t%s long double %s\n", \
l[2], l[1], l[0], ASM_COMMENT_START, dstr); \
else \
fprintf (STREAM, "\t.long 0x%lx,0x%lx,0x%lx\t%s long double %s\n",\
l[0], l[1], l[2], ASM_COMMENT_START, dstr); \
} while (0)
#define ASM_OUTPUT_DOUBLE(STREAM, VALUE) \
do { char dstr[30]; \
long l[2]; \
arm_increase_location (8); \
REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
REAL_VALUE_TO_DECIMAL (VALUE, "%.14g", dstr); \
if (sizeof (int) == sizeof (long)) \
fprintf (STREAM, "\t.long 0x%x, 0x%x\t%s double %s\n", l[0], \
l[1], ASM_COMMENT_START, dstr); \
else \
fprintf (STREAM, "\t.long 0x%lx, 0x%lx\t%s double %s\n", l[0], \
l[1], ASM_COMMENT_START, dstr); \
} while (0)
#define ASM_OUTPUT_FLOAT(STREAM, VALUE) \
do { char dstr[30]; \
long l; \
arm_increase_location (4); \
REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
REAL_VALUE_TO_DECIMAL (VALUE, "%.7g", dstr); \
if (sizeof (int) == sizeof (long)) \
fprintf (STREAM, "\t.word 0x%x\t%s float %s\n", l, \
ASM_COMMENT_START, dstr); \
else \
fprintf (STREAM, "\t.word 0x%lx\t%s float %s\n", l, \
ASM_COMMENT_START, dstr); \
} while (0);
#define ASM_OUTPUT_INT(STREAM, EXP) \
{fprintf (STREAM, "\t.word\t"); \
if (flag_pic && GET_CODE(EXP) == CONST && is_pic(EXP)) \
{ \
output_pic_addr_const(STREAM, EXP); \
} \
else output_addr_const(STREAM, EXP); \
arm_increase_location (4); \
fputc ('\n', STREAM);}
#define ASM_OUTPUT_SHORT(STREAM, EXP) \
(fprintf (STREAM, "\t.short\t"), \
output_addr_const (STREAM, (EXP)), \
arm_increase_location (2), \
fputc ('\n', STREAM))
#define ASM_OUTPUT_CHAR(STREAM, EXP) \
(fprintf (STREAM, "\t.byte\t"), \
output_addr_const (STREAM, (EXP)), \
arm_increase_location (1), \
fputc ('\n', STREAM))
#define ASM_OUTPUT_BYTE(STREAM, VALUE) \
(fprintf (STREAM, "\t.byte\t%d\n", VALUE), \
arm_increase_location (1))
#define ASM_OUTPUT_ASCII(STREAM, PTR, LEN) \
output_ascii_pseudo_op ((STREAM), (unsigned char *)(PTR), (LEN))
/* Output a gap. In fact we fill it with nulls. */
#define ASM_OUTPUT_SKIP(STREAM, NBYTES) \
(arm_increase_location (NBYTES), \
fprintf (STREAM, "\t.space\t%d\n", NBYTES))
/* Align output to a power of two. Horrible /bin/as. */
#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
do \
{ \
register int amount = 1 << (POWER); \
extern int arm_text_location; \
\
if (amount == 2) \
fprintf (STREAM, "\t.even\n"); \
else \
fprintf (STREAM, "\t.align\t%d\n", amount - 4); \
\
if (in_text_section ()) \
arm_text_location = ((arm_text_location + amount - 1) \
& ~(amount - 1)); \
} while (0)
/* Output a common block */
#define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
(fprintf (STREAM, "\t.comm\t"), \
assemble_name ((STREAM), (NAME)), \
fprintf(STREAM, ", %d\t%s %d\n", ROUNDED, ASM_COMMENT_START, SIZE))
/* Output a local common block. /bin/as can't do this, so hack a `.space' into
the bss segment. Note that this is *bad* practice. */
#define ASM_OUTPUT_LOCAL(STREAM,NAME,SIZE,ROUNDED) \
output_lcomm_directive (STREAM, NAME, SIZE, ROUNDED)
/* Output a source line for the debugger. */
/* #define ASM_OUTPUT_SOURCE_LINE(STREAM,LINE) */
/* Output a #ident directive. */
#define ASM_OUTPUT_IDENT(STREAM,STRING) \
fprintf (STREAM,"- - - ident %s\n",STRING)
/* The assembler's parentheses characters. */
#define ASM_OPEN_PAREN "("
#define ASM_CLOSE_PAREN ")"
/* Target characters. */
#define TARGET_BELL 007
#define TARGET_BS 010
@ -1686,14 +1433,9 @@ do { char dstr[30]; \
if (optimize) \
final_prescan_insn (INSN, OPVEC, NOPERANDS)
#ifndef ASM_COMMENT_START
#define ASM_COMMENT_START "@"
#endif
#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
((CODE) == '?' || (CODE) == '|' || (CODE) == '@')
/* Output an operand of an instruction. */
#define PRINT_OPERAND(STREAM, X, CODE) \
arm_print_operand (STREAM, X, CODE)
@ -1706,6 +1448,82 @@ do { char dstr[30]; \
: 0))))
/* Output the address of an operand. */
#define PRINT_OPERAND_ADDRESS(STREAM,X) \
{ \
int is_minus = GET_CODE (X) == MINUS; \
\
if (GET_CODE (X) == REG) \
fprintf (STREAM, "[%s%s, #0]", REGISTER_PREFIX, \
reg_names[REGNO (X)]); \
else if (GET_CODE (X) == PLUS || is_minus) \
{ \
rtx base = XEXP (X, 0); \
rtx index = XEXP (X, 1); \
char *base_reg_name; \
HOST_WIDE_INT offset = 0; \
if (GET_CODE (base) != REG) \
{ \
/* Ensure that BASE is a register (one of them must be). */ \
rtx temp = base; \
base = index; \
index = temp; \
} \
base_reg_name = reg_names[REGNO (base)]; \
switch (GET_CODE (index)) \
{ \
case CONST_INT: \
offset = INTVAL (index); \
if (is_minus) \
offset = -offset; \
fprintf (STREAM, "[%s%s, #%d]", REGISTER_PREFIX, \
base_reg_name, offset); \
break; \
\
case REG: \
fprintf (STREAM, "[%s%s, %s%s%s]", REGISTER_PREFIX, \
base_reg_name, is_minus ? "-" : "", \
REGISTER_PREFIX, reg_names[REGNO (index)] ); \
break; \
\
case MULT: \
case ASHIFTRT: \
case LSHIFTRT: \
case ASHIFT: \
case ROTATERT: \
{ \
fprintf (STREAM, "[%s%s, %s%s%s", REGISTER_PREFIX, \
base_reg_name, is_minus ? "-" : "", REGISTER_PREFIX,\
reg_names[REGNO (XEXP (index, 0))]); \
arm_print_operand (STREAM, index, 'S'); \
fputs ("]", STREAM); \
break; \
} \
\
default: \
abort(); \
} \
} \
else if (GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC \
|| GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC) \
{ \
extern int output_memory_reference_mode; \
\
if (GET_CODE (XEXP (X, 0)) != REG) \
abort (); \
\
if (GET_CODE (X) == PRE_DEC || GET_CODE (X) == PRE_INC) \
fprintf (STREAM, "[%s%s, #%s%d]!", REGISTER_PREFIX, \
reg_names[REGNO (XEXP (X, 0))], \
GET_CODE (X) == PRE_DEC ? "-" : "", \
GET_MODE_SIZE (output_memory_reference_mode)); \
else \
fprintf (STREAM, "[%s%s], #%s%d", REGISTER_PREFIX, \
reg_names[REGNO (XEXP (X, 0))], \
GET_CODE (X) == POST_DEC ? "-" : "", \
GET_MODE_SIZE (output_memory_reference_mode)); \
} \
else output_addr_const(STREAM, X); \
}
/* Handles PIC addr specially */
#define OUTPUT_INT_ADDR_CONST(STREAM,X) \
@ -1720,10 +1538,6 @@ do { char dstr[30]; \
else output_addr_const(STREAM, X); \
}
extern arm_print_operand_address();
#define PRINT_OPERAND_ADDRESS(STREAM,X) arm_print_operand_address(STREAM,X)
/* Position Independent Code. */
/* We decide which register to use based on the compilation options and
the assembler in use; this is more general than the APCS restriction of

127
gnu/usr.bin/gcc/arch/arm32/arm32.md
View File

@ -2024,8 +2024,7 @@
DONE;
}
if (flag_pic &&
(CONSTANT_P (operands[1])
|| CONSTANT_POOL_ADDRESS_P(operands[1])))
(CONSTANT_P (operands[1]) || CONSTANT_POOL_ADDRESS_P (operands[1])))
operands[1] = legitimize_pic_address (operands[1], SImode,
((reload_in_progress
|| reload_completed)
@ -3516,14 +3515,14 @@
arm_ccfsm_state += 2;
return \"\";
}
return output_return_instruction (NULL, TRUE);
return output_return_instruction (NULL, TRUE, FALSE);
}"
[(set_attr "type" "load")])
(define_insn ""
[(set (pc)
(if_then_else (match_operator 0 "comparison_operator"
[(reg 24) (const_int 0)])
[(match_operand 1 "cc_register" "") (const_int 0)])
(return)
(pc)))]
"USE_RETURN_INSN"
@ -3536,7 +3535,7 @@
arm_ccfsm_state += 2;
return \"\";
}
return output_return_instruction (operands[0], TRUE);
return output_return_instruction (operands[0], TRUE, FALSE);
}"
[(set_attr "conds" "use")
(set_attr "type" "load")])
@ -3544,7 +3543,7 @@
(define_insn ""
[(set (pc)
(if_then_else (match_operator 0 "comparison_operator"
[(reg 24) (const_int 0)])
[(match_operand 1 "cc_register" "") (const_int 0)])
(pc)
(return)))]
"USE_RETURN_INSN"
@ -3557,11 +3556,7 @@
arm_ccfsm_state += 2;
return \"\";
}
return output_return_instruction
(gen_rtx (reverse_condition (GET_CODE (operands[0])),
GET_MODE (operands[0]), XEXP (operands[0], 0),
XEXP (operands[0], 1)),
TRUE);
return output_return_instruction (operands[0], TRUE, TRUE);
}"
[(set_attr "conds" "use")
(set_attr "type" "load")])
@ -5316,12 +5311,12 @@
if (arm_ccfsm_state && arm_target_insn && INSN_DELETED_P (arm_target_insn))
{
arm_current_cc ^= 1;
output_return_instruction (NULL, TRUE);
output_return_instruction (NULL, TRUE, FALSE);
arm_ccfsm_state = 0;
arm_target_insn = NULL;
}
output_return_instruction (NULL, FALSE);
output_return_instruction (NULL, FALSE, FALSE);
return \"b%?\\t%a0\";
}"
[(set (attr "conds")
@ -5347,12 +5342,12 @@
if (arm_ccfsm_state && arm_target_insn && INSN_DELETED_P (arm_target_insn))
{
arm_current_cc ^= 1;
output_return_instruction (NULL, TRUE);
output_return_instruction (NULL, TRUE, FALSE);
arm_ccfsm_state = 0;
arm_target_insn = NULL;
}
output_return_instruction (NULL, FALSE);
output_return_instruction (NULL, FALSE, FALSE);
return \"b%?\\t%a1\";
}"
[(set (attr "conds")
@ -5382,12 +5377,12 @@
if (arm_ccfsm_state && arm_target_insn && INSN_DELETED_P (arm_target_insn))
{
arm_current_cc ^= 1;
output_return_instruction (NULL, TRUE);
output_return_instruction (NULL, TRUE, FALSE);
arm_ccfsm_state = 0;
arm_target_insn = NULL;
}
output_return_instruction (NULL, FALSE);
output_return_instruction (NULL, FALSE, FALSE);
return \"b%?\\t%a1\";
}"
[(set (attr "conds")
@ -5396,104 +5391,6 @@
(const_string "nocond")))
(set_attr "length" "8")])
;; If calling a subroutine and then jumping back to somewhere else, but not
;; too far away, then we can set the link register with the branch address
;; and jump direct to the subroutine. On return from the subroutine
;; execution continues at the branch; this avoids a prefetch stall.
;; We use the length attribute (via short_branch ()) to establish whether or
;; not this is possible, this is the same as the sparc does.
(define_peephole
[(parallel[(call (mem:SI (match_operand:SI 0 "" "X"))
(match_operand:SI 1 "general_operand" "g"))
(clobber (reg:SI 14))])
(set (pc)
(label_ref (match_operand 2 "" "")))]
"0 && GET_CODE (operands[0]) == SYMBOL_REF
&& short_branch (INSN_UID (insn), INSN_UID (operands[2]))
&& arm_insn_not_targeted (insn)"
"*
{
int backward = arm_backwards_branch (INSN_UID (insn),
INSN_UID (operands[2]));
#if 0
/* Putting this in means that TARGET_6 code will ONLY run on an arm6 or
* above, leaving it out means that the code will still run on an arm 2 or 3
*/
if (TARGET_6)
{
if (backward)
output_asm_insn (\"sub%?\\t%|lr, %|pc, #(8 + . -%l2)\", operands);
else
output_asm_insn (\"add%?\\t%|lr, %|pc, #(%l2 - . -8)\", operands);
}
else
#endif
{
output_asm_insn (\"mov%?\\t%|lr, %|pc\\t%@ protect cc\", operands);
if (backward)
output_asm_insn (\"sub%?\\t%|lr, %|lr, #(4 + . -%l2)\", operands);
else
output_asm_insn (\"add%?\\t%|lr, %|lr, #(%l2 - . -4)\", operands);
}
return \"b%?\\t%a0\";
}"
[(set (attr "conds")
(if_then_else (eq_attr "cpu" "arm6")
(const_string "clob")
(const_string "nocond")))
(set (attr "length")
(if_then_else (eq_attr "cpu" "arm6")
(const_int 8)
(const_int 12)))])
(define_peephole
[(parallel[(set (match_operand:SI 0 "s_register_operand" "=r")
(call (mem:SI (match_operand:SI 1 "" "X"))
(match_operand:SI 2 "general_operand" "g")))
(clobber (reg:SI 14))])
(set (pc)
(label_ref (match_operand 3 "" "")))]
"0 && GET_CODE (operands[0]) == SYMBOL_REF
&& short_branch (INSN_UID (insn), INSN_UID (operands[3]))
&& arm_insn_not_targeted (insn)"
"*
{
int backward = arm_backwards_branch (INSN_UID (insn),
INSN_UID (operands[3]));
#if 0
/* Putting this in means that TARGET_6 code will ONLY run on an arm6 or
* above, leaving it out means that the code will still run on an arm 2 or 3
*/
if (TARGET_6)
{
if (backward)
output_asm_insn (\"sub%?\\t%|lr, %|pc, #(8 + . -%l3)\", operands);
else
output_asm_insn (\"add%?\\t%|lr, %|pc, #(%l3 - . -8)\", operands);
}
else
#endif
{
output_asm_insn (\"mov%?\\t%|lr, %|pc\\t%@ protect cc\", operands);
if (backward)
output_asm_insn (\"sub%?\\t%|lr, %|lr, #(4 + . -%l3)\", operands);
else
output_asm_insn (\"add%?\\t%|lr, %|lr, #(%l3 - . -4)\", operands);
}
return \"b%?\\t%a1\";
}"
[(set (attr "conds")
(if_then_else (eq_attr "cpu" "arm6")
(const_string "clob")
(const_string "nocond")))
(set (attr "length")
(if_then_else (eq_attr "cpu" "arm6")
(const_int 8)
(const_int 12)))])
(define_split
[(set (pc)
(if_then_else (match_operator 0 "comparison_operator"

2
gnu/usr.bin/gcc/arch/arm32/netbsd.h
View File

@ -54,7 +54,7 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
/*#undef ASM_DECLARE_FUNCTION_NAME*/
#include "arm32/arm32.h"
#include "arm32/aout.h"
/* NetBSD assembler can cope with $ in labels so lets be compatible */