diff --git a/sys/arch/hpcarm/sa11x0/sa1111.c b/sys/arch/hpcarm/sa11x0/sa1111.c new file mode 100644 index 000000000000..a83eace2311d --- /dev/null +++ b/sys/arch/hpcarm/sa11x0/sa1111.c @@ -0,0 +1,312 @@ +/* $NetBSD: sa1111.c,v 1.1 2001/03/10 18:50:37 toshii Exp $ */ + +/*- + * Copyright (c) 2001 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by IWAMOTO Toshihiro. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * TODO: + * - implement IPL in intr handler + * - separate machine specific attach code + * - introduce bus abstraction to support SA1101 + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +static int sacc_match(struct device *, struct cfdata *, void *); +static void sacc_attach(struct device *, struct device *, void *); +static int sa1111_search(struct device *, struct cfdata *, void *); +static int sa1111_print(void *, const char *); + +static int sacc_intr_dispatch(void *); +static void sacc_stray_interrupt(struct sacc_softc *, int); +static void sacc_intr_calculatemasks(struct sacc_softc *); + +struct cfattach sacc_ca = { + sizeof(struct sacc_softc), sacc_match, sacc_attach +}; + +#ifdef INTR_DEBUG +#define DPRINTF(arg) printf arg +#else +#define DPRINTF(arg) +#endif + +static int +sacc_match(parent, match, aux) + struct device *parent; + struct cfdata *match; + void *aux; +{ + return (0); +} + +static void +sacc_attach(parent, self, aux) + struct device *parent; + struct device *self; + void *aux; +{ + int i; + struct sacc_softc *sc = (struct sacc_softc *)self; + struct sa11x0_softc *psc = (struct sa11x0_softc *)parent; + struct sa11x0_attach_args *sa = aux; + + sc->sc_iot = sa->sa_iot; + sc->sc_piot = psc->sc_iot; + sc->sc_gpioh = psc->sc_gpioh; + sc->sc_gpiomask = 2; /* XXX jornada 720 */ + + if (bus_space_map(sa->sa_iot, sa->sa_addr, sa->sa_size, 0, + &sc->sc_ioh)) { + printf("%s: unable to map registers\n", sc->sc_dev.dv_xname); + return; + } + + for(i = 0; i < SACCIC_LEN; i++) + sc->sc_intrhand[i] = NULL; + + /* initialize SA1111 interrupt controller */ + bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN0, 0); + bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN1, 0); + bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTTSTSEL, 0); + bus_space_write_4(sc->sc_iot, sc->sc_ioh, + SACCIC_INTSTATCLR0, 0xffffffff); + bus_space_write_4(sc->sc_iot, sc->sc_ioh, + SACCIC_INTSTATCLR1, 0xffffffff); + + /* connect to SA1110's GPIO intr */ +#ifdef notyet + sa11x0_cascade_intr_establish(0, xx, 1, sacc_intr_probe, sc); +#endif + sa11x0_intr_establish(0, 1 /* XXX pdattach->sacc->irq */, + 1, IPL_BIO, sacc_intr_dispatch, sc); + + /* + * Attach each devices + */ + config_search(sa1111_search, self, sa1111_print); +} + +static int +sa1111_search(parent, cf, aux) + struct device *parent; + struct cfdata *cf; + void *aux; +{ + if ((*cf->cf_attach->ca_match)(parent, cf, NULL) > 0) + config_attach(parent, cf, NULL, sa1111_print); + + return 0; +} + +static int +sa1111_print(aux, name) + void *aux; + const char *name; +{ + printf("\n"); + return (UNCONF); +} + +static int +sacc_intr_dispatch(arg) + void *arg; +{ + int i, handled; + u_int32_t mask; + struct sacc_intrvec intstat; + struct sacc_softc *sc = arg; + struct sacc_intrhand *ih; + + intstat.lo = + bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTSTATCLR0); + intstat.hi = + bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTSTATCLR1); + DPRINTF(("sacc_intr_dispatch: %x %x\n", intstat.lo, intstat.hi)); + + /* process the intrs which have the highest IPL */ +#ifdef notyet + intstat.lo &= sc->sc_imask[xx].lo; + intstat.hi &= sc->sc_imask[xx].hi; +#endif + for(i = 0, mask = 1; i < 32; i++, mask <<= 1) + if (intstat.lo & mask) { + /* clear SA1110's GPIO intr status */ + bus_space_write_4(sc->sc_piot, sc->sc_gpioh, + SAGPIO_EDR, sc->sc_gpiomask); + handled = 0; + for(ih = sc->sc_intrhand[i]; ih; ih = ih->ih_next) + handled = handled | + ((ih->ih_fun)(ih->ih_arg) == 1); + + /* always clear intr status here */ + bus_space_write_4(sc->sc_iot, sc->sc_ioh, + SACCIC_INTSTATCLR0, 1 << i); + + if (! handled) + sacc_stray_interrupt(sc, i + 32); + } + for(i = 0, mask = 1; i < SACCIC_LEN - 32; i++, mask <<= 1) + if (intstat.hi & mask) { + /* clear SA1110's GPIO intr status */ + bus_space_write_4(sc->sc_piot, sc->sc_gpioh, + SAGPIO_EDR, sc->sc_gpiomask); + handled = 0; + for(ih = sc->sc_intrhand[i + 32]; ih; ih = ih->ih_next) + handled = handled | + ((ih->ih_fun)(ih->ih_arg) == 1); + + bus_space_write_4(sc->sc_iot, sc->sc_ioh, + SACCIC_INTSTATCLR1, 1 << i); + + if (! handled) + sacc_stray_interrupt(sc, i + 32); + } + return 1; +} + +static void +sacc_stray_interrupt(sc, irq) + struct sacc_softc *sc; + int irq; +{ + printf("sacc_stray_interrupt\n"); +} + +void * +sacc_intr_establish(ic, irq, type, level, ih_fun, ih_arg) + sacc_chipset_tag_t *ic; + int irq, type, level; + int (*ih_fun)(void *); + void *ih_arg; +{ + int s; + struct sacc_softc *sc = (struct sacc_softc *)ic; + struct sacc_intrhand **p, *ih; + + /* no point in sleeping unless someone can free memory. */ + ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK); + if (ih == NULL) + panic("sacc_intr_establish: can't malloc handler info"); + + if (irq < 0 || irq > SACCIC_LEN || type == IST_NONE) + panic("sacc_intr_establish: bogus irq or type"); + + /* All interrupts are edge intrs. */ + + /* install intr handler */ + ih->ih_fun = ih_fun; + ih->ih_arg = ih_arg; + ih->ih_irq = irq; + ih->ih_next = NULL; + + s = splhigh(); + for(p = &sc->sc_intrhand[irq]; *p; p = &(*p)->ih_next) + ; + + *p = ih; + + sacc_intr_calculatemasks(sc); + splx(s); + + return(ih); +} + +void +sacc_intr_disestablish(ic, arg) + sacc_chipset_tag_t *ic; + void *arg; +{ + int irq; + struct sacc_softc *sc = (struct sacc_softc *)ic; + struct sacc_intrhand *ih, **p; + + ih = (struct sacc_intrhand *)ic; + irq = ih->ih_irq; + +#ifdef DIAGNOSTIC + if (irq < 0 || irq > SACCIC_LEN) + panic("sacc_intr_disestablish: bogus irq"); +#endif + + for(p = &sc->sc_intrhand[irq];; p = &(*p)->ih_next) { + if (*p == NULL) + panic("sacc_intr_disestablish: handler not registered"); + if (*p == ih) + break; + } + *p = (*p)->ih_next; + free(ih, M_DEVBUF); +} + +void +sacc_intr_calculatemasks(sc) + struct sacc_softc *sc; +{ + int irq; + + sc->sc_imask[0].lo = 0; + sc->sc_imask[0].hi = 0; + for(irq = 0; irq < 32; irq++) + if (sc->sc_intrhand[irq]) + sc->sc_imask[0].lo |= (1 << irq); + for(irq = 0; irq < SACCIC_LEN - 32; irq++) + if (sc->sc_intrhand[irq + 32]) + sc->sc_imask[0].hi |= (1 << irq); + + + /* XXX this should not be done here */ + bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN0, + sc->sc_imask[0].lo); + bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN1, + sc->sc_imask[0].hi); + DPRINTF(("sacc_intr_calculatemasks: %x %x\n", sc->sc_imask[0].lo, + sc->sc_imask[0].hi)); +} diff --git a/sys/arch/hpcarm/sa11x0/sa1111_reg.h b/sys/arch/hpcarm/sa11x0/sa1111_reg.h new file mode 100644 index 000000000000..eaf151e91068 --- /dev/null +++ b/sys/arch/hpcarm/sa11x0/sa1111_reg.h @@ -0,0 +1,72 @@ +/* $NetBSD: sa1111_reg.h,v 1.1 2001/03/10 18:50:38 toshii Exp $ */ + +/*- + * Copyright (c) 2001 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by IWAMOTO Toshihiro. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* Interrupt Controller */ + +/* number of interrupt bits */ +#define SACCIC_LEN 55 + +#define SACCIC_INTTEST0 0x1600 +#define SACCIC_INTTEST1 0x1604 +#define SACCIC_INTEN0 0x1608 +#define SACCIC_INTEN1 0x160C +#define SACCIC_INTPOL0 0x1610 +#define SACCIC_INTPOL1 0x1614 +#define SACCIC_INTTSTSEL 0x1618 +#define SACCIC_INTSTATCLR0 0x161C +#define SACCIC_INTSTATCLR1 0x1620 +#define SACCIC_INTSET0 0x1624 +#define SACCIC_INTSET1 0x1628 +#define SACCIC_WAKE_EN0 0x162C +#define SACCIC_WAKE_EN1 0x1630 +#define SACCIC_WAKE_POL0 0x1634 +#define SACCIC_WAKE_POL1 0x1638 + +/* GPIO registers */ +#define SACCGPIOA_DDR 0x1000 /* data direction */ +#define SACCGPIOA_DVR 0x1004 /* data value */ +#define SACCGPIOA_SDR 0x1008 /* sleep direction */ +#define SACCGPIOA_SSR 0x100C /* sleep state */ +#define SACCGPIOB_DDR 0x1010 +#define SACCGPIOB_DVR 0x1014 +#define SACCGPIOB_SDR 0x1018 +#define SACCGPIOB_SSR 0x101C +#define SACCGPIOC_DDR 0x1020 +#define SACCGPIOC_DVR 0x1024 +#define SACCGPIOC_SDR 0x1028 +#define SACCGPIOC_SSR 0x102C diff --git a/sys/arch/hpcarm/sa11x0/sa1111_var.h b/sys/arch/hpcarm/sa11x0/sa1111_var.h new file mode 100644 index 000000000000..3c2a19ae082d --- /dev/null +++ b/sys/arch/hpcarm/sa11x0/sa1111_var.h @@ -0,0 +1,71 @@ +/* $NetBSD: sa1111_var.h,v 1.1 2001/03/10 18:50:38 toshii Exp $ */ + +/*- + * Copyright (c) 2001 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by IWAMOTO Toshihiro. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +struct sacc_intrhand { + int (*ih_fun)(void *); + void *ih_arg; + int ih_irq; +#ifdef notyet + int ih_level; +#endif + struct sacc_intrhand *ih_next; +}; + +struct sacc_intrvec { + u_int32_t lo; /* bits 0..31 */ + u_int32_t hi; /* bits 32..54 */ +}; + +struct sacc_softc { + struct device sc_dev; + bus_space_tag_t sc_iot; + bus_space_handle_t sc_ioh; + bus_space_tag_t sc_piot; /* parent(SA1110)'s iot */ + bus_space_handle_t sc_gpioh; + + u_int32_t sc_gpiomask; /* SA1110 GPIO mask */ + + struct sacc_intrvec sc_imask[NIPL]; + struct sacc_intrhand *sc_intrhand[SACCIC_LEN]; +}; + +typedef void *sacc_chipset_tag_t; + +void *sacc_intr_establish(sacc_chipset_tag_t *, int, int, int, + int (*)(void *), void *); +void sacc_intr_disestablish(sacc_chipset_tag_t *, void *);