+ use system's real PCLK frequency for source clock of sscom's
baudrate, instead of a compile time constant. + simplify bootstrap_bs_map() by mapping all built-in peripheral registers at start. + check SW3 and SW7 and toggle RB_SINGLE and RB_KDB in boothowto if pressed.
This commit is contained in:
bsh
parent
297e776d44
commit
2ca26eeaed
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@ -1,4 +1,4 @@
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/* $NetBSD: smdk2800_machdep.c,v 1.8 2003/05/13 04:53:25 bsh Exp $ */
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/* $NetBSD: smdk2800_machdep.c,v 1.9 2003/05/13 08:30:33 bsh Exp $ */
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/*
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* Copyright (c) 2002 Fujitsu Component Limited
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@ -32,11 +32,6 @@
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* SUCH DAMAGE.
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*/
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/*
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* Machine dependant functions for kernel setup for Samsung SMDK2800
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* derived from integrator_machdep.c
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*/
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/*
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* Copyright (c) 2001,2002 ARM Ltd
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* All rights reserved.
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@ -105,6 +100,11 @@
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* Created : 24/11/97
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*/
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/*
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* Machine dependant functions for kernel setup for Samsung SMDK2800
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* derived from integrator_machdep.c
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*/
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#include "opt_ddb.h"
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#include "opt_kgdb.h"
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#include "opt_ipkdb.h"
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@ -165,6 +165,18 @@
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/* Kernel text starts 2MB in from the bottom of the kernel address space. */
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#define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000)
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/* Memory disk support */
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#if defined(MEMORY_DISK_DYNAMIC) && defined(MEMORY_DISK_ROOT_ADDR)
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#define DO_MEMORY_DISK
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/* We have memory disk image outside of the kernel on ROM. */
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#ifdef MEMORY_DISK_ROOT_ROM
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/* map the image directory and use read-only */
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#else
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/* copy the image to RAM */
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#endif
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#endif
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/*
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* Address to call from cpu_reset() to reset the machine.
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* This is machine architecture dependant as it varies depending
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@ -228,12 +240,6 @@ pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
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struct user *proc0paddr;
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#ifdef MEMORY_DISK_DYNAMIC
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#define MD_ROOT_SIZE 4 /* in megabytes */
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#define MD_ROOT_START 0x400000/* MD root image in ROM */
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#endif
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/* Prototypes */
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void consinit(void);
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@ -242,6 +248,7 @@ void kgdb_port_init(void);
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static int
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bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
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int cacheable, bus_space_handle_t * bshp);
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static void map_builtin_peripherals(void);
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static void copy_io_area_map(pd_entry_t * new_pd);
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/* A load of console goo. */
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@ -297,7 +304,7 @@ cpu_reboot(int howto, char *bootstr)
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printf("boot: howto=%08x curproc=%p\n", howto, curproc);
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#endif
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cpu_reset_address = (u_int)s3c2800_softreset;
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cpu_reset_address = vtophys((u_int)s3c2800_softreset);
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/*
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* If we are still cold then hit the air brakes
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@ -371,12 +378,17 @@ initarm(void *arg)
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extern int etext asm("_etext");
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extern int end asm("_end");
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pv_addr_t kernel_l1pt;
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struct s3c2xx0_softc temp_softc; /* used to initialize IO regs */
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struct s3c2800_softc temp_softc; /* used to initialize IO regs */
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int progress_counter = 0;
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#ifdef MEMORY_DISK_DYNAMIC
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void *md_root_start, *md_root_rom;
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#ifdef DO_MEMORY_DISK
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vm_offset_t md_root_start;
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#define MD_ROOT_SIZE (MEMORY_DISK_ROOT_SIZE * DEV_BSIZE)
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#endif
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#define gpio_read8(reg) bus_space_read_1(temp_softc.sc_sx.sc_iot, \
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temp_softc.sc_sx.sc_gpio_ioh, (reg))
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#define LEDSTEP() __LED(progress_counter++)
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#define pdatc (*(volatile uint8_t *)(S3C2800_GPIO_BASE+GPIO_PDATC))
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@ -390,32 +402,39 @@ initarm(void *arg)
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panic("cpu not recognized!");
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LEDSTEP();
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map_builtin_peripherals();
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/*
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* prepare fake bus space tag
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*/
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bootstrap_bs_tag = s3c2xx0_bs_tag;
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bootstrap_bs_tag.bs_map = bootstrap_bs_map;
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temp_softc.sc_iot = &bootstrap_bs_tag;
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s3c2xx0_softc = &temp_softc;
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s3c2xx0_softc = &temp_softc.sc_sx;
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s3c2xx0_softc->sc_iot = &bootstrap_bs_tag;
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bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_GPIO_BASE,
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S3C2800_GPIO_SIZE, 0, &temp_softc.sc_gpio_ioh);
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S3C2800_GPIO_SIZE, 0, &temp_softc.sc_sx.sc_gpio_ioh);
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bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_INTCTL_BASE,
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S3C2800_INTCTL_SIZE, 0, &temp_softc.sc_intctl_ioh);
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S3C2800_INTCTL_SIZE, 0, &temp_softc.sc_sx.sc_intctl_ioh);
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bootstrap_bs_map(&bootstrap_bs_tag, S3C2800_CLKMAN_BASE,
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S3C2800_CLKMAN_SIZE, 0, &temp_softc.sc_sx.sc_clkman_ioh);
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#undef __LED
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#define __LED(x) bus_space_write_1( &bootstrap_bs_tag, temp_softc.sc_gpio_ioh, \
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GPIO_PDATC, (~(x) & 0x07) | \
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(bus_space_read_1( &bootstrap_bs_tag, \
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temp_softc.sc_gpio_ioh, GPIO_PDATC ) & ~0x07) )
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#define __LED(x) \
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bus_space_write_1(&bootstrap_bs_tag, temp_softc.sc_sx.sc_gpio_ioh, \
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GPIO_PDATC, (~(x) & 0x07) | \
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(bus_space_read_1(&bootstrap_bs_tag, \
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temp_softc.sc_sx.sc_gpio_ioh, GPIO_PDATC ) & ~0x07))
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LEDSTEP();
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/* Disable all peripheral interrupts */
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bus_space_write_4(&bootstrap_bs_tag, temp_softc.sc_intctl_ioh,
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bus_space_write_4(&bootstrap_bs_tag, temp_softc.sc_sx.sc_intctl_ioh,
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INTCTL_INTMSK, 0);
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s3c2800_clock_freq(&temp_softc);
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consinit();
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printf("consinit done\n");
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*/
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physical_start = bootconfig.dram[0].address;
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physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
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#ifdef MEMORY_DISK_DYNAMIC
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/* Reserve for ram disk */
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printf("Reserve %d bytes for memory disk\n", MD_ROOT_SIZE * L1_S_SIZE);
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physical_end -= MD_ROOT_SIZE * L1_S_SIZE;
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#if DO_MEMORY_DISK
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#ifdef MEMORY_DISK_ROOT_ROM
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md_root_start = MEMORY_DISK_ROOT_ADDR;
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boothowto |= RB_RDONLY;
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#else
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/* Reserve physmem for ram disk */
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md_root_start = ((physical_end - MD_ROOT_SIZE) & ~(L1_S_SIZE-1));
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printf("Reserve %ld bytes for memory disk\n",
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physical_end - md_root_start);
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/* copy fs contents */
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memcpy((void *)md_root_start, (void *)MEMORY_DISK_ROOT_ADDR,
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MD_ROOT_SIZE);
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physical_end = md_root_start;
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#endif
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#endif
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physical_freestart = 0x08000000UL; /* XXX */
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@ -541,7 +571,7 @@ initarm(void *arg)
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}
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/* This should never be able to happen but better confirm that. */
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if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE - 1)) != 0)
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if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
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panic("initarm: Failed to align the kernel page directory\n");
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/*
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@ -684,14 +714,13 @@ initarm(void *arg)
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#endif
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#ifdef MEMORY_DISK_DYNAMIC
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/* Map ram for MD root This will overwrite old page table */
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bootstrap_bs_map(&bootstrap_bs_tag, physical_end,
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MD_ROOT_SIZE * L1_S_SIZE, 0, (bus_space_handle_t *) & md_root_start);
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/* map MD root image on ROM */
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bootstrap_bs_map(&bootstrap_bs_tag, MD_ROOT_START,
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MD_ROOT_SIZE * L1_S_SIZE, 0, (bus_space_handle_t *) & md_root_rom);
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/* map MD root image */
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bootstrap_bs_map(&bootstrap_bs_tag, md_root_start, MD_ROOT_SIZE,
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BUS_SPACE_MAP_CACHEABLE | BUS_SPACE_MAP_LINEAR,
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(bus_space_handle_t *)&md_root_start);
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#endif
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md_root_setconf((void *)md_root_start, MD_ROOT_SIZE);
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#endif /* MEMORY_DISK_DYNAMIC */
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/*
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* map integrated peripherals at same address in l1pagetable
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* so that we can continue to use console.
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@ -739,11 +768,6 @@ initarm(void *arg)
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printf("done!\n");
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#endif
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#ifdef MEMORY_DISK_DYNAMIC
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memcpy(md_root_start, md_root_rom, MD_ROOT_SIZE * L1_S_SIZE);
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md_root_setconf(md_root_start, MD_ROOT_SIZE * L1_S_SIZE);
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#endif
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#if 0
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/*
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* The IFPGA registers have just moved.
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@ -824,7 +848,18 @@ initarm(void *arg)
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printf("done.\n");
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boothowto |= RB_SINGLE | RB_KDB | RB_ASKNAME;
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#ifdef BOOTHOWTO_INIT
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boothowto |= BOOTHOWTO_INIT;
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#endif
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{
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uint8_t gpio = ~gpio_read8(GPIO_PDATF);
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if (gpio & (1<<5)) /* SW3 */
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boothowto ^= RB_SINGLE;
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if (gpio & (1<<7)) /* SW7 */
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boothowto ^= RB_KDB;
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printf( "sw: %x boothowto: %x\n", gpio, boothowto );
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}
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#ifdef IPKDB
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/* Initialise ipkdb */
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/* We return the new stack pointer address */
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return (kernelstack.pv_va + USPACE_SVC_STACK_TOP);
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}
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#ifndef SSCOM_FREQ
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/* our PCLK is 50MHz */
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#define SSCOM_FREQ 50000000
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#endif
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void
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consinit(void)
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{
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static int consinit_done = 0;
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bus_space_tag_t iot = s3c2xx0_softc->sc_iot;
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int pclk = s3c2xx0_softc->sc_pclk;
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if (consinit_done != 0)
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return;
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@ -873,12 +905,12 @@ consinit(void)
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#if NSSCOM > 0
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#ifdef SSCOM0CONSOLE
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if (0 == s3c2800_sscom_cnattach(iot, 0, comcnspeed,
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SSCOM_FREQ, comcnmode))
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pclk, comcnmode))
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return;
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#endif
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#ifdef SSCOM1CONSOLE
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if (0 == s3c2800_sscom_cnattach(iot, 1, comcnspeed,
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SSCOM_FREQ, comcnmode))
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pclk, comcnmode))
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return;
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#endif
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#endif /* NSSCOM */
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@ -915,6 +947,7 @@ kgdb_port_init(void)
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{
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#if (NSSCOM > 0)
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int unit = -1;
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int pclk = s3c2xx0_softc->sc_pclk;
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if (strcmp(kgdb_devname, "sscom0") == 0)
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unit = 0;
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@ -923,7 +956,7 @@ kgdb_port_init(void)
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if (unit >= 0) {
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s3c2800_sscom_kgdb_attach(s3c2xx0_softc->sc_iot,
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unit, kgdb_rate, SSCOM_FREQ, kgdb_sscom_mode);
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unit, kgdb_rate, pclk, kgdb_sscom_mode);
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}
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#endif
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}
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@ -964,6 +997,27 @@ clean_dcache_line(vaddr_t va)
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static vaddr_t section_free = SMDK2800_VBASE_FREE;
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static void
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map_builtin_peripherals(void)
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{
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pd_entry_t *pagedir = read_ttb();
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int i, sec;
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for (i=0; i < 2; ++i) {
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pmap_map_section((vaddr_t)pagedir,
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SMDK2800_IO_AREA_VBASE + (i <<L1_S_SHIFT),
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S3C2800_PERIPHERALS + (i << L1_S_SHIFT),
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VM_PROT_READ | VM_PROT_WRITE, PTE_NOCACHE);
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sec = (SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT) + i;
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writeback_dcache_line((vaddr_t)&pagedir[sec]);
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}
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cpu_drain_writebuf();
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cpu_tlb_flushD();
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}
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/*
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* simple memory mapping function used in early bootstrap stage
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* before pmap is initialized.
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@ -974,7 +1028,7 @@ static int
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bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
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int flag, bus_space_handle_t * bshp)
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{
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long offset, sec;
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long offset;
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int modified = 0;
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pd_entry_t *pagedir = read_ttb();
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/* This assumes PA==VA for page directory */
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@ -983,18 +1037,6 @@ bootstrap_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
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offset = bpa - S3C2800_PERIPHERALS;
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if (offset < 0 || 2 * L1_S_SIZE < offset)
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panic("bootstrap_bs_map: can't map");
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sec = (SMDK2800_IO_AREA_VBASE + offset) >> L1_S_SHIFT;
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/* already mapped? */
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if ((pagedir[sec] & L1_S_FRAME) != (bpa & L1_S_FRAME)) {
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pmap_map_section((vaddr_t)pagedir, sec << L1_S_SHIFT,
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bpa & L1_S_FRAME,
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VM_PROT_READ | VM_PROT_WRITE,
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PTE_NOCACHE);
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writeback_dcache_line((vaddr_t)&pagedir[sec]);
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modified = 1;
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}
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*bshp = (bus_space_handle_t)(SMDK2800_IO_AREA_VBASE + offset);
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} else {
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vaddr_t va;
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@ -1034,7 +1076,7 @@ static void
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copy_io_area_map(pd_entry_t * new_pd)
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{
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pd_entry_t *cur_pd = read_ttb();
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vaddr_t sec;
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int sec;
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for (sec = SMDK2800_IO_AREA_VBASE >> L1_S_SHIFT;
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sec < (section_free >> L1_S_SHIFT); ++sec) {
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