Add interrupt transfers. From OpenBSD.
Having interrupt transfers enables some more device types to be used, most notably USB2 hubs. USB2 hubs still cannot handle anything but USB2 devices, because there is node code to handle hub Transaction Translation yet. XXX This code doesn't do good bw scheduling, but it's certainly better than nothing. :)
This commit is contained in:
augustss
parent
6f9df049df
commit
2c051a4b85
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@ -1,4 +1,4 @@
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/* $NetBSD: ehci.c,v 1.77 2004/10/22 09:58:00 augustss Exp $ */
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/* $NetBSD: ehci.c,v 1.78 2004/10/22 10:38:17 augustss Exp $ */
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/*
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* Copyright (c) 2004 The NetBSD Foundation, Inc.
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@ -65,7 +65,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.77 2004/10/22 09:58:00 augustss Exp $");
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__KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.78 2004/10/22 10:38:17 augustss Exp $");
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#include "ohci.h"
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#include "uhci.h"
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@ -120,7 +120,9 @@ struct ehci_pipe {
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/*ehci_soft_qtd_t *setup, *data, *stat;*/
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} ctl;
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/* Interrupt pipe */
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/* XXX */
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struct {
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u_int length;
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} intr;
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/* Bulk pipe */
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struct {
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u_int length;
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@ -207,6 +209,9 @@ Static void ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *,
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Static usbd_status ehci_device_request(usbd_xfer_handle xfer);
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Static usbd_status ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *,
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int ival);
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Static void ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
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Static void ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
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ehci_soft_qh_t *);
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@ -376,18 +381,23 @@ ehci_init(ehci_softc_t *sc)
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return (USBD_IOERROR);
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}
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/* XXX need proper intr scheduling */
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sc->sc_rand = 96;
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/* frame list size at default, read back what we got and use that */
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switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
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case 0: sc->sc_flsize = 1024*4; break;
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case 1: sc->sc_flsize = 512*4; break;
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case 2: sc->sc_flsize = 256*4; break;
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case 0: sc->sc_flsize = 1024; break;
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case 1: sc->sc_flsize = 512; break;
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case 2: sc->sc_flsize = 256; break;
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case 3: return (USBD_IOERROR);
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}
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err = usb_allocmem(&sc->sc_bus, sc->sc_flsize,
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EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
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err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t),
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EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
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if (err)
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return (err);
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DPRINTF(("%s: flsize=%d\n", USBDEVNAME(sc->sc_bus.bdev),sc->sc_flsize));
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sc->sc_flist = KERNADDR(&sc->sc_fldma, 0);
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EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
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/* Set up the bus struct. */
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sc->sc_bus.methods = &ehci_bus_methods;
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@ -398,6 +408,46 @@ ehci_init(ehci_softc_t *sc)
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sc->sc_eintrs = EHCI_NORMAL_INTRS;
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/*
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* Allocate the interrupt dummy QHs. These are arranged to give poll
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* intervals that are powers of 2 times 1ms.
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*/
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for (i = 0; i < EHCI_INTRQHS; i++) {
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sqh = ehci_alloc_sqh(sc);
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if (sqh == NULL) {
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err = USBD_NOMEM;
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goto bad1;
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}
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sc->sc_islots[i].sqh = sqh;
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}
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for (i = 0; i < EHCI_INTRQHS; i++) {
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sqh = sc->sc_islots[i].sqh;
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if (i == 0) {
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/* The last (1ms) QH terminates. */
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sqh->qh.qh_link = EHCI_NULL;
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sqh->next = NULL;
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} else {
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/* Otherwise the next QH has half the poll interval */
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sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh;
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sqh->qh.qh_link = htole32(sqh->next->physaddr |
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EHCI_LINK_QH);
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}
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sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
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sqh->qh.qh_link = EHCI_NULL;
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sqh->qh.qh_curqtd = EHCI_NULL;
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sqh->next = NULL;
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sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
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sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
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sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
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sqh->sqtd = NULL;
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}
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/* Point the frame list at the last level (128ms). */
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for (i = 0; i < sc->sc_flsize; i++) {
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sc->sc_flist[i] = htole32(EHCI_LINK_QH |
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sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1,
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i)].sqh->physaddr);
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}
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/* Allocate dummy QH that starts the async list. */
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sqh = ehci_alloc_sqh(sc);
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if (sqh == NULL) {
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@ -438,7 +488,7 @@ ehci_init(ehci_softc_t *sc)
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EHCI_CMD_ITC_8 | /* 8 microframes */
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(EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
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EHCI_CMD_ASE |
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/* EHCI_CMD_PSE | */
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EHCI_CMD_PSE |
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EHCI_CMD_RS);
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/* Take over port ownership */
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@ -476,6 +526,10 @@ ehci_intr(void *v)
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/* If we get an interrupt while polling, then just ignore it. */
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if (sc->sc_bus.use_polling) {
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u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
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if (intrs)
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EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
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#ifdef DIAGNOSTIC
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DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n"));
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#endif
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@ -763,7 +817,7 @@ ehci_idone(struct ehci_xfer *ex)
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"\20\7HALTED\6BUFERR\5BABBLE\4XACTERR"
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"\3MISSED", sbuf, sizeof(sbuf));
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DPRINTFN((status == EHCI_QTD_HALTED)*/*10*/2,
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DPRINTFN((status & EHCI_QTD_HALTED) ? 2 : 0,
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("ehci_idone: error, addr=%d, endpt=0x%02x, "
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"status 0x%s\n",
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xfer->pipe->device->address,
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@ -1236,7 +1290,7 @@ ehci_open(usbd_pipe_handle pipe)
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ehci_soft_qh_t *sqh;
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usbd_status err;
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int s;
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int speed, naks;
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int ival, speed, naks;
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DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
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pipe, addr, ed->bEndpointAddress, sc->sc_addr));
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@ -1283,9 +1337,9 @@ ehci_open(usbd_pipe_handle pipe)
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EHCI_QH_SET_NRL(naks)
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);
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sqh->qh.qh_endphub = htole32(
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EHCI_QH_SET_MULT(1)
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EHCI_QH_SET_MULT(1) |
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/* XXX TT stuff */
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/* XXX interrupt mask */
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EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x01 : 0)
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);
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sqh->qh.qh_curqtd = EHCI_NULL;
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/* Fill the overlay qTD */
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@ -1318,7 +1372,10 @@ ehci_open(usbd_pipe_handle pipe)
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break;
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case UE_INTERRUPT:
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pipe->methods = &ehci_device_intr_methods;
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return (USBD_INVAL);
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ival = pipe->interval;
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if (ival == USBD_DEFAULT_INTERVAL)
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ival = ed->bInterval;
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return (ehci_device_setintr(sc, sqh, ival));
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case UE_ISOCHRONOUS:
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pipe->methods = &ehci_device_isoc_methods;
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return (USBD_INVAL);
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@ -1766,7 +1823,7 @@ ehci_root_ctrl_start(usbd_xfer_handle xfer)
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v = EOREAD4(sc, EHCI_HCSPARAMS);
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USETW(hubd.wHubCharacteristics,
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EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
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EHCI_HCS_P_INCICATOR(EREAD4(sc, EHCI_HCSPARAMS))
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EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS))
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? UHD_PORT_IND : 0);
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hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
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for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
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@ -1960,6 +2017,7 @@ ehci_root_ctrl_close(usbd_pipe_handle pipe)
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void
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ehci_root_intr_done(usbd_xfer_handle xfer)
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{
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xfer->hcpriv = NULL;
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}
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Static usbd_status
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@ -2020,6 +2078,7 @@ ehci_root_intr_close(usbd_pipe_handle pipe)
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void
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ehci_root_ctrl_done(usbd_xfer_handle xfer)
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{
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xfer->hcpriv = NULL;
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}
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/************************/
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@ -2807,11 +2866,213 @@ ehci_device_bulk_done(usbd_xfer_handle xfer)
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/************************/
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Static usbd_status ehci_device_intr_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
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Static usbd_status ehci_device_intr_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
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Static void ehci_device_intr_abort(usbd_xfer_handle xfer) { }
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Static void ehci_device_intr_close(usbd_pipe_handle pipe) { }
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Static void ehci_device_intr_done(usbd_xfer_handle xfer) { }
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Static usbd_status
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ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival)
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{
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struct ehci_soft_islot *isp;
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int islot, lev;
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/* Find a poll rate that is large enough. */
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for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--)
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if (EHCI_ILEV_IVAL(lev) <= ival)
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break;
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/* Pick an interrupt slot at the right level. */
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/* XXX could do better than picking at random */
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sc->sc_rand = (sc->sc_rand + 191) % sc->sc_flsize;
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islot = EHCI_IQHIDX(lev, sc->sc_rand);
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sqh->islot = islot;
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isp = &sc->sc_islots[islot];
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ehci_add_qh(sqh, isp->sqh);
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return (USBD_NORMAL_COMPLETION);
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}
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Static usbd_status
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ehci_device_intr_transfer(usbd_xfer_handle xfer)
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{
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usbd_status err;
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/* Insert last in queue. */
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err = usb_insert_transfer(xfer);
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if (err)
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return (err);
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/*
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* Pipe isn't running (otherwise err would be USBD_INPROG),
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* so start it first.
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*/
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return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
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}
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Static usbd_status
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ehci_device_intr_start(usbd_xfer_handle xfer)
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{
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#define exfer EXFER(xfer)
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struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
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usbd_device_handle dev = xfer->pipe->device;
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ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
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ehci_soft_qtd_t *data, *dataend;
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ehci_soft_qh_t *sqh;
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usbd_status err;
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int len, isread, endpt;
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int s;
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DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n",
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xfer, xfer->length, xfer->flags));
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if (sc->sc_dying)
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return (USBD_IOERROR);
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#ifdef DIAGNOSTIC
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if (xfer->rqflags & URQ_REQUEST)
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panic("ehci_device_intr_start: a request");
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#endif
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len = xfer->length;
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endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
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isread = UE_GET_DIR(endpt) == UE_DIR_IN;
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sqh = epipe->sqh;
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epipe->u.intr.length = len;
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err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
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&dataend);
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if (err) {
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DPRINTFN(-1, ("ehci_device_intr_start: no memory\n"));
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xfer->status = err;
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usb_transfer_complete(xfer);
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return (err);
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}
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#ifdef EHCI_DEBUG
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if (ehcidebug > 5) {
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DPRINTF(("ehci_device_intr_start: data(1)\n"));
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ehci_dump_sqh(sqh);
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ehci_dump_sqtds(data);
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}
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#endif
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/* Set up interrupt info. */
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exfer->sqtdstart = data;
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exfer->sqtdend = dataend;
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#ifdef DIAGNOSTIC
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if (!exfer->isdone) {
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printf("ehci_device_intr_start: not done, ex=%p\n", exfer);
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}
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exfer->isdone = 0;
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#endif
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s = splusb();
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ehci_set_qh_qtd(sqh, data);
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if (xfer->timeout && !sc->sc_bus.use_polling) {
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usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
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ehci_timeout, xfer);
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}
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ehci_add_intr_list(sc, exfer);
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xfer->status = USBD_IN_PROGRESS;
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splx(s);
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#ifdef EHCI_DEBUG
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if (ehcidebug > 10) {
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DPRINTF(("ehci_device_intr_start: data(2)\n"));
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delay(10000);
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DPRINTF(("ehci_device_intr_start: data(3)\n"));
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ehci_dump_regs(sc);
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printf("sqh:\n");
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ehci_dump_sqh(sqh);
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ehci_dump_sqtds(data);
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}
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#endif
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if (sc->sc_bus.use_polling)
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ehci_waitintr(sc, xfer);
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return (USBD_IN_PROGRESS);
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#undef exfer
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}
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Static void
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ehci_device_intr_abort(usbd_xfer_handle xfer)
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{
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DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer));
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if (xfer->pipe->intrxfer == xfer) {
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DPRINTFN(1, ("echi_device_intr_abort: remove\n"));
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xfer->pipe->intrxfer = NULL;
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}
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ehci_abort_xfer(xfer, USBD_CANCELLED);
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}
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Static void
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ehci_device_intr_close(usbd_pipe_handle pipe)
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{
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ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
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struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
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struct ehci_soft_islot *isp;
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isp = &sc->sc_islots[epipe->sqh->islot];
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ehci_close_pipe(pipe, isp->sqh);
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}
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Static void
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ehci_device_intr_done(usbd_xfer_handle xfer)
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{
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#define exfer EXFER(xfer)
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struct ehci_xfer *ex = EXFER(xfer);
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ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
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struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
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ehci_soft_qtd_t *data, *dataend;
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ehci_soft_qh_t *sqh;
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usbd_status err;
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int len, isread, endpt, s;
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DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n",
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xfer, xfer->actlen));
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if (xfer->pipe->repeat) {
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ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
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len = epipe->u.intr.length;
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xfer->length = len;
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endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
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isread = UE_GET_DIR(endpt) == UE_DIR_IN;
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sqh = epipe->sqh;
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err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
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&data, &dataend);
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if (err) {
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DPRINTFN(-1, ("ehci_device_intr_done: no memory\n"));
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xfer->status = err;
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return;
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}
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/* Set up interrupt info. */
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exfer->sqtdstart = data;
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exfer->sqtdend = dataend;
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#ifdef DIAGNOSTIC
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if (!exfer->isdone) {
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printf("ehci_device_intr_done: not done, ex=%p\n",
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exfer);
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}
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exfer->isdone = 0;
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#endif
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s = splusb();
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ehci_set_qh_qtd(sqh, data);
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if (xfer->timeout && !sc->sc_bus.use_polling) {
|
||||
usb_callout(xfer->timeout_handle,
|
||||
mstohz(xfer->timeout), ehci_timeout, xfer);
|
||||
}
|
||||
splx(s);
|
||||
|
||||
xfer->status = USBD_IN_PROGRESS;
|
||||
} else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
|
||||
ehci_del_intr_list(ex); /* remove from active list */
|
||||
ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
|
||||
}
|
||||
#undef exfer
|
||||
}
|
||||
|
||||
/************************/
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: ehcireg.h,v 1.17 2004/06/23 06:45:56 mycroft Exp $ */
|
||||
/* $NetBSD: ehcireg.h,v 1.18 2004/10/22 10:38:17 augustss Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2001 The NetBSD Foundation, Inc.
|
||||
|
|
@ -75,7 +75,7 @@
|
|||
|
||||
#define EHCI_HCSPARAMS 0x04 /* RO Structural parameters */
|
||||
#define EHCI_HCS_DEBUGPORT(x) (((x) >> 20) & 0xf)
|
||||
#define EHCI_HCS_P_INCICATOR(x) ((x) & 0x10000)
|
||||
#define EHCI_HCS_P_INDICATOR(x) ((x) & 0x10000)
|
||||
#define EHCI_HCS_N_CC(x) (((x) >> 12) & 0xf) /* # of companion ctlrs */
|
||||
#define EHCI_HCS_N_PCC(x) (((x) >> 8) & 0xf) /* # of ports per comp. */
|
||||
#define EHCI_HCS_PPC(x) ((x) & 0x10) /* port power control */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: ehcivar.h,v 1.14 2004/10/22 09:58:00 augustss Exp $ */
|
||||
/* $NetBSD: ehcivar.h,v 1.15 2004/10/22 10:38:17 augustss Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2001 The NetBSD Foundation, Inc.
|
||||
|
|
@ -52,6 +52,7 @@ typedef struct ehci_soft_qh {
|
|||
struct ehci_soft_qh *next;
|
||||
struct ehci_soft_qtd *sqtd;
|
||||
ehci_physaddr_t physaddr;
|
||||
int islot;
|
||||
} ehci_soft_qh_t;
|
||||
#define EHCI_SQH_SIZE ((sizeof (struct ehci_soft_qh) + EHCI_QH_ALIGN - 1) / EHCI_QH_ALIGN * EHCI_QH_ALIGN)
|
||||
#define EHCI_SQH_CHUNK (EHCI_PAGE_SIZE / EHCI_SQH_SIZE)
|
||||
|
|
@ -68,6 +69,18 @@ struct ehci_xfer {
|
|||
};
|
||||
#define EXFER(xfer) ((struct ehci_xfer *)(xfer))
|
||||
|
||||
/* Information about an entry in the interrupt list. */
|
||||
struct ehci_soft_islot {
|
||||
ehci_soft_qh_t *sqh; /* Queue Head. */
|
||||
};
|
||||
|
||||
#define EHCI_FRAMELIST_MAXCOUNT 1024
|
||||
#define EHCI_IPOLLRATES 8 /* Poll rates (1ms, 2, 4, 8 .. 128) */
|
||||
#define EHCI_INTRQHS ((1 << EHCI_IPOLLRATES) - 1)
|
||||
#define EHCI_IQHIDX(lev, pos) \
|
||||
((((pos) & ((1 << (lev)) - 1)) | (1 << (lev))) - 1)
|
||||
#define EHCI_ILEV_IVAL(lev) (1 << (lev))
|
||||
|
||||
|
||||
#define EHCI_HASH_SIZE 128
|
||||
#define EHCI_COMPANION_MAX 8
|
||||
|
|
@ -91,7 +104,11 @@ typedef struct ehci_softc {
|
|||
struct usbd_bus *sc_comps[EHCI_COMPANION_MAX];
|
||||
|
||||
usb_dma_t sc_fldma;
|
||||
ehci_link_t *sc_flist;
|
||||
u_int sc_flsize;
|
||||
u_int sc_rand; /* XXX need proper intr scheduling */
|
||||
|
||||
struct ehci_soft_islot sc_islots[EHCI_INTRQHS];
|
||||
|
||||
LIST_HEAD(, ehci_xfer) sc_intrhead;
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue