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Improve sub-type identification of the CVAX CPU, for later cache handling.

This commit is contained in:
ragge 1997-02-12 17:50:36 +00:00
parent 744438b408
commit 2bb5ceb3e0
3 changed files with 72 additions and 27 deletions
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10
sys/arch/vax/include/ka650.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: ka650.h,v 1.4 1996/05/19 16:43:20 ragge Exp $ */
/* $NetBSD: ka650.h,v 1.5 1997/02/12 17:50:36 ragge Exp $ */
/*
* Copyright (c) 1988 The Regents of the University of California.
* All rights reserved.
@ -234,6 +234,14 @@ struct ka650_ipcr {
#define KA650ROM_GETS 0x20060010 /* (jsb) read string with prompt */
#define KA650_CONSTYPE 0x20140401 /* byte at which console type resides */
/*
* Some useful macros
*/
#define GETCPUTYPE(x) ((x >> 24) & 0xff)
#define GETSYSSUBT(x) ((x >> 8) & 0xff)
#define GETFRMREV(x) ((x >> 16) & 0xff)
#define GETCODREV(x) (x & 0xff)
/* prototypes */
struct sbi_attach_args;

15
sys/arch/vax/include/sid.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: sid.h,v 1.8 1996/08/20 14:19:41 ragge Exp $ */
/* $NetBSD: sid.h,v 1.9 1997/02/12 17:50:38 ragge Exp $ */
/*
* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
@ -97,15 +97,22 @@
#define VAX_BTYP_650 0x0A000001 /* MicroVAX 3500, 3600 */
/* VAX_BTYP_65D 0x0A000001 VAXstation 3200, 3500 */
/* VAX_BTYP_640 0x0A000001 MicroVAX 3300, 3400 */
/* VAX_BTYP_655 0x0A000001 MicroVAX 3800, 3900 */
/* VAX_BTYP_65D 0x0A000001 VAXstation 3200, 3500 XXX */
/* VAX_BTYP_640 0x0A000001 MicroVAX 3300, 3400 XXX */
/* VAX_BTYP_655 0x0A000001 MicroVAX 3800, 3900 XXX */
#define VAX_BTYP_9CC 0x0A000002 /* VAX 6000 model 210/310 */
#define VAX_BTYP_60 0x0A000003 /* VAXstation 3520, 3540 */
#define VAX_BTYP_420 0x0A000004 /* VAXstation 3100 models 10 - 48 */
#define VAX_BTYP_510 0x0A000007 /* VAXft model 110 */
/* VAX_BTYP_520 0x0A000007 VAXft model 310 */
/*
* SID Extension register definitions for CVAX series
*/
#define VAX_SIE_KA640 0x2 /* KA640 MicroVAX 3300, 3400 */
#define VAX_SIE_KA650 0x1 /* KA650 MicroVAX 3500, 3600 */
#define VAX_SIE_KA655 0x3 /* KA655 MicroVAX 3800, 3900 */
/*
* Rigel chip series (1990)
*/

68
sys/arch/vax/vax/ka650.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: ka650.c,v 1.7 1997/01/11 11:31:57 ragge Exp $ */
/* $NetBSD: ka650.c,v 1.8 1997/02/12 17:50:40 ragge Exp $ */
/*
* Copyright (c) 1988 The Regents of the University of California.
* All rights reserved.
@ -54,6 +54,7 @@
#include <machine/psl.h>
#include <machine/mtpr.h>
#include <machine/nexus.h>
#include <machine/sid.h>
struct ka650_merr *ka650merr_ptr;
struct ka650_cbd *ka650cbd_ptr;
@ -62,8 +63,10 @@ struct ka650_ipcr *ka650ipcr_ptr;
int *KA650_CACHE_ptr;
static int subtyp;
void ka650encache __P((void));
void ka650discache __P((void));
#define CACHEOFF 0
#define CACHEON 1
void ka650setcache __P((int));
/*
* uvaxIII_conf() is called by cpu_attach to do the cpu_specific setup.
@ -74,14 +77,37 @@ uvaxIII_conf(parent, self, aux)
void *aux;
{
extern char cpu_model[];
int syssub = GETSYSSUBT(subtyp);
char *str;
/*
* There are lots of different MicroVAX III models, we should
* check which here. but that later...
* check which hereas there are some differences in the setup code
* that depends on this.
*/
strcpy(cpu_model,"MicroVAX III");
strcpy(cpu_model,"MicroVAX ");
switch (syssub) {
case VAX_SIE_KA640:
str = "3300/3400";
break;
case VAX_SIE_KA650:
str = "3500/3600";
break;
case VAX_SIE_KA655:
str = "3800/3900";
break;
default:
str = "III";
break;
}
strcat(cpu_model, str);
printf(": %s\n",cpu_model);
ka650encache();
printf("%s: CVAX microcode rev %d Firmware rev %d\n", self->dv_xname,
(vax_cpudata & 0xff), GETFRMREV(subtyp));
ka650setcache(CACHEON);
if (ctob(physmem) > ka650merr_ptr->merr_qbmbr) {
printf("physmem(0x%x) > qbmbr(0x%x)\n",
ctob(physmem), (int)ka650merr_ptr->merr_qbmbr);
@ -144,12 +170,12 @@ uvaxIII_memerr()
if (ka650cbd.cbd_cacr & CACR_CPE) {
printf("cache 2 tag parity error: ");
if (time.tv_sec - cache2tag < 7) {
ka650discache();
ka650setcache(CACHEOFF);
printf("cacheing disabled\n");
} else {
cache2tag = time.tv_sec;
printf("flushing cache\n");
ka650encache();
ka650setcache(CACHEON);
}
}
m = ka650merr.merr_errstat;
@ -234,11 +260,11 @@ uvaxIII_mchk(cmcf)
cdalerr = time.tv_sec;
}
if (time.tv_sec - i < 7) {
ka650discache();
ka650setcache(CACHEOFF);
printf(" parity error: cacheing disabled\n");
} else {
printf(" parity error: flushing cache\n");
ka650encache();
ka650setcache(CACHEON);
}
/*
* May be able to recover if type is 1-4, 0x80 or 0x81, but
@ -261,20 +287,24 @@ uvaxIII_mchk(cmcf)
* Enable 1st level cache too.
*/
void
ka650encache()
ka650setcache(state)
{
register int i;
ka650discache();
for (i = 0; i < (KA650_CACHESIZE / sizeof(KA650_CACHE_ptr[0])); i += 2)
/*
* Before doing anything, disable the cache.
*/
mtpr(0, PR_CADR);
ka650cbd_ptr->cbd_cacr = CACR_CPE;
/*
* Check what we want to do, enable or disable.
*/
if (state == CACHEON) {
for (i = 0; i < (KA650_CACHESIZE / sizeof(KA650_CACHE_ptr[0]));
i += 2)
KA650_CACHE_ptr[i] = 0;
ka650cbd_ptr->cbd_cacr = CACR_CEN;
mtpr(CADR_SEN2 | CADR_SEN1 | CADR_CENI | CADR_CEND, PR_CADR);
}
void
ka650discache()
{
mtpr(0, PR_CADR);
ka650cbd_ptr->cbd_cacr = CACR_CPE;
}