From 2b4d2c0c5864c195333bf88921840eb8f11dd862 Mon Sep 17 00:00:00 2001 From: dbj Date: Sat, 8 Jan 2000 12:38:27 +0000 Subject: [PATCH] add % to register names use cpp macros for all symbol access --- sys/arch/next68k/next68k/locore.s | 1317 ++++++++++++++--------------- 1 file changed, 651 insertions(+), 666 deletions(-) diff --git a/sys/arch/next68k/next68k/locore.s b/sys/arch/next68k/next68k/locore.s index 56db3ddaa274..c559db8d35ed 100644 --- a/sys/arch/next68k/next68k/locore.s +++ b/sys/arch/next68k/next68k/locore.s @@ -1,4 +1,4 @@ -/* $NetBSD: locore.s,v 1.20 1999/10/26 00:20:39 itohy Exp $ */ +/* $NetBSD: locore.s,v 1.21 2000/01/08 12:38:27 dbj Exp $ */ /* * Copyright (c) 1998 Darrin B. Jewell @@ -93,7 +93,7 @@ ASLOCAL(tmpstk) */ #define _RELOC(var, ar) \ lea var,ar; \ - addl a5,ar + addl %a5,ar #define RELOC(var, ar) _RELOC(_C_LABEL(var), ar) #define ASRELOC(var, ar) _RELOC(_ASM_LABEL(var), ar) @@ -119,61 +119,61 @@ BSS(lowram,4) BSS(esym,4) ASENTRY_NOPROFILE(start) - movw #PSL_HIGHIPL,sr | no interrupts + movw #PSL_HIGHIPL,%sr | no interrupts - movl #CACHE_OFF,d0 - movc d0,cacr | clear and disable on-chip cache(s) + movl #CACHE_OFF,%d0 + movc %d0,%cacr | clear and disable on-chip cache(s) - moveal #NEXT_RAMBASE,a5 | amount to RELOC by. + moveal #NEXT_RAMBASE,%a5 | amount to RELOC by. - RELOC(lowram,a0) | store base of memory. - movl a5,a0@ + RELOC(lowram,%a0) | store base of memory. + movl %a5,%a0@ - RELOC(esym, a0) + RELOC(esym, %a0) #if 1 | @@@ bootloader hack, - movel a5@,a4 | get this from base of mem. - movl a4,a0@ | store end of symbol table - clrl a5@ + movel %a5@,%a4 | get this from base of mem. + movl %a4,%a0@ | store end of symbol table + clrl %a5@ #else - clrl a0@ | no symbol table, yet + clrl %a0@ | no symbol table, yet #endif | Create a new stack at address tmpstk, and push | The existing sp onto it as an arg for next68k_bootargs. - ASRELOC(tmpstk, a0) - movel sp,a0@- - moveal a0,sp - moveal #0,a6 + ASRELOC(tmpstk, %a0) + movel %sp,%a0@- + moveal %a0,%sp + moveal #0,%a6 /* Read the header to get our segment list */ - RELOC(next68k_bootargs,a0) - jbsr a0@ | next68k_bootargs(args) - addqw #4,sp | clear arg from stack. + RELOC(next68k_bootargs,%a0) + jbsr %a0@ | next68k_bootargs(args) + addqw #4,%sp | clear arg from stack. /* * All data registers are now free. All address registers - * except a5 are free. a5 is used by the RELOC() macro on hp300 + * except %a5 are free. %a5 is used by the RELOC() macro on hp300 * and cannot be used until after the MMU is enabled. */ /* determine our CPU/MMU combo - check for all regardless of kernel config */ - movl #0x200,d0 | data freeze bit - movc d0,cacr | only exists on 68030 - movc cacr,d0 | read it back - tstl d0 | zero? + movl #0x200,%d0 | data freeze bit + movc %d0,%cacr | only exists on 68030 + movc %cacr,%d0 | read it back + tstl %d0 | zero? jeq Lnot68030 | yes, we have 68020/68040 /* * 68030 models */ - RELOC(mmutype, a0) | no, we have 68030 - movl #MMU_68030,a0@ | set to reflect 68030 PMMU - RELOC(cputype, a0) - movl #CPU_68030,a0@ | and 68030 CPU - RELOC(machineid, a0) - movl #30,a0@ | @@@ useless + RELOC(mmutype, %a0) | no, we have 68030 + movl #MMU_68030,%a0@ | set to reflect 68030 PMMU + RELOC(cputype, %a0) + movl #CPU_68030,%a0@ | and 68030 CPU + RELOC(machineid, %a0) + movl #30,%a0@ | @@@ useless jra Lstart1 /* @@ -181,30 +181,30 @@ ASENTRY_NOPROFILE(start) */ Lnot68030: - bset #31,d0 | data cache enable bit - movc d0,cacr | only exists on 68040 - movc cacr,d0 | read it back - tstl d0 | zero? + bset #31,%d0 | data cache enable bit + movc %d0,%cacr | only exists on 68040 + movc %cacr,%d0 | read it back + tstl %d0 | zero? beq Lis68020 | yes, we have 68020 - moveq #0,d0 | now turn it back off - movec d0,cacr | before we access any data + moveq #0,%d0 | now turn it back off + movec %d0,%cacr | before we access any data /* * 68040 models */ - RELOC(mmutype, a0) - movl #MMU_68040,a0@ | with a 68040 MMU - RELOC(cputype, a0) - movl #CPU_68040,a0@ | and a 68040 CPU - RELOC(fputype, a0) - movl #FPU_68040,a0@ | ...and FPU + RELOC(mmutype, %a0) + movl #MMU_68040,%a0@ | with a 68040 MMU + RELOC(cputype, %a0) + movl #CPU_68040,%a0@ | and a 68040 CPU + RELOC(fputype, %a0) + movl #FPU_68040,%a0@ | ...and FPU #if defined(ENABLE_HP_CODE) - RELOC(ectype, a0) - movl #EC_NONE,a0@ | and no cache (for now XXX) + RELOC(ectype, %a0) + movl #EC_NONE,%a0@ | and no cache (for now XXX) #endif - RELOC(machineid, a0) - movl #40,a0@ | @@@ useless + RELOC(machineid, %a0) + movl #40,%a0@ | @@@ useless jra Lstart1 /* @@ -217,14 +217,14 @@ Lnot68030: */ Lis68020: - RELOC(mmutype, a0) - movl #MMU_68851,a0@ | no, we have PMMU - RELOC(fputype, a0) | all of the 68020 systems - movl #FPU_68881,a0@ | have a 68881 FPU - RELOC(cputype, a0) - movl #CPU_68020,a0@ | and a 68020 CPU - RELOC(machineid, a0) - movl #20,a0@ | @@@ useless + RELOC(mmutype, %a0) + movl #MMU_68851,%a0@ | no, we have PMMU + RELOC(fputype, %a0) | all of the 68020 systems + movl #FPU_68881,%a0@ | have a 68881 FPU + RELOC(cputype, %a0) + movl #CPU_68020,%a0@ | and a 68020 CPU + RELOC(machineid, %a0) + movl #20,%a0@ | @@@ useless jra Lstart1 /* @@ -239,27 +239,27 @@ Lstart1: * vectab+8 bus error * vectab+12 address error */ - RELOC(cputype, a0) + RELOC(cputype, %a0) #if 0 /* XXX assembler/linker feature/bug */ - RELOC(vectab, a2) + RELOC(vectab, %a2) #else - movl #_C_LABEL(vectab),a2 - addl a5,a2 + movl #_C_LABEL(vectab),%a2 + addl %a5,%a2 #endif #if defined(M68040) - cmpl #CPU_68040,a0@ | 68040? + cmpl #CPU_68040,%a0@ | 68040? jne 1f | no, skip - movl #_C_LABEL(buserr40),a2@(8) - movl #_C_LABEL(addrerr4060),a2@(12) + movl #_C_LABEL(buserr40),%a2@(8) + movl #_C_LABEL(addrerr4060),%a2@(12) jra Lstart2 1: #endif #if defined(M68020) || defined(M68030) - cmpl #CPU_68040,a0@ | 68040? + cmpl #CPU_68040,%a0@ | 68040? jeq 1f | yes, skip - movl #_C_LABEL(busaddrerr2030),a2@(8) - movl #_C_LABEL(busaddrerr2030),a2@(12) + movl #_C_LABEL(busaddrerr2030),%a2@(8) + movl #_C_LABEL(busaddrerr2030),%a2@(12) jra Lstart2 1: #endif @@ -268,27 +268,27 @@ Lstart1: Lstart2: /* initialize source/destination control registers for movs */ - moveq #FC_USERD,d0 | user space - movc d0,sfc | as source - movc d0,dfc | and destination of transfers + moveq #FC_USERD,%d0 | user space + movc %d0,sfc | as source + movc %d0,dfc | and destination of transfers /* configure kernel and proc0 VA space so we can get going */ #ifdef DDB - RELOC(esym,a0) | end of static kernel test/data/syms - movl a0@,d5 + RELOC(esym,%a0) | end of static kernel test/data/syms + movl %a0@,%d5 jne Lstart3 #endif - movl #_C_LABEL(end),d5 | end of static kernel text/data + movl #_C_LABEL(end),%d5 | end of static kernel text/data Lstart3: - addl #NBPG-1,d5 - andl #PG_FRAME,d5 | round to a page - movl d5,a4 - addl a5,a4 | convert to PA - pea a5@ | firstpa - pea a4@ | nextpa - RELOC(pmap_bootstrap,a0) - jbsr a0@ | pmap_bootstrap(firstpa,nextpa) - addql #8,sp + addl #NBPG-1,%d5 + andl #PG_FRAME,%d5 | round to a page + movl %d5,%a4 + addl %a5,%a4 | convert to PA + pea %a5@ | firstpa + pea %a4@ | nextpa + RELOC(pmap_bootstrap,%a0) + jbsr %a0@ | pmap_bootstrap(firstpa,nextpa) + addql #8,%sp /* * Prepare to enable MMU. @@ -300,41 +300,41 @@ Lstart3: * * Is this all really necessary, or am I paranoid?? */ - RELOC(Sysseg, a0) | system segment table addr - movl a0@,d1 | read value (a KVA) - addl a5,d1 | convert to PA + RELOC(Sysseg, %a0) | system segment table addr + movl %a0@,%d1 | read value (a KVA) + addl %a5,%d1 | convert to PA - RELOC(mmutype, a0) + RELOC(mmutype, %a0) #if defined(ENABLE_HP_CODE) - tstl a0@ | HP MMU? + tstl %a0@ | HP MMU? jeq Lhpmmu2 | yes, skip #endif - cmpl #MMU_68040,a0@ | 68040? + cmpl #MMU_68040,%a0@ | 68040? jne Lmotommu1 | no, skip - .long 0x4e7b1807 | movc d1,srp + .long 0x4e7b1807 | movc %d1,%srp jra Lstploaddone Lmotommu1: - RELOC(protorp, a0) - movl #0x80000202,a0@ | nolimit + share global + 4 byte PTEs - movl d1,a0@(4) | + segtable address - pmove a0@,srp | load the supervisor root pointer - movl #0x80000002,a0@ | reinit upper half for CRP loads + RELOC(protorp, %a0) + movl #0x80000202,%a0@ | nolimit + share global + 4 byte PTEs + movl %d1,%a0@(4) | + segtable address + pmove %a0@,%srp | load the supervisor root pointer + movl #0x80000002,%a0@ | reinit upper half for CRP loads #if defined(ENABLE_HP_CODE) jra Lstploaddone | done Lhpmmu2: - moveq #PGSHIFT,d2 - lsrl d2,d1 | convert to page frame - movl d1,INTIOBASE+MMUBASE+MMUSSTP | load in sysseg table register + moveq #PGSHIFT,%d2 + lsrl %d2,%d1 | convert to page frame + movl %d1,INTIOBASE+MMUBASE+MMUSSTP | load in sysseg table register #endif Lstploaddone: #ifdef defined(ENABLE_MAXADDR_TRAMPOLINE) - lea MAXADDR,a2 | PA of last RAM page - ASRELOC(Lhighcode, a1) | addr of high code - ASRELOC(Lehighcode, a3) | end addr + lea MAXADDR,%a2 | PA of last RAM page + ASRELOC(Lhighcode, %a1) | addr of high code + ASRELOC(Lehighcode, %a3) | end addr Lcodecopy: - movw a1@+,a2@+ | copy a word - cmpl a3,a1 | done yet? + movw %a1@+,%a2@+ | copy a word + cmpl %a3,%a1 | done yet? jcs Lcodecopy | no, keep going jmp MAXADDR | go for it! /* @@ -350,18 +350,18 @@ Lhighcode: * Set up the vector table, and race to get the MMU * enabled. */ - movc vbr,d0 | Keep copy of ROM VBR - ASRELOC(save_vbr,a0) - movl d0,a0@ - movl #_C_LABEL(vectab),d0 | set Vector Base Register - movc d0,vbr + movc vbr,%d0 | Keep copy of ROM VBR + ASRELOC(save_vbr,%a0) + movl %d0,%a0@ + movl #_C_LABEL(vectab),%d0 | set Vector Base Register + movc %d0,vbr - RELOC(mmutype, a0) + RELOC(mmutype, %a0) #if defined(ENABLE_HP_CODE) - tstl a0@ | HP MMU? + tstl %a0@ | HP MMU? jeq Lhpmmu3 | yes, skip #endif - cmpl #MMU_68040,a0@ | 68040? + cmpl #MMU_68040,%a0@ | 68040? jne Lmotommu2 | no, skip #if defined(ENABLE_HP_CODE) movw #0,INTIOBASE+MMUBASE+MMUCMD+2 @@ -372,36 +372,36 @@ Lhighcode: | This is a hack to get PA=KVA when turning on MMU | it will only work on 68040's. We should fix something | to boot 68030's later. - movel #0x0200c040,d0 | intio devices are at 0x02000000 - .long 0x4e7b0004 | movc d0,itt0 - .long 0x4e7b0006 | movc d0,dtt0 - movel #0x0403c000,d0 | kernel text and data at 0x04000000 - .long 0x4e7b0005 | movc d0,itt1 - .long 0x4e7b0007 | movc d0,dtt1 + movel #0x0200c040,%d0 | intio devices are at 0x02000000 + .long 0x4e7b0004 | movc %d0,%itt0 + .long 0x4e7b0006 | movc %d0,%dtt0 + movel #0x0403c000,%d0 | kernel text and data at 0x04000000 + .long 0x4e7b0005 | movc %d0,%itt1 + .long 0x4e7b0007 | movc %d0,%dtt1 .word 0xf4d8 | cinva bc .word 0xf518 | pflusha - movl #0x8000,d0 - .long 0x4e7b0003 | movc d0,tc - movl #0x80008000,d0 - movc d0,cacr | turn on both caches + movl #0x8000,%d0 + .long 0x4e7b0003 | movc %d0,tc + movl #0x80008000,%d0 + movc %d0,%cacr | turn on both caches jmp Lturnoffttr | global jump into mapped memory. Lturnoffttr: - moveq #0,d0 | ensure TT regs are disabled - .long 0x4e7b0004 | movc d0,itt0 - .long 0x4e7b0006 | movc d0,dtt0 - .long 0x4e7b0005 | movc d0,itt1 - .long 0x4e7b0007 | movc d0,dtt1 + moveq #0,%d0 | ensure TT regs are disabled + .long 0x4e7b0004 | movc %d0,%itt0 + .long 0x4e7b0006 | movc %d0,%dtt0 + .long 0x4e7b0005 | movc %d0,%itt1 + .long 0x4e7b0007 | movc %d0,%dtt1 jmp Lenab1 Lmotommu2: #if defined(ENABLE_HP_CODE) movl #MMU_IEN+MMU_FPE,INTIOBASE+MMUBASE+MMUCMD | enable 68881 and i-cache #endif - RELOC(prototc, a2) - movl #0x82c0aa00,a2@ | value to load TC with - pmove a2@,tc | load it + RELOC(prototc, %a2) + movl #0x82c0aa00,%a2@ | value to load TC with + pmove %a2@,tc | load it jmp Lenab1 #if defined(ENABLE_HP_CODE) Lhpmmu3: @@ -413,7 +413,7 @@ Lhpmmu3: Lehighcode: /* - * END MMU TRAMPOLINE. Address register a5 is now free. + * END MMU TRAMPOLINE. Address register %a5 is now free. */ #endif @@ -422,39 +422,39 @@ Lehighcode: */ Lenab1: /* select the software page size now */ - lea _ASM_LABEL(tmpstk),sp | temporary stack + lea _ASM_LABEL(tmpstk),%sp | temporary stack jbsr _C_LABEL(uvm_setpagesize) | select software page size bsr Lpushpc | Push the PC on the stack. Lpushpc: -/* set kernel stack, user SP, and initial pcb */ - movl _C_LABEL(proc0paddr),a1 | get proc0 pcb addr - lea a1@(USPACE-4),sp | set kernel stack to end of area - lea _C_LABEL(proc0),a2 | initialize proc0.p_addr so that - movl a1,a2@(P_ADDR) | we don't deref NULL in trap() - movl #USRSTACK-4,a2 - movl a2,usp | init user SP - movl a1,_C_LABEL(curpcb) | proc0 is running +/* set kernel stack, user %SP, and initial pcb */ + movl _C_LABEL(proc0paddr),%a1 | get proc0 pcb addr + lea %a1@(USPACE-4),%sp | set kernel stack to end of area + lea _C_LABEL(proc0),%a2 | initialize proc0.p_addr so that + movl %a1,%a2@(P_ADDR) | we don't deref NULL in trap() + movl #USRSTACK-4,%a2 + movl %a2,%usp | init user SP + movl %a1,_C_LABEL(curpcb) | proc0 is running tstl _C_LABEL(fputype) | Have an FPU? jeq Lenab2 | No, skip. - clrl a1@(PCB_FPCTX) | ensure null FP context - movl a1,sp@- - jbsr _C_LABEL(m68881_restore) | restore it (does not kill a1) - addql #4,sp + clrl %a1@(PCB_FPCTX) | ensure null FP context + movl %a1,%sp@- + jbsr _C_LABEL(m68881_restore) | restore it (does not kill %a1) + addql #4,%sp Lenab2: /* flush TLB and turn on caches */ jbsr _C_LABEL(_TBIA) | invalidate TLB cmpl #MMU_68040,_C_LABEL(mmutype) | 68040? jeq Lnocache0 | yes, cache already on - movl #CACHE_ON,d0 - movc d0,cacr | clear cache(s) + movl #CACHE_ON,%d0 + movc %d0,%cacr | clear cache(s) #if defined(ENABLE_HP_CODE) tstl _C_LABEL(ectype) jeq Lnocache0 - MMUADDR(a0) - orl #MMU_CEN,a0@(MMUCMD) | turn on external cache + MMUADDR(%a0) + orl #MMU_CEN,%a0@(MMUCMD) | turn on external cache #endif Lnocache0: @@ -466,30 +466,30 @@ Lnocache0: * main() nevers returns; we exit to user mode from a forked process * later on. */ - clrw sp@- | vector offset/frame type - clrl sp@- | PC - filled in by "execve" - movw #PSL_USER,sp@- | in user mode - clrl sp@- | stack adjust count and padding - lea sp@(-64),sp | construct space for D0-D7/A0-A7 - lea _C_LABEL(proc0),a0 | save pointer to frame - movl sp,a0@(P_MD_REGS) | in proc0.p_md.md_regs + clrw %sp@- | vector offset/frame type + clrl %sp@- | PC - filled in by "execve" + movw #PSL_USER,%sp@- | in user mode + clrl %sp@- | stack adjust count and padding + lea %sp@(-64),%sp | construct space for %D0-%D7/%A0-%A7 + lea _C_LABEL(proc0),%a0 | save pointer to frame + movl %sp,%a0@(P_MD_REGS) | in proc0.p_md.md_regs jra _C_LABEL(main) | main() PANIC("main() returned") /* NOTREACHED */ /* - * proc_trampoline: call function in register a2 with a3 as an arg + * proc_trampoline: call function in register %a2 with %a3 as an arg * and then rei. */ GLOBAL(proc_trampoline) - movl a3,sp@- | push function arg - jbsr a2@ | call function - addql #4,sp | pop arg - movl sp@(FR_SP),a0 | grab and load - movl a0,usp | user SP - moveml sp@+,#0x7FFF | restore most user regs - addql #8,sp | toss SP and stack adjust + movl %a3,%sp@- | push function arg + jbsr %a2@ | call function + addql #4,%sp | pop arg + movl %sp@(FR_SP),%a0 | grab and load + movl %a0,%usp | user SP + moveml %sp@+,#0x7FFF | restore most user regs + addql #8,%sp | toss SP and stack adjust jra _ASM_LABEL(rei) | and return @@ -504,193 +504,193 @@ GLOBAL(m68k_fault_addr) #if defined(M68040) || defined(M68060) ENTRY_NOPROFILE(addrerr4060) - clrl sp@- | stack adjust count - moveml #0xFFFF,sp@- | save user registers - movl usp,a0 | save the user SP - movl a0,sp@(FR_SP) | in the savearea - movl sp@(FR_HW+8),sp@- - clrl sp@- | dummy code - movl #T_ADDRERR,sp@- | mark address error + clrl %sp@- | stack adjust count + moveml #0xFFFF,%sp@- | save user registers + movl %usp,%a0 | save the user SP + movl %a0,%sp@(FR_SP) | in the savearea + movl %sp@(FR_HW+8),%sp@- + clrl %sp@- | dummy code + movl #T_ADDRERR,%sp@- | mark address error jra _ASM_LABEL(faultstkadj) | and deal with it #endif #if defined(M68060) ENTRY_NOPROFILE(buserr60) - clrl sp@- | stack adjust count - moveml #0xFFFF,sp@- | save user registers - movl usp,a0 | save the user SP - movl a0,sp@(FR_SP) | in the savearea - movel sp@(FR_HW+12),d0 | FSLW - btst #2,d0 | branch prediction error? + clrl %sp@- | stack adjust count + moveml #0xFFFF,%sp@- | save user registers + movl %usp,%a0 | save the user SP + movl %a0,%sp@(FR_SP) | in the savearea + movel %sp@(FR_HW+12),%d0 | FSLW + btst #2,%d0 | branch prediction error? jeq Lnobpe - movc cacr,d2 - orl #IC60_CABC,d2 | clear all branch cache entries - movc d2,cacr - movl d0,d1 + movc %cacr,%d2 + orl #IC60_CABC,%d2 | clear all branch cache entries + movc %d2,%cacr + movl %d0,%d1 addql #1,L60bpe - andl #0x7ffd,d1 + andl #0x7ffd,%d1 jeq _ASM_LABEL(faultstkadjnotrap2) Lnobpe: | we need to adjust for misaligned addresses - movl sp@(FR_HW+8),d1 | grab VA - btst #27,d0 | check for mis-aligned access + movl %sp@(FR_HW+8),%d1 | grab VA + btst #27,%d0 | check for mis-aligned access jeq Lberr3 | no, skip - addl #28,d1 | yes, get into next page + addl #28,%d1 | yes, get into next page | operand case: 3, | instruction case: 4+12+12 - andl #PG_FRAME,d1 | and truncate + andl #PG_FRAME,%d1 | and truncate Lberr3: - movl d1,sp@- - movl d0,sp@- | code is FSLW now. - andw #0x1f80,d0 + movl %d1,%sp@- + movl %d0,%sp@- | code is FSLW now. + andw #0x1f80,%d0 jeq Lberr60 | it is a bus error - movl #T_MMUFLT,sp@- | show that we are an MMU fault + movl #T_MMUFLT,%sp@- | show that we are an MMU fault jra _ASM_LABEL(faultstkadj) | and deal with it Lberr60: tstl _C_LABEL(nofault) | catch bus error? jeq Lisberr | no, handle as usual - movl sp@(FR_HW+8+8),_C_LABEL(m68k_fault_addr) | save fault addr - movl _C_LABEL(nofault),sp@- | yes, + movl %sp@(FR_HW+8+8),_C_LABEL(m68k_fault_addr) | save fault addr + movl _C_LABEL(nofault),%sp@- | yes, jbsr _C_LABEL(longjmp) | longjmp(nofault) /* NOTREACHED */ #endif #if defined(M68040) ENTRY_NOPROFILE(buserr40) - clrl sp@- | stack adjust count - moveml #0xFFFF,sp@- | save user registers - movl usp,a0 | save the user SP - movl a0,sp@(FR_SP) | in the savearea - movl sp@(FR_HW+20),d1 | get fault address - moveq #0,d0 - movw sp@(FR_HW+12),d0 | get SSW - btst #11,d0 | check for mis-aligned + clrl %sp@- | stack adjust count + moveml #0xFFFF,%sp@- | save user registers + movl %usp,%a0 | save the user SP + movl %a0,%sp@(FR_SP) | in the savearea + movl %sp@(FR_HW+20),%d1 | get fault address + moveq #0,%d0 + movw %sp@(FR_HW+12),%d0 | get SSW + btst #11,%d0 | check for mis-aligned jeq Lbe1stpg | no skip - addl #3,d1 | get into next page - andl #PG_FRAME,d1 | and truncate + addl #3,%d1 | get into next page + andl #PG_FRAME,%d1 | and truncate Lbe1stpg: - movl d1,sp@- | pass fault address. - movl d0,sp@- | pass SSW as code - btst #10,d0 | test ATC + movl %d1,%sp@- | pass fault address. + movl %d0,%sp@- | pass SSW as code + btst #10,%d0 | test ATC jeq Lberr40 | it is a bus error - movl #T_MMUFLT,sp@- | show that we are an MMU fault + movl #T_MMUFLT,%sp@- | show that we are an MMU fault jra _ASM_LABEL(faultstkadj) | and deal with it Lberr40: tstl _C_LABEL(nofault) | catch bus error? jeq Lisberr | no, handle as usual - movl sp@(FR_HW+8+20),_C_LABEL(m68k_fault_addr) | save fault addr - movl _C_LABEL(nofault),sp@- | yes, + movl %sp@(FR_HW+8+20),_C_LABEL(m68k_fault_addr) | save fault addr + movl _C_LABEL(nofault),%sp@- | yes, jbsr _C_LABEL(longjmp) | longjmp(nofault) /* NOTREACHED */ #endif #if defined(M68020) || defined(M68030) ENTRY_NOPROFILE(busaddrerr2030) - clrl sp@- | stack adjust count - moveml #0xFFFF,sp@- | save user registers - movl usp,a0 | save the user SP - movl a0,sp@(FR_SP) | in the savearea - moveq #0,d0 - movw sp@(FR_HW+10),d0 | grab SSW for fault processing - btst #12,d0 | RB set? + clrl %sp@- | stack adjust count + moveml #0xFFFF,%sp@- | save user registers + movl %usp,%a0 | save the user SP + movl %a0,%sp@(FR_SP) | in the savearea + moveq #0,%d0 + movw %sp@(FR_HW+10),%d0 | grab SSW for fault processing + btst #12,%d0 | RB set? jeq LbeX0 | no, test RC - bset #14,d0 | yes, must set FB - movw d0,sp@(FR_HW+10) | for hardware too + bset #14,%d0 | yes, must set FB + movw %d0,%sp@(FR_HW+10) | for hardware too LbeX0: - btst #13,d0 | RC set? + btst #13,%d0 | RC set? jeq LbeX1 | no, skip - bset #15,d0 | yes, must set FC - movw d0,sp@(FR_HW+10) | for hardware too + bset #15,%d0 | yes, must set FC + movw %d0,%sp@(FR_HW+10) | for hardware too LbeX1: - btst #8,d0 | data fault? + btst #8,%d0 | data fault? jeq Lbe0 | no, check for hard cases - movl sp@(FR_HW+16),d1 | fault address is as given in frame + movl %sp@(FR_HW+16),%d1 | fault address is as given in frame jra Lbe10 | thats it Lbe0: - btst #4,sp@(FR_HW+6) | long (type B) stack frame? + btst #4,%sp@(FR_HW+6) | long (type B) stack frame? jne Lbe4 | yes, go handle - movl sp@(FR_HW+2),d1 | no, can use save PC - btst #14,d0 | FB set? + movl %sp@(FR_HW+2),%d1 | no, can use save PC + btst #14,%d0 | FB set? jeq Lbe3 | no, try FC - addql #4,d1 | yes, adjust address + addql #4,%d1 | yes, adjust address jra Lbe10 | done Lbe3: - btst #15,d0 | FC set? + btst #15,%d0 | FC set? jeq Lbe10 | no, done - addql #2,d1 | yes, adjust address + addql #2,%d1 | yes, adjust address jra Lbe10 | done Lbe4: - movl sp@(FR_HW+36),d1 | long format, use stage B address - btst #15,d0 | FC set? + movl %sp@(FR_HW+36),%d1 | long format, use stage B address + btst #15,%d0 | FC set? jeq Lbe10 | no, all done - subql #2,d1 | yes, adjust address + subql #2,%d1 | yes, adjust address Lbe10: - movl d1,sp@- | push fault VA - movl d0,sp@- | and padded SSW - movw sp@(FR_HW+8+6),d0 | get frame format/vector offset - andw #0x0FFF,d0 | clear out frame format - cmpw #12,d0 | address error vector? + movl %d1,%sp@- | push fault VA + movl %d0,%sp@- | and padded SSW + movw %sp@(FR_HW+8+6),%d0 | get frame format/vector offset + andw #0x0FFF,%d0 | clear out frame format + cmpw #12,%d0 | address error vector? jeq Lisaerr | yes, go to it #if defined(M68K_MMU_MOTOROLA) #if defined(M68K_MMU_HP) tstl _C_LABEL(mmutype) | HP MMU? jeq Lbehpmmu | yes, different MMU fault handler #endif - movl d1,a0 | fault address - movl sp@,d0 | function code from ssw - btst #8,d0 | data fault? + movl %d1,%a0 | fault address + movl %sp@,%d0 | function code from ssw + btst #8,%d0 | data fault? jne Lbe10a - movql #1,d0 | user program access FC + movql #1,%d0 | user program access FC | (we dont seperate data/program) - btst #5,sp@(FR_HW+8) | supervisor mode? + btst #5,%sp@(FR_HW+8) | supervisor mode? jeq Lbe10a | if no, done - movql #5,d0 | else supervisor program access + movql #5,%d0 | else supervisor program access Lbe10a: - ptestr d0,a0@,#7 | do a table search - pmove psr,sp@ | save result - movb sp@,d1 - btst #2,d1 | invalid (incl. limit viol. and berr)? + ptestr %d0,%a0@,#7 | do a table search + pmove psr,%sp@ | save result + movb %sp@,%d1 + btst #2,%d1 | invalid (incl. limit viol. and berr)? jeq Lmightnotbemerr | no -> wp check - btst #7,d1 | is it MMU table berr? + btst #7,%d1 | is it MMU table berr? jne Lisberr1 | yes, needs not be fast. #endif /* M68K_MMU_MOTOROLA */ Lismerr: - movl #T_MMUFLT,sp@- | show that we are an MMU fault + movl #T_MMUFLT,%sp@- | show that we are an MMU fault jra _ASM_LABEL(faultstkadj) | and deal with it #if defined(M68K_MMU_MOTOROLA) Lmightnotbemerr: - btst #3,d1 | write protect bit set? + btst #3,%d1 | write protect bit set? jeq Lisberr1 | no: must be bus error - movl sp@,d0 | ssw into low word of d0 - andw #0xc0,d0 | Write protect is set on page: - cmpw #0x40,d0 | was it read cycle? + movl %sp@,%d0 | ssw into low word of %d0 + andw #0xc0,%d0 | Write protect is set on page: + cmpw #0x40,%d0 | was it read cycle? jne Lismerr | no, was not WPE, must be MMU fault jra Lisberr1 | real bus err needs not be fast. #endif /* M68K_MMU_MOTOROLA */ #if defined(M68K_MMU_HP) Lbehpmmu: - MMUADDR(a0) - movl a0@(MMUSTAT),d0 | read MMU status - btst #3,d0 | MMU fault? + MMUADDR(%a0) + movl %a0@(MMUSTAT),%d0 | read MMU status + btst #3,%d0 | MMU fault? jeq Lisberr1 | no, just a non-MMU bus error - andl #~MMU_FAULT,a0@(MMUSTAT)| yes, clear fault bits - movw d0,sp@ | pass MMU stat in upper half of code + andl #~MMU_FAULT,%a0@(MMUSTAT)| yes, clear fault bits + movw %d0,%sp@ | pass MMU stat in upper half of code jra Lismerr | and handle it #endif Lisaerr: - movl #T_ADDRERR,sp@- | mark address error + movl #T_ADDRERR,%sp@- | mark address error jra _ASM_LABEL(faultstkadj) | and deal with it Lisberr1: - clrw sp@ | re-clear pad word + clrw %sp@ | re-clear pad word tstl _C_LABEL(nofault) | catch bus error? jeq Lisberr | no, handle as usual - movl sp@(FR_HW+8+16),_C_LABEL(m68k_fault_addr) | save fault addr - movl _C_LABEL(nofault),sp@- | yes, + movl %sp@(FR_HW+8+16),_C_LABEL(m68k_fault_addr) | save fault addr + movl _C_LABEL(nofault),%sp@- | yes, jbsr _C_LABEL(longjmp) | longjmp(nofault) /* NOTREACHED */ #endif /* M68020 || M68030 */ Lisberr: | also used by M68040/60 - movl #T_BUSERR,sp@- | mark bus error + movl #T_BUSERR,%sp@- | mark bus error jra _ASM_LABEL(faultstkadj) | and deal with it /* @@ -700,7 +700,7 @@ ENTRY_NOPROFILE(fpfline) #if defined(M68040) cmpl #FPU_68040,_C_LABEL(fputype) | 68040 FPU? jne Lfp_unimp | no, skip FPSP - cmpw #0x202c,sp@(6) | format type 2? + cmpw #0x202c,%sp@(6) | format type 2? jne _C_LABEL(illinst) | no, not an FP emulation Ldofp_unimp: #ifdef FPSP @@ -709,9 +709,9 @@ Ldofp_unimp: Lfp_unimp: #endif /* M68040 */ #ifdef FPU_EMULATE - clrl sp@- | stack adjust count - moveml #0xFFFF,sp@- | save registers - moveq #T_FPEMULI,d0 | denote as FP emulation trap + clrl %sp@- | stack adjust count + moveml #0xFFFF,%sp@- | save registers + moveq #T_FPEMULI,%d0 | denote as FP emulation trap jra _ASM_LABEL(fault) | do it #else jra _C_LABEL(illinst) @@ -727,9 +727,9 @@ ENTRY_NOPROFILE(fpunsupp) Lfp_unsupp: #endif /* M68040 */ #ifdef FPU_EMULATE - clrl sp@- | stack adjust count - moveml #0xFFFF,sp@- | save registers - moveq #T_FPEMULD,d0 | denote as FP emulation trap + clrl %sp@- | stack adjust count + moveml #0xFFFF,%sp@- | save registers + moveq #T_FPEMULD,%d0 | denote as FP emulation trap jra _ASM_LABEL(fault) | do it #else jra _C_LABEL(illinst) @@ -742,28 +742,28 @@ Lfp_unsupp: * after the trap call. */ ENTRY_NOPROFILE(fpfault) - clrl sp@- | stack adjust count - moveml #0xFFFF,sp@- | save user registers - movl usp,a0 | and save - movl a0,sp@(FR_SP) | the user stack pointer - clrl sp@- | no VA arg - movl _C_LABEL(curpcb),a0 | current pcb - lea a0@(PCB_FPCTX),a0 | address of FP savearea - fsave a0@ | save state + clrl %sp@- | stack adjust count + moveml #0xFFFF,%sp@- | save user registers + movl %usp,%a0 | and save + movl %a0,%sp@(FR_SP) | the user stack pointer + clrl %sp@- | no VA arg + movl _C_LABEL(curpcb),%a0 | current pcb + lea %a0@(PCB_FPCTX),%a0 | address of FP savearea + fsave %a0@ | save state #if defined(M68040) || defined(M68060) /* always null state frame on 68040, 68060 */ cmpl #FPU_68040,_C_LABEL(fputype) jle Lfptnull #endif - tstb a0@ | null state frame? + tstb %a0@ | null state frame? jeq Lfptnull | yes, safe - clrw d0 | no, need to tweak BIU - movb a0@(1),d0 | get frame size - bset #3,a0@(0,d0:w) | set exc_pend bit of BIU + clrw %d0 | no, need to tweak BIU + movb %a0@(1),%d0 | get frame size + bset #3,%a0@(0,%d0:w) | set exc_pend bit of BIU Lfptnull: - fmovem fpsr,sp@- | push fpsr as code argument - frestore a0@ | restore state - movl #T_FPERR,sp@- | push type arg + fmovem %fpsr,%sp@- | push %fpsr as code argument + frestore %a0@ | restore state + movl #T_FPERR,%sp@- | push type arg jra _ASM_LABEL(faultstkadj) | call trap and deal with stack cleanup /* @@ -772,49 +772,49 @@ Lfptnull: */ ENTRY_NOPROFILE(badtrap) - moveml #0xC0C0,sp@- | save scratch regs - movw sp@(22),sp@- | push exception vector info - clrw sp@- - movl sp@(22),sp@- | and PC + moveml #0xC0C0,%sp@- | save scratch regs + movw %sp@(22),%sp@- | push exception vector info + clrw %sp@- + movl %sp@(22),%sp@- | and PC jbsr _C_LABEL(straytrap) | report - addql #8,sp | pop args - moveml sp@+,#0x0303 | restore regs + addql #8,%sp | pop args + moveml %sp@+,#0x0303 | restore regs jra _ASM_LABEL(rei) | all done ENTRY_NOPROFILE(trap0) - clrl sp@- | stack adjust count - moveml #0xFFFF,sp@- | save user registers - movl usp,a0 | save the user SP - movl a0,sp@(FR_SP) | in the savearea - movl d0,sp@- | push syscall number + clrl %sp@- | stack adjust count + moveml #0xFFFF,%sp@- | save user registers + movl %usp,%a0 | save the user SP + movl %a0,%sp@(FR_SP) | in the savearea + movl %d0,%sp@- | push syscall number jbsr _C_LABEL(syscall) | handle it - addql #4,sp | pop syscall arg + addql #4,%sp | pop syscall arg tstl _C_LABEL(astpending) jne Lrei2 tstb _C_LABEL(ssir) jeq Ltrap1 - movw #SPL1,sr + movw #SPL1,%sr tstb _C_LABEL(ssir) jne Lsir1 Ltrap1: - movl sp@(FR_SP),a0 | grab and restore - movl a0,usp | user SP - moveml sp@+,#0x7FFF | restore most registers - addql #8,sp | pop SP and stack adjust + movl %sp@(FR_SP),%a0 | grab and restore + movl %a0,%usp | user SP + moveml %sp@+,#0x7FFF | restore most registers + addql #8,%sp | pop SP and stack adjust rte /* * Trap 12 is the entry point for the cachectl "syscall" (both HPUX & BSD) * cachectl(command, addr, length) - * command in d0, addr in a1, length in d1 + * command in %d0, addr in %a1, length in %d1 */ ENTRY_NOPROFILE(trap12) - movl _C_LABEL(curproc),sp@- | push curproc pointer - movl d1,sp@- | push length - movl a1,sp@- | push addr - movl d0,sp@- | push command + movl _C_LABEL(curproc),%sp@- | push curproc pointer + movl %d1,%sp@- | push length + movl %a1,%sp@- | push addr + movl %d0,%sp@- | push command jbsr _C_LABEL(cachectl1) | do it - lea sp@(16),sp | pop args + lea %sp@(16),%sp | pop args jra _ASM_LABEL(rei) | all done /* @@ -822,9 +822,9 @@ ENTRY_NOPROFILE(trap12) * User mode traps are simply passed on to trap(). */ ENTRY_NOPROFILE(trace) - clrl sp@- | stack adjust count - moveml #0xFFFF,sp@- - moveq #T_TRACE,d0 + clrl %sp@- | stack adjust count + moveml #0xFFFF,%sp@- + moveq #T_TRACE,%d0 | Check PSW and see what happen. | T=0 S=0 (should not happen) @@ -832,9 +832,9 @@ ENTRY_NOPROFILE(trace) | T=0 S=1 trace trap on a trap instruction | T=1 S=1 trace trap from system mode (kernel breakpoint) - movw sp@(FR_HW),d1 | get PSW - notw d1 | XXX no support for T0 on 680[234]0 - andw #PSL_TS,d1 | from system mode (T=1, S=1)? + movw %sp@(FR_HW),%d1 | get PSW + notw %d1 | XXX no support for T0 on 680[234]0 + andw #PSL_TS,%d1 | from system mode (T=1, S=1)? jeq Lkbrkpt | yes, kernel breakpoint jra _ASM_LABEL(fault) | no, user-mode fault @@ -846,33 +846,33 @@ ENTRY_NOPROFILE(trace) * User mode traps are simply passed to trap(). */ ENTRY_NOPROFILE(trap15) - clrl sp@- | stack adjust count - moveml #0xFFFF,sp@- - moveq #T_TRAP15,d0 - movw sp@(FR_HW),d1 | get PSW - andw #PSL_S,d1 | from system mode? + clrl %sp@- | stack adjust count + moveml #0xFFFF,%sp@- + moveq #T_TRAP15,%d0 + movw %sp@(FR_HW),%d1 | get PSW + andw #PSL_S,%d1 | from system mode? jne Lkbrkpt | yes, kernel breakpoint jra _ASM_LABEL(fault) | no, user-mode fault -Lkbrkpt: | Kernel-mode breakpoint or trace trap. (d0=trap_type) - | Save the system sp rather than the user sp. - movw #PSL_HIGHIPL,sr | lock out interrupts - lea sp@(FR_SIZE),a6 | Save stack pointer - movl a6,sp@(FR_SP) | from before trap +Lkbrkpt: | Kernel-mode breakpoint or trace trap. (%d0=trap_type) + | Save the system %sp rather than the user %sp. + movw #PSL_HIGHIPL,%sr | lock out interrupts + lea %sp@(FR_SIZE),%a6 | Save stack pointer + movl %a6,%sp@(FR_SP) | from before trap | If were are not on tmpstk switch to it. | (so debugger can change the stack pointer) - movl a6,d1 - cmpl #_ASM_LABEL(tmpstk),d1 + movl %a6,%d1 + cmpl #_ASM_LABEL(tmpstk),%d1 jls Lbrkpt2 | already on tmpstk | Copy frame to the temporary stack - movl sp,a0 | a0=src - lea _ASM_LABEL(tmpstk)-96,a1 | a1=dst - movl a1,sp | sp=new frame - moveq #FR_SIZE,d1 + movl %sp,%a0 | %a0=src + lea _ASM_LABEL(tmpstk)-96,%a1 | %a1=dst + movl %a1,%sp | %sp=new frame + moveq #FR_SIZE,%d1 Lbrkpt1: - movl a0@+,a1@+ - subql #4,d1 + movl %a0@+,%a1@+ + subql #4,%d1 bgt Lbrkpt1 Lbrkpt2: @@ -882,26 +882,26 @@ Lbrkpt2: | the trap type is either T_TRACE or T_BREAKPOINT. | If we have both DDB and KGDB, let KGDB see it first, | because KGDB will just return 0 if not connected. - | Save args in d2, a2 - movl d0,d2 | trap type - movl sp,a2 | frame ptr + | Save args in %d2, %a2 + movl %d0,%d2 | trap type + movl %sp,%a2 | frame ptr #ifdef KGDB | Let KGDB handle it (if connected) - movl a2,sp@- | push frame ptr - movl d2,sp@- | push trap type + movl %a2,%sp@- | push frame ptr + movl %d2,%sp@- | push trap type jbsr _C_LABEL(kgdb_trap) | handle the trap - addql #8,sp | pop args - cmpl #0,d0 | did kgdb handle it? + addql #8,%sp | pop args + cmpl #0,%d0 | did kgdb handle it? jne Lbrkpt3 | yes, done #endif #ifdef DDB | Let DDB handle it - movl a2,sp@- | push frame ptr - movl d2,sp@- | push trap type + movl %a2,%sp@- | push frame ptr + movl %d2,%sp@- | push trap type jbsr _C_LABEL(kdb_trap) | handle the trap - addql #8,sp | pop args + addql #8,%sp | pop args #if 0 /* not needed on hp300 */ - cmpl #0,d0 | did ddb handle it? + cmpl #0,%d0 | did ddb handle it? jne Lbrkpt3 | yes, done #endif #endif @@ -909,16 +909,16 @@ Lbrkpt2: Lbrkpt3: | The stack pointer may have been modified, or | data below it modified (by kgdb push call), - | so push the hardware frame at the current sp + | so push the hardware frame at the current %sp | before restoring registers and returning. - movl sp@(FR_SP),a0 | modified sp - lea sp@(FR_SIZE),a1 | end of our frame - movl a1@-,a0@- | copy 2 longs with - movl a1@-,a0@- | ... predecrement - movl a0,sp@(FR_SP) | sp = h/w frame - moveml sp@+,#0x7FFF | restore all but sp - movl sp@,sp | ... and sp + movl %sp@(FR_SP),%a0 | modified %sp + lea %sp@(FR_SIZE),%a1 | end of our frame + movl %a1@-,%a0@- | copy 2 longs with + movl %a1@-,%a0@- | ... predecrement + movl %a0,%sp@(FR_SP) | %sp = h/w frame + moveml %sp@+,#0x7FFF | restore all but %sp + movl %sp@,%sp | ... and %sp rte | all done /* Use common m68k sigreturn */ @@ -944,62 +944,47 @@ Lbrkpt3: #define INTERRUPT_SAVEREG moveml #0xC0C0,sp@- #define INTERRUPT_RESTOREREG moveml sp@+,#0x0303 - .globl _isrdispatch_autovec - .globl _isrdispatch_vectored +ENTRY_NOPROFILE(spurintr) /* Level 0 */ + addql #1,_C_LABEL(intrcnt)+0 + addql #1,_C_LABEL(uvmexp)+UVMEXP_INTRS + jra _ASM_LABEL(rei) -_spurintr: /* Level 0 */ - addql #1,_intrcnt+0 - addql #1,_uvmexp+UVMEXP_INTRS - jra rei - -_intrhand_autovec: /* Levels 1 through 6 */ -#if 0 - INTERRUPT_SAVEREG - movw sp@(22),sp@- | push exception vector - clrw sp@- - jbsr _isrdispatch_autovec | call dispatcher - addql #4,sp - INTERRUPT_RESTOREREG - jra rei | all done -#else +ENTRY_NOPROFILE(intrhand_autovec) /* Levels 1 through 6 */ INTERRUPT_SAVEREG - lea sp@(16),a1 | get pointer to frame - movl a1,sp@- - movw sp@(26),d0 - movl d0,sp@- | push exception vector info - movl sp@(26),sp@- | and PC - jbsr _isrdispatch_autovec | call dispatcher - lea sp@(12),sp | pop value args + lea %sp@(16),%a1 | get pointer to frame + movl %a1,%sp@- + movw %sp@(26),%d0 + movl %d0,%sp@- | push exception vector info + movl %sp@(26),%sp@- | and PC + jbsr _C_LABEL(isrdispatch_autovec) | call dispatcher + lea %sp@(12),%sp | pop value args INTERRUPT_RESTOREREG - jra rei | all done - -#endif + jra _ASM_LABEL(rei) | all done ENTRY_NOPROFILE(lev7intr) /* level 7: parity errors, reset key */ addql #1,_C_LABEL(intrcnt)+32 - clrl sp@- - moveml #0xFFFF,sp@- | save registers - movl usp,a0 | and save - movl a0,sp@(FR_SP) | the user stack pointer + clrl %sp@- + moveml #0xFFFF,%sp@- | save registers + movl %usp,%a0 | and save + movl %a0,%sp@(FR_SP) | the user stack pointer jbsr _C_LABEL(nmihand) | call handler - movl sp@(FR_SP),a0 | restore - movl a0,usp | user SP - moveml sp@+,#0x7FFF | and remaining registers - addql #8,sp | pop SP and stack adjust + movl %sp@(FR_SP),%a0 | restore + movl %a0,%usp | user SP + moveml %sp@+,#0x7FFF | and remaining registers + addql #8,%sp | pop SP and stack adjust jra _ASM_LABEL(rei) | all done -.globl _intrhand_vectored -_intrhand_vectored: +ENTRY_NOPROFILE(intrhand_vectored) INTERRUPT_SAVEREG - lea sp@(16),a1 | get pointer to frame - movl a1,sp@- - movw sp@(26),d0 - movl d0,sp@- | push exception vector info - movl sp@(26),sp@- | and PC - jbsr _isrdispatch_vectored | call dispatcher - lea sp@(12),sp | pop value args + lea %sp@(16),%a1 | get pointer to frame + movl %a1,%sp@- + movw %sp@(26),%d0 + movl %d0,%sp@- | push exception vector info + movl %sp@(26),%sp@- | and PC + jbsr _C_LABEL(isrdispatch_vectored) | call dispatcher + lea %sp@(12),%sp | pop value args INTERRUPT_RESTOREREG - jra rei | all done + jra _ASM_LABEL(rei) | all done #undef INTERRUPT_SAVEREG #undef INTERRUPT_RESTOREREG @@ -1024,66 +1009,66 @@ ASENTRY_NOPROFILE(rei) tstl _C_LABEL(astpending) | AST pending? jeq Lchksir | no, go check for SIR Lrei1: - btst #5,sp@ | yes, are we returning to user mode? + btst #5,%sp@ | yes, are we returning to user mode? jne Lchksir | no, go check for SIR - movw #PSL_LOWIPL,sr | lower SPL - clrl sp@- | stack adjust - moveml #0xFFFF,sp@- | save all registers - movl usp,a1 | including - movl a1,sp@(FR_SP) | the users SP + movw #PSL_LOWIPL,%sr | lower SPL + clrl %sp@- | stack adjust + moveml #0xFFFF,%sp@- | save all registers + movl %usp,%a1 | including + movl %a1,%sp@(FR_SP) | the users SP Lrei2: - clrl sp@- | VA == none - clrl sp@- | code == none - movl #T_ASTFLT,sp@- | type == async system trap + clrl %sp@- | VA == none + clrl %sp@- | code == none + movl #T_ASTFLT,%sp@- | type == async system trap jbsr _C_LABEL(trap) | go handle it - lea sp@(12),sp | pop value args - movl sp@(FR_SP),a0 | restore user SP - movl a0,usp | from save area - movw sp@(FR_ADJ),d0 | need to adjust stack? + lea %sp@(12),%sp | pop value args + movl %sp@(FR_SP),%a0 | restore user SP + movl %a0,%usp | from save area + movw %sp@(FR_ADJ),%d0 | need to adjust stack? jne Laststkadj | yes, go to it - moveml sp@+,#0x7FFF | no, restore most user regs - addql #8,sp | toss SP and stack adjust + moveml %sp@+,#0x7FFF | no, restore most user regs + addql #8,%sp | toss SP and stack adjust rte | and do real RTE Laststkadj: - lea sp@(FR_HW),a1 | pointer to HW frame - addql #8,a1 | source pointer - movl a1,a0 | source - addw d0,a0 | + hole size = dest pointer - movl a1@-,a0@- | copy - movl a1@-,a0@- | 8 bytes - movl a0,sp@(FR_SP) | new SSP - moveml sp@+,#0x7FFF | restore user registers - movl sp@,sp | and our SP + lea %sp@(FR_HW),%a1 | pointer to HW frame + addql #8,%a1 | source pointer + movl %a1,%a0 | source + addw %d0,%a0 | + hole size = dest pointer + movl %a1@-,%a0@- | copy + movl %a1@-,%a0@- | 8 bytes + movl %a0,%sp@(FR_SP) | new SSP + moveml %sp@+,#0x7FFF | restore user registers + movl %sp@,%sp | and our SP rte | and do real RTE Lchksir: tstb _C_LABEL(ssir) | SIR pending? jeq Ldorte | no, all done - movl d0,sp@- | need a scratch register - movw sp@(4),d0 | get SR - andw #PSL_IPL7,d0 | mask all but IPL + movl %d0,%sp@- | need a scratch register + movw %sp@(4),%d0 | get SR + andw #PSL_IPL7,%d0 | mask all but IPL jne Lnosir | came from interrupt, no can do - movl sp@+,d0 | restore scratch register + movl %sp@+,%d0 | restore scratch register Lgotsir: - movw #SPL1,sr | prevent others from servicing int + movw #SPL1,%sr | prevent others from servicing int tstb _C_LABEL(ssir) | too late? jeq Ldorte | yes, oh well... - clrl sp@- | stack adjust - moveml #0xFFFF,sp@- | save all registers - movl usp,a1 | including - movl a1,sp@(FR_SP) | the users SP + clrl %sp@- | stack adjust + moveml #0xFFFF,%sp@- | save all registers + movl %usp,%a1 | including + movl %a1,%sp@(FR_SP) | the users SP Lsir1: - clrl sp@- | VA == none - clrl sp@- | code == none - movl #T_SSIR,sp@- | type == software interrupt + clrl %sp@- | VA == none + clrl %sp@- | code == none + movl #T_SSIR,%sp@- | type == software interrupt jbsr _C_LABEL(trap) | go handle it - lea sp@(12),sp | pop value args - movl sp@(FR_SP),a0 | restore - movl a0,usp | user SP - moveml sp@+,#0x7FFF | and all remaining registers - addql #8,sp | pop SP and stack adjust + lea %sp@(12),%sp | pop value args + movl %sp@(FR_SP),%a0 | restore + movl %a0,%usp | user SP + moveml %sp@+,#0x7FFF | and all remaining registers + addql #8,%sp | pop SP and stack adjust rte Lnosir: - movl sp@+,d0 | restore scratch register + movl %sp@+,%d0 | restore scratch register Ldorte: rte | real return @@ -1123,15 +1108,15 @@ ASBSS(nullpcb,SIZEOF_PCB) * old stack and u-area will be freed by the reaper. */ ENTRY(switch_exit) - movl sp@(4),a0 + movl %sp@(4),%a0 /* save state into garbage pcb */ movl #_ASM_LABEL(nullpcb),_C_LABEL(curpcb) - lea _ASM_LABEL(tmpstk),sp | goto a tmp stack + lea _ASM_LABEL(tmpstk),%sp | goto a tmp stack /* Schedule the vmspace and stack to be freed. */ - movl a0,sp@- | exit2(p) + movl %a0,%sp@- | exit2(p) jbsr _C_LABEL(exit2) - lea sp@(4),sp | pop args + lea %sp@(4),%sp | pop args jra _C_LABEL(cpu_switch) @@ -1141,8 +1126,8 @@ ENTRY(switch_exit) */ ASENTRY_NOPROFILE(Idle) stop #PSL_LOWIPL - movw #PSL_HIGHIPL,sr - movl _C_LABEL(whichqs),d0 + movw #PSL_HIGHIPL,%sr + movl _C_LABEL(whichqs),%d0 jeq _ASM_LABEL(Idle) jra Lsw1 @@ -1162,10 +1147,10 @@ Lbadsw: * bit). For now, we just always flush the full ATC. */ ENTRY(cpu_switch) - movl _C_LABEL(curpcb),a0 | current pcb - movw sr,a0@(PCB_PS) | save sr before changing ipl + movl _C_LABEL(curpcb),%a0 | current pcb + movw %sr,%a0@(PCB_PS) | save sr before changing ipl #ifdef notyet - movl _C_LABEL(curproc),sp@- | remember last proc running + movl _C_LABEL(curproc),%sp@- | remember last proc running #endif clrl _C_LABEL(curproc) @@ -1173,106 +1158,106 @@ ENTRY(cpu_switch) * Find the highest-priority queue that isn't empty, * then take the first proc from that queue. */ - movw #PSL_HIGHIPL,sr | lock out interrupts - movl _C_LABEL(whichqs),d0 + movw #PSL_HIGHIPL,%sr | lock out interrupts + movl _C_LABEL(whichqs),%d0 jeq _ASM_LABEL(Idle) Lsw1: - movl d0,d1 - negl d0 - andl d1,d0 - bfffo d0{#0:#32},d1 - eorib #31,d1 + movl %d0,%d1 + negl %d0 + andl %d1,%d0 + bfffo %d0{#0:#32},%d1 + eorib #31,%d1 - movl d1,d0 - lslb #3,d1 | convert queue number to index - addl #_C_LABEL(qs),d1 | locate queue (q) - movl d1,a1 - movl a1@(P_FORW),a0 | p = q->p_forw - cmpal d1,a0 | anyone on queue? + movl %d1,%d0 + lslb #3,%d1 | convert queue number to index + addl #_C_LABEL(qs),%d1 | locate queue (q) + movl %d1,%a1 + movl %a1@(P_FORW),%a0 | p = q->p_forw + cmpal %d1,%a0 | anyone on queue? jeq Lbadsw | no, panic - movl a0@(P_FORW),a1@(P_FORW) | q->p_forw = p->p_forw - movl a0@(P_FORW),a1 | n = p->p_forw - movl d1,a1@(P_BACK) | n->p_back = q - cmpal d1,a1 | anyone left on queue? + movl %a0@(P_FORW),%a1@(P_FORW) | q->p_forw = p->p_forw + movl %a0@(P_FORW),%a1 | n = p->p_forw + movl %d1,%a1@(P_BACK) | n->p_back = q + cmpal %d1,%a1 | anyone left on queue? jne Lsw2 | yes, skip - movl _C_LABEL(whichqs),d1 - bclr d0,d1 | no, clear bit - movl d1,_C_LABEL(whichqs) + movl _C_LABEL(whichqs),%d1 + bclr %d0,%d1 | no, clear bit + movl %d1,_C_LABEL(whichqs) Lsw2: - movl a0,_C_LABEL(curproc) + movl %a0,_C_LABEL(curproc) clrl _C_LABEL(want_resched) #ifdef notyet - movl sp@+,a1 - cmpl a0,a1 | switching to same proc? + movl %sp@+,%a1 + cmpl %a0,%a1 | switching to same proc? jeq Lswdone | yes, skip save and restore #endif /* * Save state of previous process in its pcb. */ - movl _C_LABEL(curpcb),a1 - moveml #0xFCFC,a1@(PCB_REGS) | save non-scratch registers - movl usp,a2 | grab USP (a2 has been saved) - movl a2,a1@(PCB_USP) | and save it + movl _C_LABEL(curpcb),%a1 + moveml #0xFCFC,%a1@(PCB_REGS) | save non-scratch registers + movl %usp,%a2 | grab %USP (%a2 has been saved) + movl %a2,%a1@(PCB_USP) | and save it tstl _C_LABEL(fputype) | Do we have an FPU? jeq Lswnofpsave | No Then don't attempt save. - lea a1@(PCB_FPCTX),a2 | pointer to FP save area - fsave a2@ | save FP state - tstb a2@ | null state frame? + lea %a1@(PCB_FPCTX),%a2 | pointer to FP save area + fsave %a2@ | save FP state + tstb %a2@ | null state frame? jeq Lswnofpsave | yes, all done - fmovem fp0-fp7,a2@(216) | save FP general registers - fmovem fpcr/fpsr/fpi,a2@(312) | save FP control registers + fmovem %fp0-%fp7,%a2@(216) | save FP general registers + fmovem %fpcr/%fpsr/%fpi,%a2@(312) | save FP control registers Lswnofpsave: #ifdef DIAGNOSTIC - tstl a0@(P_WCHAN) + tstl %a0@(P_WCHAN) jne Lbadsw - cmpb #SRUN,a0@(P_STAT) + cmpb #SRUN,%a0@(P_STAT) jne Lbadsw #endif - clrl a0@(P_BACK) | clear back link - movb a0@(P_MD_FLAGS+3),mdpflag | low byte of p_md.md_flags - movl a0@(P_ADDR),a1 | get p_addr - movl a1,_C_LABEL(curpcb) + clrl %a0@(P_BACK) | clear back link + movb %a0@(P_MD_FLAGS+3),mdpflag | low byte of p_md.md_flags + movl %a0@(P_ADDR),%a1 | get p_addr + movl %a1,_C_LABEL(curpcb) /* * Activate process's address space. * XXX Should remember the last USTP value loaded, and call this * XXX only if it has changed. */ - pea a0@ | push proc + pea %a0@ | push proc jbsr _C_LABEL(pmap_activate) | pmap_activate(p) - addql #4,sp - movl _C_LABEL(curpcb),a1 | restore p_addr + addql #4,%sp + movl _C_LABEL(curpcb),%a1 | restore p_addr - lea _ASM_LABEL(tmpstk),sp | now goto a tmp stack for NMI + lea _ASM_LABEL(tmpstk),%sp | now goto a tmp stack for NMI - moveml a1@(PCB_REGS),#0xFCFC | and registers - movl a1@(PCB_USP),a0 - movl a0,usp | and USP + moveml %a1@(PCB_REGS),#0xFCFC | and registers + movl %a1@(PCB_USP),%a0 + movl %a0,%usp | and %USP tstl _C_LABEL(fputype) | If we don't have an FPU, jeq Lnofprest | don't try to restore it. - lea a1@(PCB_FPCTX),a0 | pointer to FP save area - tstb a0@ | null state frame? + lea %a1@(PCB_FPCTX),%a0 | pointer to FP save area + tstb %a0@ | null state frame? jeq Lresfprest | yes, easy #if defined(M68040) #if defined(M68020) || defined(M68030) cmpl #MMU_68040,_C_LABEL(mmutype) | 68040? jne Lresnot040 | no, skip #endif - clrl sp@- | yes... - frestore sp@+ | ...magic! + clrl %sp@- | yes... + frestore %sp@+ | ...magic! Lresnot040: #endif - fmovem a0@(312),fpcr/fpsr/fpi | restore FP control registers - fmovem a0@(216),fp0-fp7 | restore FP general registers + fmovem %a0@(312),%fpcr/%fpsr/%fpi | restore FP control registers + fmovem %a0@(216),%fp0-%fp7 | restore FP general registers Lresfprest: - frestore a0@ | restore state + frestore %a0@ | restore state Lnofprest: - movw a1@(PCB_PS),sr | no, restore PS - moveq #1,d0 | return 1 (for alternate returns) + movw %a1@(PCB_PS),%sr | no, restore PS + moveq #1,%d0 | return 1 (for alternate returns) rts /* @@ -1280,49 +1265,49 @@ Lnofprest: * Update pcb, saving current processor state. */ ENTRY(savectx) - movl sp@(4),a1 - movw sr,a1@(PCB_PS) - movl usp,a0 | grab USP - movl a0,a1@(PCB_USP) | and save it - moveml #0xFCFC,a1@(PCB_REGS) | save non-scratch registers + movl %sp@(4),%a1 + movw %sr,%a1@(PCB_PS) + movl %usp,%a0 | grab %USP + movl %a0,%a1@(PCB_USP) | and save it + moveml #0xFCFC,%a1@(PCB_REGS) | save non-scratch registers tstl _C_LABEL(fputype) | Do we have FPU? jeq Lsvnofpsave | No? Then don't save state. - lea a1@(PCB_FPCTX),a0 | pointer to FP save area - fsave a0@ | save FP state - tstb a0@ | null state frame? + lea %a1@(PCB_FPCTX),%a0 | pointer to FP save area + fsave %a0@ | save FP state + tstb %a0@ | null state frame? jeq Lsvnofpsave | yes, all done - fmovem fp0-fp7,a0@(216) | save FP general registers - fmovem fpcr/fpsr/fpi,a0@(312) | save FP control registers + fmovem %fp0-%fp7,%a0@(216) | save FP general registers + fmovem %fpcr/%fpsr/%fpi,%a0@(312) | save FP control registers Lsvnofpsave: - moveq #0,d0 | return 0 + moveq #0,%d0 | return 0 rts #if defined(M68040) ENTRY(suline) - movl sp@(4),a0 | address to write - movl _C_LABEL(curpcb),a1 | current pcb - movl #Lslerr,a1@(PCB_ONFAULT) | where to return to on a fault - movl sp@(8),a1 | address of line - movl a1@+,d0 | get lword - movsl d0,a0@+ | put lword + movl %sp@(4),%a0 | address to write + movl _C_LABEL(curpcb),%a1 | current pcb + movl #Lslerr,%a1@(PCB_ONFAULT) | where to return to on a fault + movl %sp@(8),%a1 | address of line + movl %a1@+,%d0 | get lword + movsl %d0,%a0@+ | put lword nop | sync - movl a1@+,d0 | get lword - movsl d0,a0@+ | put lword + movl %a1@+,%d0 | get lword + movsl %d0,%a0@+ | put lword nop | sync - movl a1@+,d0 | get lword - movsl d0,a0@+ | put lword + movl %a1@+,%d0 | get lword + movsl %d0,%a0@+ | put lword nop | sync - movl a1@+,d0 | get lword - movsl d0,a0@+ | put lword + movl %a1@+,%d0 | get lword + movsl %d0,%a0@+ | put lword nop | sync - moveq #0,d0 | indicate no fault + moveq #0,%d0 | indicate no fault jra Lsldone Lslerr: - moveq #-1,d0 + moveq #-1,%d0 Lsldone: - movl _C_LABEL(curpcb),a1 | current pcb - clrl a1@(PCB_ONFAULT) | clear fault address + movl _C_LABEL(curpcb),%a1 | current pcb + clrl %a1@(PCB_ONFAULT) | clear fault address rts #endif @@ -1344,16 +1329,16 @@ Lmotommu3: jeq Lhpmmu6 | yes, skip pflusha | flush entire TLB jpl Lmc68851a | 68851 implies no d-cache - movl #DC_CLEAR,d0 - movc d0,cacr | invalidate on-chip d-cache + movl #DC_CLEAR,%d0 + movc %d0,%cacr | invalidate on-chip d-cache Lmc68851a: rts Lhpmmu6: #endif #if defined(M68K_MMU_HP) - MMUADDR(a0) - movl a0@(MMUTBINVAL),sp@- | do not ask me, this - addql #4,sp | is how hpux does it + MMUADDR(%a0) + movl %a0@(MMUTBINVAL),%sp@- | do not ask me, this + addql #4,%sp | is how hpux does it #ifdef DEBUG tstl _ASM_LABEL(fullcflush) jne _C_LABEL(_DCIA) | XXX: invalidate entire cache @@ -1372,45 +1357,45 @@ ENTRY(TBIS) #if defined(M68040) cmpl #MMU_68040,_C_LABEL(mmutype) | 68040? jne Lmotommu4 | no, skip - movl sp@(4),a0 - movc dfc,d1 - moveq #1,d0 | user space - movc d0,dfc - .word 0xf508 | pflush a0@ - moveq #5,d0 | super space - movc d0,dfc - .word 0xf508 | pflush a0@ - movc d1,dfc + movl %sp@(4),%a0 + movc dfc,%d1 + moveq #1,%d0 | user space + movc %d0,dfc + .word 0xf508 | pflush %a0@ + moveq #5,%d0 | super space + movc %d0,dfc + .word 0xf508 | pflush %a0@ + movc %d1,dfc rts Lmotommu4: #endif #if defined(M68K_MMU_MOTOROLA) tstl _C_LABEL(mmutype) | HP MMU? jeq Lhpmmu5 | yes, skip - movl sp@(4),a0 | get addr to flush + movl %sp@(4),%a0 | get addr to flush jpl Lmc68851b | is 68851? - pflush #0,#0,a0@ | flush address from both sides - movl #DC_CLEAR,d0 - movc d0,cacr | invalidate on-chip data cache + pflush #0,#0,%a0@ | flush address from both sides + movl #DC_CLEAR,%d0 + movc %d0,%cacr | invalidate on-chip data cache rts Lmc68851b: - pflushs #0,#0,a0@ | flush address from both sides + pflushs #0,#0,%a0@ | flush address from both sides rts Lhpmmu5: #endif #if defined(M68K_MMU_HP) - movl sp@(4),d0 | VA to invalidate - bclr #0,d0 | ensure even - movl d0,a0 - movw sr,d1 | go critical - movw #PSL_HIGHIPL,sr | while in purge space - moveq #FC_PURGE,d0 | change address space - movc d0,dfc | for destination - moveq #0,d0 | zero to invalidate? - movsl d0,a0@ | hit it - moveq #FC_USERD,d0 | back to old - movc d0,dfc | address space - movw d1,sr | restore IPL + movl %sp@(4),%d0 | VA to invalidate + bclr #0,%d0 | ensure even + movl %d0,%a0 + movw %sr,%d1 | go critical + movw #PSL_HIGHIPL,%sr | while in purge space + moveq #FC_PURGE,%d0 | change address space + movc %d0,dfc | for destination + moveq #0,%d0 | zero to invalidate? + movsl %d0,%a0@ | hit it + moveq #FC_USERD,%d0 | back to old + movc %d0,dfc | address space + movw %d1,%sr | restore IPL #endif rts @@ -1434,8 +1419,8 @@ Lmotommu5: jeq Lhpmmu7 | yes, skip jpl Lmc68851c | 68851? pflush #4,#4 | flush supervisor TLB entries - movl #DC_CLEAR,d0 - movc d0,cacr | invalidate on-chip d-cache + movl #DC_CLEAR,%d0 + movc %d0,%cacr | invalidate on-chip d-cache rts Lmc68851c: pflushs #4,#4 | flush supervisor TLB entries @@ -1443,9 +1428,9 @@ Lmc68851c: Lhpmmu7: #endif #if defined(M68K_MMU_HP) - MMUADDR(a0) - movl #0x8000,d0 | more - movl d0,a0@(MMUTBINVAL) | HP magic + MMUADDR(%a0) + movl #0x8000,%d0 | more + movl %d0,%a0@(MMUTBINVAL) | HP magic #ifdef DEBUG tstl _ASM_LABEL(fullcflush) jne _C_LABEL(_DCIS) | XXX: invalidate entire sup. cache @@ -1473,8 +1458,8 @@ Lmotommu6: jeq Lhpmmu8 | yes, skip jpl Lmc68851d | 68851? pflush #0,#4 | flush user TLB entries - movl #DC_CLEAR,d0 - movc d0,cacr | invalidate on-chip d-cache + movl #DC_CLEAR,%d0 + movc %d0,%cacr | invalidate on-chip d-cache rts Lmc68851d: pflushs #0,#4 | flush user TLB entries @@ -1482,9 +1467,9 @@ Lmc68851d: Lhpmmu8: #endif #if defined(M68K_MMU_HP) - MMUADDR(a0) - moveq #0,d0 | more - movl d0,a0@(MMUTBINVAL) | HP magic + MMUADDR(%a0) + moveq #0,%d0 | more + movl %d0,%a0@(MMUTBINVAL) | HP magic #ifdef DEBUG tstl _ASM_LABEL(fullcflush) jne _C_LABEL(_DCIU) | XXX: invalidate entire user cache @@ -1504,8 +1489,8 @@ ENTRY(ICPA) rts Lmotommu7: #endif - movl #IC_CLEAR,d0 - movc d0,cacr | invalidate i-cache + movl #IC_CLEAR,%d0 + movc %d0,%cacr | invalidate i-cache rts /* @@ -1528,9 +1513,9 @@ Lmotommu8: #if defined(M68K_MMU_HP) tstl _C_LABEL(ectype) | got external VAC? jle Lnocache2 | no, all done - MMUADDR(a0) - andl #~MMU_CEN,a0@(MMUCMD) | disable cache in MMU control reg - orl #MMU_CEN,a0@(MMUCMD) | reenable cache in MMU control reg + MMUADDR(%a0) + andl #~MMU_CEN,%a0@(MMUCMD) | disable cache in MMU control reg + orl #MMU_CEN,%a0@(MMUCMD) | reenable cache in MMU control reg Lnocache2: #endif rts @@ -1547,9 +1532,9 @@ Lmotommu9: #if defined(M68K_MMU_HP) tstl _C_LABEL(ectype) | got external VAC? jle Lnocache3 | no, all done - MMUADDR(a0) - movl a0@(MMUSSTP),d0 | read the supervisor STP - movl d0,a0@(MMUSSTP) | write it back + MMUADDR(%a0) + movl %a0@(MMUSSTP),%d0 | read the supervisor STP + movl %d0,%a0@(MMUSSTP) | write it back Lnocache3: #endif rts @@ -1566,40 +1551,40 @@ LmotommuA: #if defined(M68K_MMU_HP) tstl _C_LABEL(ectype) | got external VAC? jle Lnocache4 | no, all done - MMUADDR(a0) - movl a0@(MMUUSTP),d0 | read the user STP - movl d0,a0@(MMUUSTP) | write it back + MMUADDR(%a0) + movl %a0@(MMUUSTP),%d0 | read the user STP + movl %d0,%a0@(MMUUSTP) | write it back Lnocache4: #endif rts #if defined(M68040) ENTRY(ICPL) - movl sp@(4),a0 | address - .word 0xf488 | cinvl ic,a0@ + movl %sp@(4),%a0 | address + .word 0xf488 | cinvl ic,%a0@ rts ENTRY(ICPP) - movl sp@(4),a0 | address - .word 0xf490 | cinvp ic,a0@ + movl %sp@(4),%a0 | address + .word 0xf490 | cinvp ic,%a0@ rts ENTRY(DCPL) - movl sp@(4),a0 | address - .word 0xf448 | cinvl dc,a0@ + movl %sp@(4),%a0 | address + .word 0xf448 | cinvl dc,%a0@ rts ENTRY(DCPP) - movl sp@(4),a0 | address - .word 0xf450 | cinvp dc,a0@ + movl %sp@(4),%a0 | address + .word 0xf450 | cinvp dc,%a0@ rts ENTRY(DCPA) .word 0xf458 | cinva dc rts ENTRY(DCFL) - movl sp@(4),a0 | address - .word 0xf468 | cpushl dc,a0@ + movl %sp@(4),%a0 | address + .word 0xf468 | cpushl dc,%a0@ rts ENTRY(DCFP) - movl sp@(4),a0 | address - .word 0xf470 | cpushp dc,a0@ + movl %sp@(4),%a0 | address + .word 0xf470 | cpushp dc,%a0@ rts #endif @@ -1613,14 +1598,14 @@ ENTRY(DCFA) LmotommuB: #endif #if defined(M68K_MMU_MOTOROLA) - movl #DC_CLEAR,d0 - movc d0,cacr | invalidate on-chip d-cache + movl #DC_CLEAR,%d0 + movc %d0,%cacr | invalidate on-chip d-cache #if defined(ENABLE_HP_CODE) tstl _C_LABEL(ectype) | got external PAC? jge Lnocache6 | no, all done - MMUADDR(a0) - andl #~MMU_CEN,a0@(MMUCMD) | disable cache in MMU control reg - orl #MMU_CEN,a0@(MMUCMD) | reenable cache in MMU control reg + MMUADDR(%a0) + andl #~MMU_CEN,%a0@(MMUCMD) | disable cache in MMU control reg + orl #MMU_CEN,%a0@(MMUCMD) | reenable cache in MMU control reg Lnocache6: #endif #endif @@ -1631,26 +1616,26 @@ Lnocache6: ENTRY(ecacheon) tstl _C_LABEL(ectype) jeq Lnocache7 - MMUADDR(a0) - orl #MMU_CEN,a0@(MMUCMD) + MMUADDR(%a0) + orl #MMU_CEN,%a0@(MMUCMD) Lnocache7: rts ENTRY(ecacheoff) tstl _C_LABEL(ectype) jeq Lnocache8 - MMUADDR(a0) - andl #~MMU_CEN,a0@(MMUCMD) + MMUADDR(%a0) + andl #~MMU_CEN,%a0@(MMUCMD) Lnocache8: rts #endif ENTRY_NOPROFILE(getsfc) - movc sfc,d0 + movc sfc,%d0 rts ENTRY_NOPROFILE(getdfc) - movc dfc,d0 + movc dfc,%d0 rts /* @@ -1660,43 +1645,43 @@ ENTRY(loadustp) #if defined(M68K_MMU_MOTOROLA) tstl _C_LABEL(mmutype) | HP MMU? jeq Lhpmmu9 | yes, skip - movl sp@(4),d0 | new USTP - moveq #PGSHIFT,d1 - lsll d1,d0 | convert to addr + movl %sp@(4),%d0 | new USTP + moveq #PGSHIFT,%d1 + lsll %d1,%d0 | convert to addr #if defined(M68040) cmpl #MMU_68040,_C_LABEL(mmutype) | 68040? jne LmotommuC | no, skip .word 0xf518 | yes, pflusha - .long 0x4e7b0806 | movc d0,urp + .long 0x4e7b0806 | movc %d0,urp rts LmotommuC: #endif pflusha | flush entire TLB - lea _C_LABEL(protorp),a0 | CRP prototype - movl d0,a0@(4) | stash USTP - pmove a0@,crp | load root pointer - movl #CACHE_CLR,d0 - movc d0,cacr | invalidate cache(s) + lea _C_LABEL(protorp),%a0 | CRP prototype + movl %d0,%a0@(4) | stash USTP + pmove %a0@,crp | load root pointer + movl #CACHE_CLR,%d0 + movc %d0,%cacr | invalidate cache(s) rts Lhpmmu9: #endif #if defined(M68K_MMU_HP) - movl #CACHE_CLR,d0 - movc d0,cacr | invalidate cache(s) - MMUADDR(a0) - movl a0@(MMUTBINVAL),d1 | invalidate TLB + movl #CACHE_CLR,%d0 + movc %d0,%cacr | invalidate cache(s) + MMUADDR(%a0) + movl %a0@(MMUTBINVAL),%d1 | invalidate TLB tstl _C_LABEL(ectype) | have external VAC? jle 1f | no, skip - andl #~MMU_CEN,a0@(MMUCMD) | toggle cache enable - orl #MMU_CEN,a0@(MMUCMD) | to clear data cache + andl #~MMU_CEN,%a0@(MMUCMD) | toggle cache enable + orl #MMU_CEN,%a0@(MMUCMD) | to clear data cache 1: - movl sp@(4),a0@(MMUUSTP) | load a new USTP + movl %sp@(4),%a0@(MMUUSTP) | load a new USTP #endif rts ENTRY(ploadw) #if defined(M68K_MMU_MOTOROLA) - movl sp@(4),a0 | address to load + movl %sp@(4),%a0 | address to load #if defined(M68K_MMU_HP) tstl _C_LABEL(mmutype) | HP MMU? jeq Lploadwskp | yes, skip @@ -1705,7 +1690,7 @@ ENTRY(ploadw) cmpl #MMU_68040,_C_LABEL(mmutype) | 68040? jeq Lploadwskp | yes, skip #endif - ploadw #1,a0@ | pre-load translation + ploadw #1,%a0@ | pre-load translation Lploadwskp: #endif rts @@ -1717,22 +1702,22 @@ Lploadwskp: */ ENTRY(spl0) - moveq #0,d0 - movw sr,d0 | get old SR for return - movw #PSL_LOWIPL,sr | restore new SR + moveq #0,%d0 + movw %sr,%d0 | get old SR for return + movw #PSL_LOWIPL,%sr | restore new SR tstb _C_LABEL(ssir) | software interrupt pending? jeq Lspldone | no, all done - subql #4,sp | make room for RTE frame - movl sp@(4),sp@(2) | position return address - clrw sp@(6) | set frame type 0 - movw #PSL_LOWIPL,sp@ | and new SR + subql #4,%sp | make room for RTE frame + movl %sp@(4),%sp@(2) | position return address + clrw %sp@(6) | set frame type 0 + movw #PSL_LOWIPL,%sp@ | and new SR jra Lgotsir | go handle it Lspldone: rts ENTRY(getsr) - moveq #0,d0 - movw sr,d0 + moveq #0,%d0 + movw %sr,%d0 rts /* @@ -1743,10 +1728,10 @@ ENTRY(getsr) * which should be set based on the CPU clock rate. */ ENTRY_NOPROFILE(_delay) - | d0 = arg = (usecs << 8) - movl sp@(4),d0 - | d1 = delay_divisor - movl _C_LABEL(delay_divisor),d1 + | %d0 = arg = (usecs << 8) + movl %sp@(4),%d0 + | %d1 = delay_divisor + movl _C_LABEL(delay_divisor),%d1 jra L_delay /* Jump into the loop! */ /* @@ -1758,7 +1743,7 @@ ENTRY_NOPROFILE(_delay) */ .align 8 L_delay: - subl d1,d0 + subl %d1,%d0 jgt L_delay rts @@ -1766,23 +1751,23 @@ L_delay: * Save and restore 68881 state. */ ENTRY(m68881_save) - movl sp@(4),a0 | save area pointer - fsave a0@ | save state - tstb a0@ | null state frame? + movl %sp@(4),%a0 | save area pointer + fsave %a0@ | save state + tstb %a0@ | null state frame? jeq Lm68881sdone | yes, all done - fmovem fp0-fp7,a0@(216) | save FP general registers - fmovem fpcr/fpsr/fpi,a0@(312) | save FP control registers + fmovem %fp0-%fp7,%a0@(216) | save FP general registers + fmovem %fpcr/%fpsr/%fpi,%a0@(312) | save FP control registers Lm68881sdone: rts ENTRY(m68881_restore) - movl sp@(4),a0 | save area pointer - tstb a0@ | null state frame? + movl %sp@(4),%a0 | save area pointer + tstb %a0@ | null state frame? jeq Lm68881rdone | yes, easy - fmovem a0@(312),fpcr/fpsr/fpi | restore FP control registers - fmovem a0@(216),fp0-fp7 | restore FP general registers + fmovem %a0@(312),%fpcr/%fpsr/%fpi | restore FP control registers + fmovem %a0@(216),%fp0-%fp7 | restore FP general registers Lm68881rdone: - frestore a0@ | restore state + frestore %a0@ | restore state rts /* @@ -1794,47 +1779,47 @@ Lm68881rdone: * memory this way. */ ENTRY_NOPROFILE(doboot) - movw #PSL_HIGHIPL,sr | no interrupts + movw #PSL_HIGHIPL,%sr | no interrupts - movl #CACHE_OFF,d0 - movc d0,cacr | clear and disable on-chip cache(s) + movl #CACHE_OFF,%d0 + movc %d0,%cacr | clear and disable on-chip cache(s) | Turn on physical memory mapping. | @@@ This is also 68040 specific and needs fixing. - movel #0x0200c040,d0 | intio devices are at 0x02000000 - .long 0x4e7b0004 | movc d0,itt0 - .long 0x4e7b0006 | movc d0,dtt0 - movel #0x0403c000,d0 | kernel text and data at 0x04000000 - .long 0x4e7b0005 | movc d0,itt1 - .long 0x4e7b0007 | movc d0,dtt1 + movel #0x0200c040,%d0 | intio devices are at 0x02000000 + .long 0x4e7b0004 | movc %d0,%itt0 + .long 0x4e7b0006 | movc %d0,%dtt0 + movel #0x0403c000,%d0 | kernel text and data at 0x04000000 + .long 0x4e7b0005 | movc %d0,%itt1 + .long 0x4e7b0007 | movc %d0,%dtt1 - moveal #NEXT_RAMBASE,a5 | amount to RELOC by. + moveal #NEXT_RAMBASE,%a5 | amount to RELOC by. | Create a new stack at address tmpstk, and push | The existing sp onto it for kicks. - ASRELOC(tmpstk, a0) - movel sp,a0@- - moveal a0,sp - moveal #0,a6 + ASRELOC(tmpstk, %a0) + movel %sp,%a0@- + moveal %a0,%sp + moveal #0,%a6 - ASRELOC(Ldoboot1, a0) - jmp a0@ | jump into physical address space. + ASRELOC(Ldoboot1, %a0) + jmp %a0@ | jump into physical address space. Ldoboot1: - ASRELOC(save_vbr, a0) - movl a0@,d0 - movc d0,vbr + ASRELOC(save_vbr, %a0) + movl %a0@,%d0 + movc %d0,vbr | reset the registers as the boot rom likes them: - movel #0x0200c040,d0 | - .long 0x4e7b0004 | movc d0,itt0 - .long 0x4e7b0006 | movc d0,dtt0 - movel #0x00ffc000,d0 | - .long 0x4e7b0005 | movc d0,itt1 - .long 0x4e7b0007 | movc d0,dtt1 + movel #0x0200c040,%d0 | + .long 0x4e7b0004 | movc %d0,%itt0 + .long 0x4e7b0006 | movc %d0,%dtt0 + movel #0x00ffc000,%d0 | + .long 0x4e7b0005 | movc %d0,%itt1 + .long 0x4e7b0007 | movc %d0,%dtt1 - RELOC(monbootflag, a0) - movel a0,d0 | "-h" halts instead of reboot. + RELOC(monbootflag, %a0) + movel %a0,%d0 | "-h" halts instead of reboot. trap #13 hloop: