diff --git a/sys/dev/ic/wdc.c b/sys/dev/ic/wdc.c
index ea3ff758a3a1..6885cf9c1b7d 100644
--- a/sys/dev/ic/wdc.c
+++ b/sys/dev/ic/wdc.c
@@ -1,4 +1,4 @@
-/*	$NetBSD: wdc.c,v 1.49 1998/12/02 15:53:34 bouyer Exp $ */
+/*	$NetBSD: wdc.c,v 1.50 1998/12/03 15:38:59 bouyer Exp $ */
 
 
 /*
@@ -841,12 +841,10 @@ wdc_probe_caps(drvp)
 						continue;
 				printf("%s UDMA mode %d", sep, i);
 				sep = ",";
-				/*
-				 * ATA-4 specs says if a mode is supported,
-				 * all lower modes shall be supported.
-				 * No need to look further.
-				 */
 				if (wdc->cap & WDC_CAPABILITY_UDMA) {
+					if ((wdc->cap & WDC_CAPABILITY_MODE) &&
+					    wdc->udma_mode < i)
+						continue;
 					drvp->UDMA_mode = i;
 					drvp->UDMA_cap = i;
 					drvp->drive_flags |= DRIVE_UDMA;
diff --git a/sys/dev/ic/wdcvar.h b/sys/dev/ic/wdcvar.h
index b7a66caabee6..769cb2be5e4d 100644
--- a/sys/dev/ic/wdcvar.h
+++ b/sys/dev/ic/wdcvar.h
@@ -1,4 +1,4 @@
-/*	$NetBSD: wdcvar.h,v 1.11 1998/12/02 15:53:35 bouyer Exp $	*/
+/*	$NetBSD: wdcvar.h,v 1.12 1998/12/03 15:38:59 bouyer Exp $	*/
 
 /*-
  * Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -92,6 +92,7 @@ struct wdc_softc { /* Per controller state */
 #define WDC_CAPABILITY_NO_EXTRA_RESETS 0x0100 /* only reset once */
 	u_int8_t      pio_mode; /* highest PIO mode supported */
 	u_int8_t      dma_mode; /* highest DMA mode supported */
+	u_int8_t      udma_mode; /* highest UDMA mode supported */
 	int nchannels;	/* Number of channels on this controller */
 	struct channel_softc **channels;  /* channels-specific datas (array) */
 
diff --git a/sys/dev/pci/pciide.c b/sys/dev/pci/pciide.c
index 7359f6bdd83e..e6270b04dbce 100644
--- a/sys/dev/pci/pciide.c
+++ b/sys/dev/pci/pciide.c
@@ -1,4 +1,4 @@
-/*	$NetBSD: pciide.c,v 1.24 1998/12/03 13:50:38 bouyer Exp $	*/
+/*	$NetBSD: pciide.c,v 1.25 1998/12/03 15:38:59 bouyer Exp $	*/
 
 /*
  * Copyright (c) 1996, 1998 Christopher G. Demetriou.  All rights reserved.
@@ -1181,6 +1181,7 @@ piix_setup_cap(sc)
 	    WDC_CAPABILITY_DMA;
 	sc->sc_wdcdev.pio_mode = 4;
 	sc->sc_wdcdev.dma_mode = 2;
+	sc->sc_wdcdev.udma_mode = 2;
 }
 
 void
@@ -1547,6 +1548,7 @@ apollo_setup_cap(sc)
 	    WDC_CAPABILITY_DMA;
 	sc->sc_wdcdev.pio_mode = 4;
 	sc->sc_wdcdev.dma_mode = 2;
+	sc->sc_wdcdev.udma_mode = 2;
 
 }
 void
@@ -1906,6 +1908,7 @@ sis_setup_cap(sc)
 	    WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
 	sc->sc_wdcdev.pio_mode = 4;
 	sc->sc_wdcdev.dma_mode = 2;
+	sc->sc_wdcdev.udma_mode = 2;
 }
 
 void