Add ISA DMA support entries. (It's dummy. I don't know if it work or not.)

This commit is contained in:
takemura 2000-03-05 04:34:06 +00:00
parent 307e770b37
commit 2aad5afc67
2 changed files with 74 additions and 27 deletions

View File

@ -1,4 +1,4 @@
/* $NetBSD: isa_machdep.h,v 1.1.1.1 1999/09/16 12:23:22 takemura Exp $ */ /* $NetBSD: isa_machdep.h,v 1.2 2000/03/05 04:34:06 takemura Exp $ */
/* /*
* Copyright (c) 1999, by UCHIYAMA Yasushi * Copyright (c) 1999, by UCHIYAMA Yasushi
@ -25,11 +25,19 @@
* SUCH DAMAGE. * SUCH DAMAGE.
* *
*/ */
typedef void *isa_chipset_tag_t; #include <dev/isa/isadmavar.h>
struct hpcmips_isa_chipset {
struct isa_dma_state ic_dmastate;
void *ic_sc;
};
typedef struct hpcmips_isa_chipset *isa_chipset_tag_t;
#define VR_ISA_PORT_BASE 0x14000000 #define VR_ISA_PORT_BASE 0x14000000
#define VR_ISA_PORT_SIZE 0x4000000 #define VR_ISA_PORT_SIZE 0x4000000
#define VR_ISA_MEM_BASE 0x10000000 #define VR_ISA_MEM_BASE 0x10000000
#define VR_ISA_MEM_SIZE 0x4000000 #define VR_ISA_MEM_SIZE 0x4000000
/* /*
* Functions provided to machine-independent ISA code. * Functions provided to machine-independent ISA code.
*/ */
@ -37,3 +45,46 @@ void isa_attach_hook __P((struct device*, struct device*, struct isabus_attach_a
int isa_intr_alloc __P((isa_chipset_tag_t, int, int, int*)); int isa_intr_alloc __P((isa_chipset_tag_t, int, int, int*));
void *isa_intr_establish __P((isa_chipset_tag_t, int, int, int, int (*)(void *), void*)); void *isa_intr_establish __P((isa_chipset_tag_t, int, int, int, int (*)(void *), void*));
void isa_intr_disestablish __P((isa_chipset_tag_t, void*)); void isa_intr_disestablish __P((isa_chipset_tag_t, void*));
#define isa_dmainit(ic, bst, dmat, d) \
_isa_dmainit(&(ic)->ic_dmastate, (bst), (dmat), (d))
#define isa_dmacascade(ic, c) \
_isa_dmacascade(&(ic)->ic_dmastate, (c))
#define isa_dmamaxsize(ic, c) \
_isa_dmamaxsize(&(ic)->ic_dmastate, (c))
#define isa_dmamap_create(ic, c, s, f) \
_isa_dmamap_create(&(ic)->ic_dmastate, (c), (s), (f))
#define isa_dmamap_destroy(ic, c) \
_isa_dmamap_destroy(&(ic)->ic_dmastate, (c))
#define isa_dmastart(ic, c, a, n, p, f, bf) \
_isa_dmastart(&(ic)->ic_dmastate, (c), (a), (n), (p), (f), (bf))
#define isa_dmaabort(ic, c) \
_isa_dmaabort(&(ic)->ic_dmastate, (c))
#define isa_dmacount(ic, c) \
_isa_dmacount(&(ic)->ic_dmastate, (c))
#define isa_dmafinished(ic, c) \
_isa_dmafinished(&(ic)->ic_dmastate, (c))
#define isa_dmadone(ic, c) \
_isa_dmadone(&(ic)->ic_dmastate, (c))
#define isa_dmafreeze(ic) \
_isa_dmafreeze(&(ic)->ic_dmastate)
#define isa_dmathaw(ic) \
_isa_dmathaw(&(ic)->ic_dmastate)
#define isa_dmamem_alloc(ic, c, s, ap, f) \
_isa_dmamem_alloc(&(ic)->ic_dmastate, (c), (s), (ap), (f))
#define isa_dmamem_free(ic, c, a, s) \
_isa_dmamem_free(&(ic)->ic_dmastate, (c), (a), (s))
#define isa_dmamem_map(ic, c, a, s, kp, f) \
_isa_dmamem_map(&(ic)->ic_dmastate, (c), (a), (s), (kp), (f))
#define isa_dmamem_unmap(ic, c, k, s) \
_isa_dmamem_unmap(&(ic)->ic_dmastate, (c), (k), (s))
#define isa_dmamem_mmap(ic, c, a, s, o, p, f) \
_isa_dmamem_mmap(&(ic)->ic_dmastate, (c), (a), (s), (o), (p), (f))
#define isa_drq_isfree(ic, c) \
_isa_drq_isfree(&(ic)->ic_dmastate, (c))
#define isa_malloc(ic, c, s, p, f) \
_isa_malloc(&(ic)->ic_dmastate, (c), (s), (p), (f))
#define isa_free(a, p) \
_isa_free((a), (p))
#define isa_mappage(m, o, p) \
_isa_mappage((m), (o), (p))

View File

@ -1,4 +1,4 @@
/* $NetBSD: isa_machdep.c,v 1.2 2000/03/04 13:43:19 takemura Exp $ */ /* $NetBSD: isa_machdep.c,v 1.3 2000/03/05 04:34:07 takemura Exp $ */
/* /*
* Copyright (c) 1999, by UCHIYAMA Yasushi * Copyright (c) 1999, by UCHIYAMA Yasushi
@ -52,6 +52,7 @@ struct vrisab_softc {
vrgiu_chipset_tag_t sc_gc; vrgiu_chipset_tag_t sc_gc;
vrgiu_function_tag_t sc_gf; vrgiu_function_tag_t sc_gf;
int sc_intr_map[MAX_GPIO_INOUT]; /* ISA <-> GIU inerrupt line mapping */ int sc_intr_map[MAX_GPIO_INOUT]; /* ISA <-> GIU inerrupt line mapping */
struct hpcmips_isa_chipset sc_isa_ic;
}; };
struct cfattach vrisab_ca = { struct cfattach vrisab_ca = {
@ -98,9 +99,10 @@ vrisabattach(parent, self, aux)
sc->sc_gc = chipset = gpa->gpa_gc; sc->sc_gc = chipset = gpa->gpa_gc;
sc->sc_gf = gpa->gpa_gf; sc->sc_gf = gpa->gpa_gf;
sc->sc_isa_ic.ic_sc = sc;
iba.iba_busname = "isa"; iba.iba_busname = "isa";
iba.iba_ic = sc; iba.iba_ic = &sc->sc_isa_ic;
iba.iba_dmat = 0; /* XXX not yet */ iba.iba_dmat = 0; /* XXX not yet */
/* Allocate ISA memory space */ /* Allocate ISA memory space */
@ -161,14 +163,14 @@ isa_intr_establish(ic, intr, type, level, ih_fun, ih_arg)
int (*ih_fun) __P((void*)); int (*ih_fun) __P((void*));
void *ih_arg; void *ih_arg;
{ {
struct vrisab_softc *sc = (void*)ic; struct vrisab_softc *sc = ic->ic_sc;
int port, irq; int port, irq, mode;
/* /*
* 'intr' encoding: * 'intr' encoding:
* *
* 0x0000000f ISA IRQ# * 0x0000000f ISA IRQ#
* 0x00ff0000 GPIO port# (if port# is 0xff, it means 'not specified') * 0x00ff0000 GPIO port#
* 0x01000000 interrupt signal hold/through (1:hold/0:though) * 0x01000000 interrupt signal hold/through (1:hold/0:though)
* 0x02000000 interrupt detection level (1:low /0:high ) * 0x02000000 interrupt detection level (1:low /0:high )
* 0x04000000 interrupt detection trigger (1:edge/0:level ) * 0x04000000 interrupt detection trigger (1:edge/0:level )
@ -176,8 +178,6 @@ isa_intr_establish(ic, intr, type, level, ih_fun, ih_arg)
#define INTR_IRQ(i) (((i)>> 0) & 0x0f) #define INTR_IRQ(i) (((i)>> 0) & 0x0f)
#define INTR_PORT(i) (((i)>>16) & 0xff) #define INTR_PORT(i) (((i)>>16) & 0xff)
#define INTR_MODE(i) (((i)>>24) & 0x07) #define INTR_MODE(i) (((i)>>24) & 0x07)
#define INTR_PORTISNULL(p) ((p) == 0xff)
#define INTR_PORTNULL 0x00ff0000
static int intr_modes[8] = { static int intr_modes[8] = {
VRGIU_INTR_LEVEL_HIGH_THROUGH, VRGIU_INTR_LEVEL_HIGH_THROUGH,
VRGIU_INTR_LEVEL_HIGH_HOLD, VRGIU_INTR_LEVEL_HIGH_HOLD,
@ -203,24 +203,22 @@ isa_intr_establish(ic, intr, type, level, ih_fun, ih_arg)
* ISA IRQ <-> GPIO port mapping * ISA IRQ <-> GPIO port mapping
*/ */
irq = INTR_IRQ(intr); irq = INTR_IRQ(intr);
port = INTR_PORT(intr); if (sc->sc_intr_map[irq] != -1) {
if (INTR_PORTISNULL(port)) { /* already mapped */
/* GPIO port not specfied */ intr = sc->sc_intr_map[irq];
port = sc->sc_intr_map[irq]; /* Use Already mapped port */
} else { } else {
/* GPIO port specified. */ /* not mapped yet */
if (sc->sc_intr_map[irq] != -1) sc->sc_intr_map[irq] = intr; /* Register it */
panic("isa_intr_establish: conflict GPIO line. %d <-> %d",
port, sc->sc_intr_map[irq]);
sc->sc_intr_map[irq] = port; /* Register it */
printf("ISA IRQ %d -> GPIO port %d, %s\n",
irq, port, intr_mode_names[INTR_MODE(intr)]);
} }
if (port == -1) mode = INTR_MODE(intr);
panic("isa_intr_establish: can't ISA IRQ to GIU port."); port = INTR_PORT(intr);
printf("ISA IRQ %d -> GPIO port %d, %s\n",
irq, port, intr_mode_names[mode]);
/* Call Vr routine */ /* Call Vr routine */
return sc->sc_gf->gf_intr_establish(sc->sc_gc, port, return sc->sc_gf->gf_intr_establish(sc->sc_gc, port,
intr_modes[INTR_MODE(intr)], intr_modes[mode],
level, ih_fun, ih_arg); level, ih_fun, ih_arg);
} }
@ -229,7 +227,7 @@ isa_intr_disestablish(ic, arg)
isa_chipset_tag_t ic; isa_chipset_tag_t ic;
void *arg; void *arg;
{ {
struct vrisab_softc *sc = (void*)ic; struct vrisab_softc *sc = ic->ic_sc;
/* Call Vr routine */ /* Call Vr routine */
sc->sc_gf->gf_intr_disestablish(sc->sc_gc, arg); sc->sc_gf->gf_intr_disestablish(sc->sc_gc, arg);
} }
@ -244,7 +242,7 @@ isa_intr_alloc(ic, mask, type, irq)
/* XXX not coded yet. this is temporary XXX */ /* XXX not coded yet. this is temporary XXX */
printf ("isa_intr_alloc:"); printf ("isa_intr_alloc:");
bitdisp32(mask); bitdisp32(mask);
*irq = ((ffs(mask) -1) | INTR_PORTNULL); /* XXX */ *irq = (ffs(mask) -1); /* XXX */
return 0; return 0;
} }
@ -284,5 +282,3 @@ __find_pcic(void)
} }
} }
#endif #endif