From 2a63f0a46ce54cc825e9a6e05bd32bb9146b85de Mon Sep 17 00:00:00 2001 From: bouyer Date: Fri, 5 Jan 2001 15:20:53 +0000 Subject: [PATCH] Add support for Ultra/100 on the HPT370 XXX the datasheet for the HPT370 is wrong While I'm there clear the DRIVE_DMA flag when we're going to use Ultra/DMA where it was missed, so that wdc_print_modes() only prints what's used. --- sys/dev/pci/pciide.c | 11 ++++++++--- sys/dev/pci/pciide_hpt_reg.h | 5 +++-- 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/sys/dev/pci/pciide.c b/sys/dev/pci/pciide.c index 793d3119c323..f3a9d6fa58eb 100644 --- a/sys/dev/pci/pciide.c +++ b/sys/dev/pci/pciide.c @@ -1,4 +1,4 @@ -/* $NetBSD: pciide.c,v 1.100 2000/12/29 18:59:01 tsutsui Exp $ */ +/* $NetBSD: pciide.c,v 1.101 2001/01/05 15:20:53 bouyer Exp $ */ /* @@ -2303,6 +2303,7 @@ cmd0643_9_setup_channel(chp) if (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) { if (drvp->drive_flags & DRIVE_UDMA) { /* UltraDMA on a 646U2, 0648 or 0649 */ + drvp->drive_flags &= ~DRIVE_DMA; udma_reg = pciide_pci_read(sc->sc_pc, sc->sc_tag, CMD_UDMATIM(chp->channel)); if (drvp->UDMA_mode > 2 && @@ -2896,11 +2897,11 @@ hpt_chip_map(sc, pa) } sc->sc_wdcdev.PIO_cap = 4; sc->sc_wdcdev.DMA_cap = 2; - sc->sc_wdcdev.UDMA_cap = 4; sc->sc_wdcdev.set_modes = hpt_setup_channel; sc->sc_wdcdev.channels = sc->wdc_chanarray; if (revision == HPT366_REV) { + sc->sc_wdcdev.UDMA_cap = 4; /* * The 366 has 2 PCI IDE functions, one for primary and one * for secondary. So we need to call pciide_mapregs_compat() @@ -2918,6 +2919,7 @@ hpt_chip_map(sc, pa) sc->sc_wdcdev.nchannels = 1; } else { sc->sc_wdcdev.nchannels = 2; + sc->sc_wdcdev.UDMA_cap = 5; } for (i = 0; i < sc->sc_wdcdev.nchannels; i++) { cp = &sc->pciide_channels[i]; @@ -2958,7 +2960,6 @@ hpt_chip_map(sc, pa) return; } - void hpt_setup_channel(chp) struct channel_softc *chp; @@ -2989,6 +2990,8 @@ hpt_setup_channel(chp) /* add timing values, setup DMA if needed */ if (drvp->drive_flags & DRIVE_UDMA) { + /* use Ultra/DMA */ + drvp->drive_flags &= ~DRIVE_DMA; if ((cable & HPT_CSEL_CBLID(chp->channel)) != 0 && drvp->UDMA_mode > 2) drvp->UDMA_mode = 2; @@ -3253,6 +3256,8 @@ pdc202xx_setup_channel(chp) continue; mode = 0; if (drvp->drive_flags & DRIVE_UDMA) { + /* use Ultra/DMA */ + drvp->drive_flags &= ~DRIVE_DMA; mode = PDC2xx_TIM_SET_MB(mode, pdc2xx_udma_mb[drvp->UDMA_mode]); mode = PDC2xx_TIM_SET_MC(mode, diff --git a/sys/dev/pci/pciide_hpt_reg.h b/sys/dev/pci/pciide_hpt_reg.h index 0df168aefbb2..e9832427f942 100644 --- a/sys/dev/pci/pciide_hpt_reg.h +++ b/sys/dev/pci/pciide_hpt_reg.h @@ -1,4 +1,4 @@ -/* $NetBSD: pciide_hpt_reg.h,v 1.2 2000/07/27 15:26:16 bouyer Exp $ */ +/* $NetBSD: pciide_hpt_reg.h,v 1.3 2001/01/05 15:20:53 bouyer Exp $ */ /* * Copyright (c) 2000 Manuel Bouyer. @@ -125,4 +125,5 @@ static u_int32_t hpt370_pio[] = static u_int32_t hpt370_dma[] = {0x26514e97, 0x26514e33, 0x26514e21}; static u_int32_t hpt370_udma[] = - {0x16514e31, 0x164d4e31, 0x16494e31, 0x166d4e31, 0x16454e31}; + {0x16514e31, 0x164d4e31, 0x16494e31, 0x166d4e31, 0x16454e31, + 0x1a85f442};