Increase aarch64 MAXCPUS to 256.
This commit is contained in:
jmcneill
parent
cc53e0eeb8
commit
29224e5ead
@ -1,4 +1,4 @@
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/* $NetBSD: cpu.c,v 1.22 2019/10/14 22:53:05 jmcneill Exp $ */
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/* $NetBSD: cpu.c,v 1.23 2019/10/19 18:04:26 jmcneill Exp $ */
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/*
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* Copyright (c) 2017 Ryo Shimizu <ryo@nerv.org>
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@ -27,7 +27,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.22 2019/10/14 22:53:05 jmcneill Exp $");
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__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.23 2019/10/19 18:04:26 jmcneill Exp $");
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#include "locators.h"
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#include "opt_arm_debug.h"
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@ -69,8 +69,9 @@ static void cpu_setup_sysctl(device_t, struct cpu_info *);
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#ifdef MULTIPROCESSOR
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uint64_t cpu_mpidr[MAXCPUS];
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volatile u_int arm_cpu_hatched __cacheline_aligned = 0;
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volatile uint32_t arm_cpu_mbox __cacheline_aligned = 0;
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volatile u_int aarch64_cpu_mbox[MAXCPUS] __cacheline_aligned = { 0 };
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#define CPU_MBOX_HATCHED __BIT(0)
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#define CPU_MBOX_START __BIT(1)
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u_int arm_cpu_max = 1;
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static kmutex_t cpu_hatch_lock;
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@ -126,7 +127,7 @@ cpu_attach(device_t dv, cpuid_t id)
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/* ci_id is stored by own cpus when hatching */
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cpu_info[ncpu] = ci;
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if ((arm_cpu_hatched & __BIT(unit)) == 0) {
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if (cpu_hatched_p(unit) == 0) {
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ci->ci_dev = dv;
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dv->dv_private = ci;
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ci->ci_index = -1;
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@ -499,27 +500,35 @@ cpu_setup_sysctl(device_t dv, struct cpu_info *ci)
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void
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cpu_boot_secondary_processors(void)
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{
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u_int cpuno;
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if ((boothowto & RB_MD1) != 0)
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return;
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mutex_init(&cpu_hatch_lock, MUTEX_DEFAULT, IPL_NONE);
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VPRINTF("%s: writing mbox with %#x\n", __func__, arm_cpu_hatched);
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VPRINTF("%s: starting secondary processors\n", __func__);
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/* send mbox to have secondary processors do cpu_hatch() */
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atomic_or_32(&arm_cpu_mbox, arm_cpu_hatched);
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for (cpuno = 1; cpuno < ncpu; cpuno++) {
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if (cpu_hatched_p(cpuno) == false)
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continue;
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atomic_or_uint(&aarch64_cpu_mbox[cpuno], CPU_MBOX_START);
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}
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__asm __volatile ("sev; sev; sev");
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/* wait all cpus have done cpu_hatch() */
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while (membar_consumer(), arm_cpu_mbox & arm_cpu_hatched) {
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__asm __volatile ("wfe");
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for (cpuno = 1; cpuno < ncpu; cpuno++) {
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if (cpu_hatched_p(cpuno) == 0)
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continue;
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while (membar_consumer(), aarch64_cpu_mbox[cpuno] & CPU_MBOX_START) {
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__asm __volatile ("wfe");
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}
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/* Add processor to kcpuset */
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kcpuset_set(kcpuset_attached, cpuno);
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}
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VPRINTF("%s: secondary processors hatched\n", __func__);
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/* add available processors to kcpuset */
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uint32_t mbox = arm_cpu_hatched;
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kcpuset_export_u32(kcpuset_attached, &mbox, sizeof(mbox));
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}
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void
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@ -549,12 +558,20 @@ cpu_hatch(struct cpu_info *ci)
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#endif
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/*
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* clear my bit of arm_cpu_mbox to tell cpu_boot_secondary_processors().
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* clear my bit of aarch64_cpu_mbox to tell cpu_boot_secondary_processors().
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* there are cpu0,1,2,3, and if cpu2 is unresponsive,
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* ci_index are each cpu0=0, cpu1=1, cpu2=undef, cpu3=2.
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* therefore we have to use device_unit instead of ci_index for mbox.
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*/
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atomic_and_32(&arm_cpu_mbox, ~__BIT(device_unit(ci->ci_dev)));
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const u_int cpuno = device_unit(ci->ci_dev);
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atomic_and_uint(&aarch64_cpu_mbox[cpuno], ~(u_int)CPU_MBOX_START);
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__asm __volatile ("sev; sev; sev");
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}
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bool
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cpu_hatched_p(u_int cpuindex)
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{
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membar_consumer();
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return (aarch64_cpu_mbox[cpuindex] & CPU_MBOX_HATCHED) != 0;
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}
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#endif /* MULTIPROCESSOR */
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@ -1,4 +1,4 @@
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/* $NetBSD: locore.S,v 1.41 2019/09/29 08:33:20 skrll Exp $ */
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/* $NetBSD: locore.S,v 1.42 2019/10/19 18:04:26 jmcneill Exp $ */
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/*
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* Copyright (c) 2017 Ryo Shimizu <ryo@nerv.org>
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@ -38,7 +38,7 @@
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#include <aarch64/hypervisor.h>
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#include "assym.h"
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RCSID("$NetBSD: locore.S,v 1.41 2019/09/29 08:33:20 skrll Exp $")
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RCSID("$NetBSD: locore.S,v 1.42 2019/10/19 18:04:26 jmcneill Exp $")
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/*#define DEBUG_LOCORE /* debug print */
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@ -368,13 +368,12 @@ ENTRY_NP(cpu_mpstart)
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bne 1b
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mov x27, x1 /* x27 = cpuindex */
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mov x0, #1
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lsl x28, x0, x27 /* x28 = 1 << cpuindex */
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ADDR x0, _C_LABEL(aarch64_cpu_mbox)
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add x28, x0, x27, lsl #2 /* x28 = &aarch64_cpu_mbox[cpuindex] */
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/*
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* x27 = cpuindex
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* x28 = (1 << cpuindex)
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* x28 = &aarch64_cpu_mbox[cpuindex]
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*/
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/* set stack pointer for boot */
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@ -447,28 +446,25 @@ mp_vstart:
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mrs x1, mpidr_el1
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str x1, [x0, #CI_MPIDR] /* curcpu()->ci_mpidr = mpidr_el1 */
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CPU_DPRINTREG("arm_cpu_hatched |= ", x28)
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/*
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* atomic_or_32(&arm_cpu_hatched, (1 << cpuindex))
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* atomic_or_uint(&aarch64_cpu_mbox[cpuindex], 1)
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* to tell my activity to primary processor.
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*/
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ADDR x0, _C_LABEL(arm_cpu_hatched)
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mov x1, x28
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bl _C_LABEL(atomic_or_32) /* hatched! */
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mov x0, x28
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mov x1, #1
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bl _C_LABEL(atomic_or_uint) /* hatched! */
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dsb sy
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sev
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/* wait for my bit of arm_cpu_mbox become true */
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ADDR x0, _C_LABEL(arm_cpu_mbox)
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/* wait for the mailbox start bit to become true */
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1:
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dmb sy
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ldr x20, [x0]
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tst x20, x28
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ldr x20, [x28]
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tst x20, #2
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bne 9f
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wfe
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b 1b
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9:
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// CPU_DPRINTREG("got arm_cpu_mbox = ", x20)
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/* fill my cpu_info */
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mrs x0, tpidr_el1 /* curcpu() */
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.h,v 1.13 2018/12/21 08:01:01 ryo Exp $ */
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/* $NetBSD: cpu.h,v 1.14 2019/10/19 18:04:26 jmcneill Exp $ */
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/*-
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* Copyright (c) 2014 The NetBSD Foundation, Inc.
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@ -126,8 +126,8 @@ void cpu_mpstart(void);
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void cpu_hatch(struct cpu_info *);
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extern struct cpu_info *cpu_info[];
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extern volatile u_int arm_cpu_hatched; /* MULTIPROCESSOR */
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extern uint64_t cpu_mpidr[]; /* MULTIPROCESSOR */
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bool cpu_hatched_p(u_int); /* MULTIPROCESSOR */
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#define CPU_INFO_ITERATOR cpuid_t
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#ifdef MULTIPROCESSOR
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@ -1,4 +1,4 @@
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/* $NetBSD: param.h,v 1.11 2019/01/19 09:11:55 skrll Exp $ */
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/* $NetBSD: param.h,v 1.12 2019/10/19 18:04:26 jmcneill Exp $ */
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/*-
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* Copyright (c) 2014 The NetBSD Foundation, Inc.
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@ -129,6 +129,8 @@
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#define COHERENCY_UNIT 128
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#define CACHE_LINE_SIZE 128
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#define MAXCPUS 256
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#ifdef _KERNEL
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#ifndef __HIDE_DELAY
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu_acpi.c,v 1.6 2019/05/23 15:54:28 ryo Exp $ */
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/* $NetBSD: cpu_acpi.c,v 1.7 2019/10/19 18:04:26 jmcneill Exp $ */
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/*-
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* Copyright (c) 2018 The NetBSD Foundation, Inc.
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@ -33,7 +33,7 @@
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#include "opt_multiprocessor.h"
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: cpu_acpi.c,v 1.6 2019/05/23 15:54:28 ryo Exp $");
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__KERNEL_RCSID(0, "$NetBSD: cpu_acpi.c,v 1.7 2019/10/19 18:04:26 jmcneill Exp $");
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#include <sys/param.h>
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#include <sys/bus.h>
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@ -41,6 +41,7 @@ __KERNEL_RCSID(0, "$NetBSD: cpu_acpi.c,v 1.6 2019/05/23 15:54:28 ryo Exp $");
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#include <sys/device.h>
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#include <sys/interrupt.h>
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#include <sys/kcpuset.h>
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#include <sys/reboot.h>
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#include <dev/acpi/acpireg.h>
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#include <dev/acpi/acpivar.h>
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@ -99,7 +100,7 @@ cpu_acpi_attach(device_t parent, device_t self, void *aux)
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struct cpu_info *ci = &cpu_info_store[unit];
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#ifdef MULTIPROCESSOR
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if (cpu_mpidr_aff_read() != mpidr) {
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if (cpu_mpidr_aff_read() != mpidr && (boothowto & RB_MD1) == 0) {
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const u_int cpuindex = device_unit(self);
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int error;
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@ -116,9 +117,8 @@ cpu_acpi_attach(device_t parent, device_t self, void *aux)
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__asm __volatile("sev" ::: "memory");
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for (u_int i = 0x10000000; i > 0; i--) {
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membar_consumer();
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if (arm_cpu_hatched & __BIT(cpuindex))
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break;
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if (cpu_hatched_p(cpuindex))
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break;
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}
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}
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#endif /* MULTIPROCESSOR */
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.c,v 1.132 2019/09/29 06:51:45 skrll Exp $ */
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/* $NetBSD: cpu.c,v 1.133 2019/10/19 18:04:26 jmcneill Exp $ */
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/*
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* Copyright (c) 1995 Mark Brinicombe.
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@ -46,7 +46,7 @@
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#include "opt_multiprocessor.h"
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.132 2019/09/29 06:51:45 skrll Exp $");
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__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.133 2019/10/19 18:04:26 jmcneill Exp $");
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#include <sys/param.h>
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#include <sys/conf.h>
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@ -130,7 +130,7 @@ cpu_attach(device_t dv, cpuid_t id)
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ci->ci_undefsave[2] = cpu_info_store.ci_undefsave[2];
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cpu_info[unit] = ci;
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if ((arm_cpu_hatched & __BIT(unit)) == 0) {
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if (cpu_hatched_p(unit) == false) {
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ci->ci_dev = dv;
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dv->dv_private = ci;
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aprint_naive(": disabled\n");
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@ -239,6 +239,13 @@ cpu_attach(device_t dv, cpuid_t id)
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vfp_attach(ci); /* XXX SMP */
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}
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bool
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cpu_hatched_p(u_int cpuindex)
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{
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membar_consumer();
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return (arm_cpu_hatched & __BIT(cpuindex)) != 0;
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}
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enum cpu_class {
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CPU_CLASS_NONE,
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CPU_CLASS_ARM2,
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu_fdt.c,v 1.27 2019/10/17 21:52:26 bad Exp $ */
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/* $NetBSD: cpu_fdt.c,v 1.28 2019/10/19 18:04:26 jmcneill Exp $ */
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/*-
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* Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
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@ -30,7 +30,7 @@
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#include "psci_fdt.h"
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: cpu_fdt.c,v 1.27 2019/10/17 21:52:26 bad Exp $");
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__KERNEL_RCSID(0, "$NetBSD: cpu_fdt.c,v 1.28 2019/10/19 18:04:26 jmcneill Exp $");
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#include <sys/param.h>
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#include <sys/atomic.h>
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@ -308,8 +308,7 @@ arm_fdt_cpu_mpstart(void)
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/* Wait for AP to start */
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for (i = 0x10000000; i > 0; i--) {
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membar_consumer();
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if (arm_cpu_hatched & __BIT(cpuindex))
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if (cpu_hatched_p(cpuindex))
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break;
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.h,v 1.100 2019/01/03 10:26:41 skrll Exp $ */
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/* $NetBSD: cpu.h,v 1.101 2019/10/19 18:04:26 jmcneill Exp $ */
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/*
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* Copyright (c) 1994-1996 Mark Brinicombe.
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@ -253,8 +253,8 @@ extern struct cpu_info *cpu_info[];
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#if defined(MULTIPROCESSOR)
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extern volatile u_int arm_cpu_hatched;
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extern uint32_t cpu_mpidr[];
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bool cpu_hatched_p(u_int);
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void cpu_mpstart(void);
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void cpu_init_secondary_processor(int);
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