get up-to-date (splimp->splvm, cleanup, sprinkle pmap_update())
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@ -1,4 +1,4 @@
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/* $NetBSD: pmap.c,v 1.1 2001/05/14 18:23:03 drochner Exp $ */
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/* $NetBSD: pmap.c,v 1.2 2001/05/16 18:47:04 drochner Exp $ */
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/*
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* Copyright (c) 1991, 1993
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@ -620,7 +620,7 @@ pmap_collect_pv()
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for (ph = &pv_table[page_cnt - 1]; ph >= &pv_table[0]; ph--) {
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if (ph->pv_pmap == 0)
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continue;
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s = splimp();
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s = splvm();
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for (ppv = ph; (pv = ppv->pv_next) != 0; ) {
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pvp = (struct pv_page *) trunc_page((vaddr_t)pv);
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if (pvp->pvp_pgi.pgi_nfree == -1) {
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@ -676,6 +676,7 @@ pmap_map(va, spa, epa, prot)
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va += NBPG;
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spa += NBPG;
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}
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pmap_update();
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return (va);
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}
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@ -980,7 +981,7 @@ pmap_page_protect(pg, prot)
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break;
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}
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pv = pa_to_pvh(pa);
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s = splimp();
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s = splvm();
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while (pv->pv_pmap != NULL) {
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pt_entry_t *pte;
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@ -1128,9 +1129,6 @@ pmap_enter(pmap, va, pa, prot, flags)
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("pmap_enter(%p, %lx, %lx, %x, %x)\n",
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pmap, va, pa, prot, wired));
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if (pmap == NULL)
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return (0);
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#ifdef DIAGNOSTIC
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/*
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* pmap_enter() should never be used for CADDR1 and CADDR2.
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@ -1215,7 +1213,7 @@ pmap_enter(pmap, va, pa, prot, flags)
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int s;
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pv = pa_to_pvh(pa);
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s = splimp();
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s = splvm();
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PMAP_DPRINTF(PDB_ENTER,
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("enter: pv at %p: %lx/%p/%p\n",
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pv, pv->pv_va, pv->pv_pmap, pv->pv_next));
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@ -1530,24 +1528,6 @@ pmap_copy(dst_pmap, src_pmap, dst_addr, len, src_addr)
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dst_pmap, src_pmap, dst_addr, len, src_addr));
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}
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#if 0
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/*
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* pmap_update:
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*
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* Require that all active physical maps contain no
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* incorrect entires NOW, by processing any deferred
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* pmap operations.
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*/
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void
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pmap_update()
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{
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PMAP_DPRINTF(PDB_FOLLOW, ("pmap_update()\n"));
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TBIA(); /* XXX should not be here. */
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}
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#endif
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/*
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* pmap_collect: [ INTERFACE ]
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*
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@ -1573,7 +1553,7 @@ pmap_collect(pmap)
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* XXX pages much differently.
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*/
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s = splimp();
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s = splvm();
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for (bank = 0; bank < vm_nphysseg; bank++)
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pmap_collect1(pmap, ptoa(vm_physmem[bank].start),
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ptoa(vm_physmem[bank].end));
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@ -1586,6 +1566,7 @@ pmap_collect(pmap)
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* all necessary locking.
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*/
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pmap_remove(pmap, VM_MIN_ADDRESS, VM_MAX_ADDRESS);
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pmap_update();
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}
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#ifdef notyet
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@ -1710,7 +1691,7 @@ ok:
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* machine dependent page at a time.
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*
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* Note: WE DO NOT CURRENTLY LOCK THE TEMPORARY ADDRESSES!
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* (Actually, we go to splimp(), and since we don't
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* (Actually, we go to splvm(), and since we don't
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* support multiple processors, this is sufficient.)
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*/
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void
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@ -1743,7 +1724,7 @@ pmap_zero_page(phys)
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}
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#endif
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s = splimp();
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s = splvm();
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*caddr1_pte = npte;
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TBIS((vaddr_t)CADDR1);
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@ -1766,7 +1747,7 @@ pmap_zero_page(phys)
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* dependent page at a time.
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*
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* Note: WE DO NOT CURRENTLY LOCK THE TEMPORARY ADDRESSES!
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* (Actually, we go to splimp(), and since we don't
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* (Actually, we go to splvm(), and since we don't
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* support multiple processors, this is sufficient.)
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*/
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void
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@ -1802,7 +1783,7 @@ pmap_copy_page(src, dst)
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}
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#endif
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s = splimp();
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s = splvm();
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*caddr1_pte = npte1;
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TBIS((vaddr_t)CADDR1);
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@ -2102,7 +2083,7 @@ pmap_remove_mapping(pmap, va, pte, flags)
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*/
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pv = pa_to_pvh(pa);
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ste = ST_ENTRY_NULL;
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s = splimp();
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s = splvm();
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/*
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* If it is the first entry on the list, it is actually
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* in the header and we must copy the following entry up
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@ -2252,7 +2233,7 @@ pmap_testbit(pa, bit)
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return(FALSE);
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pv = pa_to_pvh(pa);
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s = splimp();
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s = splvm();
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/*
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* Check saved info first
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*/
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@ -2312,7 +2293,7 @@ pmap_changebit(pa, set, mask)
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return;
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pv = pa_to_pvh(pa);
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s = splimp();
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s = splvm();
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/*
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* Clear saved attributes (modify, reference)
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@ -2477,7 +2458,7 @@ pmap_enter_ptpage(pmap, va)
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if (pmap == pmap_kernel()) {
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struct kpt_page *kpt;
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s = splimp();
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s = splvm();
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if ((kpt = kpt_free_list) == (struct kpt_page *)0) {
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/*
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* No PT pages available.
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@ -2496,6 +2477,7 @@ pmap_enter_ptpage(pmap, va)
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bzero((caddr_t)kpt->kpt_va, NBPG);
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pmap_enter(pmap, va, ptpa, VM_PROT_DEFAULT,
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VM_PROT_DEFAULT|PMAP_WIRED);
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pmap_update();
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#ifdef DEBUG
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if (pmapdebug & (PDB_ENTER|PDB_PTPAGE)) {
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int ix = pmap_ste(pmap, va) - pmap_ste(pmap, 0);
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@ -2557,7 +2539,7 @@ pmap_enter_ptpage(pmap, va)
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* the STE when we remove the mapping for the page.
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*/
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pv = pa_to_pvh(ptpa);
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s = splimp();
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s = splvm();
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if (pv) {
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pv->pv_flags |= PV_PTPAGE;
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do {
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