finish moving context management back to being global. add a new ctx_lock
for context administration.
This commit is contained in:
mrg
parent
717b628383
commit
28bd948dba
@ -1,4 +1,4 @@
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/* $NetBSD: cpuvar.h,v 1.32 2001/05/30 12:30:41 mrg Exp $ */
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/* $NetBSD: cpuvar.h,v 1.33 2001/06/03 04:03:29 mrg Exp $ */
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/*
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* Copyright (c) 1996 The NetBSD Foundation, Inc.
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@ -42,6 +42,7 @@
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#if defined(_KERNEL_OPT)
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#include "opt_multiprocessor.h"
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#include "opt_lockdebug.h"
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#include "opt_ddb.h"
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#endif
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#include <sys/device.h>
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@ -180,10 +181,6 @@ struct cpu_info {
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/* Context administration */
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int *ctx_tbl; /* [4m] SRMMU-edible context table */
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paddr_t ctx_tbl_pa; /* [4m] ctx table physical address */
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union ctxinfo *ctxinfo;
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union ctxinfo *ctx_freelist; /* context free list */
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int ctx_kick; /* allocation rover when none free */
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int ctx_kickdir; /* ctx_kick roves both directions */
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/* XXX - of these, we currently use only cpu_type */
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int arch; /* Architecture: CPU_SUN4x */
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@ -381,6 +378,10 @@ struct cpu_info {
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#define CPUFLG_SUN4CACHEBUG 0x8 /* trap page can't be cached */
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#define CPUFLG_CACHE_MANDATORY 0x10 /* if cache is on, don't use
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uncached access */
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#define CPUFLG_STARTUP 0x2000 /* CPU is waiting for startup */
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#define CPUFLG_PAUSED 0x4000 /* CPU is paused */
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#define CPUFLG_GOTMSG 0x8000 /* CPU got an IPI */
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#define CPU_INFO_ITERATOR int
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#define CPU_INFO_FOREACH(cii, ci) cii = 0; ci = cpus[cii], cii < ncpu; cii++
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@ -1,4 +1,4 @@
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/* $NetBSD: pmap.c,v 1.192 2001/05/26 10:22:33 pk Exp $ */
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/* $NetBSD: pmap.c,v 1.193 2001/06/03 04:03:28 mrg Exp $ */
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/*
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* Copyright (c) 1996
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@ -320,10 +320,12 @@ union ctxinfo {
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struct pmap *c_pmap; /* pmap (if busy) */
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};
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#define ncontext (cpuinfo.mmu_ncontext)
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#define ctx_kick (cpuinfo.ctx_kick)
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#define ctx_kickdir (cpuinfo.ctx_kickdir)
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#define ctx_freelist (cpuinfo.ctx_freelist)
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static struct simplelock ctx_lock; /* lock for below */
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union ctxinfo *ctxinfo; /* allocated at in pmap_bootstrap */
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union ctxinfo *ctx_freelist; /* context free list */
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int ctx_kick; /* allocation rover when none free */
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int ctx_kickdir; /* ctx_kick roves both directions */
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int ncontext; /* sizeof ctx_freelist */
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void ctx_alloc __P((struct pmap *));
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void ctx_free __P((struct pmap *));
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@ -1697,9 +1699,10 @@ ctx_alloc(pm)
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}
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s = splvm();
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simple_lock(&ctx_lock);
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if ((c = ctx_freelist) != NULL) {
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ctx_freelist = c->c_nextfree;
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cnum = c - cpuinfo.ctxinfo;
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cnum = c - ctxinfo;
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doflush = 0;
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} else {
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if ((ctx_kick += ctx_kickdir) >= ncontext) {
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@ -1709,7 +1712,7 @@ ctx_alloc(pm)
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ctx_kick = 1;
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ctx_kickdir = 1;
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}
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c = &cpuinfo.ctxinfo[cnum = ctx_kick];
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c = &ctxinfo[cnum = ctx_kick];
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#ifdef DEBUG
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if (c->c_pmap == NULL)
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panic("ctx_alloc cu_pmap");
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@ -1726,6 +1729,7 @@ ctx_alloc(pm)
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gap_end = c->c_pmap->pm_gap_end;
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}
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}
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simple_unlock(&ctx_lock);
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c->c_pmap = pm;
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pm->pm_ctx = c;
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@ -1831,6 +1835,7 @@ ctx_alloc(pm)
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* Note on multi-threaded processes: a context must remain
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* valid as long as any thread is still running on a cpu.
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*/
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simple_lock(&pm->pm_lock);
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#if defined(MULTIPROCESSOR)
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for (i = 0; i < ncpu; i++)
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#else
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@ -1846,6 +1851,7 @@ ctx_alloc(pm)
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(pm->pm_reg_ptps_pa[i] >> SRMMU_PPNPASHIFT) |
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SRMMU_TEPTD);
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}
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simple_unlock(&pm->pm_lock);
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/* Set context if not yet done above to flush the cache */
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if (!doflush)
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@ -1896,8 +1902,10 @@ ctx_free(pm)
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}
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setcontext(oldc);
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simple_lock(&ctx_lock);
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c->c_nextfree = ctx_freelist;
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ctx_freelist = c;
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simple_unlock(&ctx_lock);
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}
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@ -2695,6 +2703,8 @@ pmap_bootstrap4_4c(nctx, nregion, nsegment)
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extern char *esym;
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#endif
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ncontext = nctx;
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switch (cputyp) {
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case CPU_SUN4C:
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mmu_has_hole = 1;
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@ -2807,7 +2817,7 @@ pmap_bootstrap4_4c(nctx, nregion, nsegment)
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p += nsegment * sizeof(struct mmuentry);
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bzero(mmusegments, nsegment * sizeof(struct mmuentry));
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pmap_kernel()->pm_ctx = cpuinfo.ctxinfo = ci = (union ctxinfo *)p;
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pmap_kernel()->pm_ctx = ctxinfo = ci = (union ctxinfo *)p;
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p += nctx * sizeof *ci;
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/* Initialize MMU resource queues */
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@ -2849,6 +2859,7 @@ pmap_bootstrap4_4c(nctx, nregion, nsegment)
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*
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* XXX sun4c could use context 0 for users?
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*/
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simple_lock_init(&ctx_lock);
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ci->c_pmap = pmap_kernel();
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ctx_freelist = ci + 1;
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for (i = 1; i < ncontext; i++) {
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@ -3071,6 +3082,8 @@ pmap_bootstrap4m(void)
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extern char *esym;
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#endif
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ncontext = cpuinfo.mmu_ncontext;
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#if defined(SUN4) || defined(SUN4C) /* setup 4M fn. ptrs for dual-arch kernel */
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pmap_clear_modify_p = pmap_clear_modify4m;
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pmap_clear_reference_p = pmap_clear_reference4m;
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@ -3131,7 +3144,7 @@ pmap_bootstrap4m(void)
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bzero(q, (u_int)p - (u_int)q);
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/* Allocate context administration */
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pmap_kernel()->pm_ctx = cpuinfo.ctxinfo = ci = (union ctxinfo *)p;
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pmap_kernel()->pm_ctx = ctxinfo = ci = (union ctxinfo *)p;
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p += ncontext * sizeof *ci;
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bzero((caddr_t)ci, (u_int)p - (u_int)ci);
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@ -3271,6 +3284,7 @@ pmap_bootstrap4m(void)
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/*
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* Set up the ctxinfo structures (freelist of contexts)
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*/
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simple_lock_init(&ctx_lock);
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ci->c_pmap = pmap_kernel();
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ctx_freelist = ci + 1;
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for (i = 1; i < ncontext; i++) {
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@ -3760,11 +3774,14 @@ pmap_pmap_pool_ctor(void *arg, void *object, int flags)
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/* Copy kernel regions */
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kpt = &pmap_kernel()->pm_reg_ptps[n][VA_VREG(KERNBASE)];
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for (i = 0; i < NKREG; i++) {
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setpgt4m(upt++, kpt[i]);
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int j = kpt[i];
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setpgt4m(upt++, j);
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}
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}
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}
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#endif
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return (0);
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}
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@ -4892,7 +4909,9 @@ pmap_page_protect4m(pg, prot)
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flags = pv->pv_flags & ~(PV_NC|PV_ANC);
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while (pv != NULL) {
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pm = pv->pv_pmap;
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simple_lock(&pm->pm_lock);
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va = pv->pv_va;
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vr = VA_VREG(va);
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vs = VA_VSEG(va);
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@ -4956,6 +4975,7 @@ pmap_page_protect4m(pg, prot)
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npv = pv->pv_next;
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if (pv != pv0)
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pool_put(&pv_pool, pv);
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simple_unlock(&pm->pm_lock);
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pv = npv;
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}
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@ -5097,6 +5117,7 @@ pmap_changeprot4m(pm, va, prot, wired)
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pmap_stats.ps_changeprots++;
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s = splvm(); /* conservative */
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simple_lock(&pm->pm_lock);
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rp = &pm->pm_regmap[VA_VREG(va)];
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sp = &rp->rg_segmap[VA_VSEG(va)];
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@ -5129,6 +5150,7 @@ pmap_changeprot4m(pm, va, prot, wired)
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(pte & ~SRMMU_PROT_MASK) | newprot);
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out:
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simple_unlock(&pm->pm_lock);
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splx(s);
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}
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#endif /* SUN4M */
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