From 28626d96e1841ac9344d8500afdb44578f1326d2 Mon Sep 17 00:00:00 2001 From: palle Date: Thu, 4 Sep 2014 18:48:29 +0000 Subject: [PATCH] sun4v: All cpus must be setup with a TSB descriptor, so pmap_setup_tsb_sun4v() must take a pointer to the TSB descriptor --- sys/arch/sparc64/include/cpu.h | 8 +++++- sys/arch/sparc64/include/pmap.h | 7 +++-- sys/arch/sparc64/sparc64/genassym.cf | 3 +- sys/arch/sparc64/sparc64/locore.s | 3 +- sys/arch/sparc64/sparc64/pmap.c | 41 ++++++++++++---------------- 5 files changed, 34 insertions(+), 28 deletions(-) diff --git a/sys/arch/sparc64/include/cpu.h b/sys/arch/sparc64/include/cpu.h index 48f7c1208be3..b4adb3bdba73 100644 --- a/sys/arch/sparc64/include/cpu.h +++ b/sys/arch/sparc64/include/cpu.h @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.111 2014/06/08 17:33:24 palle Exp $ */ +/* $NetBSD: cpu.h,v 1.112 2014/09/04 18:48:29 palle Exp $ */ /* * Copyright (c) 1992, 1993 @@ -71,6 +71,9 @@ #include #include #endif +#ifdef SUN4V +#include +#endif #include #include @@ -174,6 +177,9 @@ struct cpu_info { pte_t *ci_tsb_dmmu; pte_t *ci_tsb_immu; + /* TSB description (sun4v). */ + struct tsb_desc *ci_tsb_desc; + /* MMU Fault Status Area (sun4v). * Will be initialized to the physical address of the bottom of * the interrupt stack. diff --git a/sys/arch/sparc64/include/pmap.h b/sys/arch/sparc64/include/pmap.h index b6e7fcdabbf7..7c6bb49a92ca 100644 --- a/sys/arch/sparc64/include/pmap.h +++ b/sys/arch/sparc64/include/pmap.h @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.58 2014/04/14 10:54:08 martin Exp $ */ +/* $NetBSD: pmap.h,v 1.59 2014/09/04 18:48:29 palle Exp $ */ /*- * Copyright (C) 1995, 1996 Wolfgang Solfrank. @@ -40,6 +40,9 @@ #include #ifdef _KERNEL #include +#ifdef SUN4V +#include +#endif #endif #endif @@ -234,7 +237,7 @@ void pmap_zero_page_phys(paddr_t); #ifdef SUN4V /* sun4v specific */ void pmap_setup_intstack_sun4v(paddr_t); -void pmap_setup_tsb_sun4v(void); +void pmap_setup_tsb_sun4v(struct tsb_desc*); #endif /* Installed physical memory, as discovered during bootstrap. */ diff --git a/sys/arch/sparc64/sparc64/genassym.cf b/sys/arch/sparc64/sparc64/genassym.cf index 2251a58f9717..6165cfcfc206 100644 --- a/sys/arch/sparc64/sparc64/genassym.cf +++ b/sys/arch/sparc64/sparc64/genassym.cf @@ -1,4 +1,4 @@ -# $NetBSD: genassym.cf,v 1.73 2014/02/21 18:00:09 palle Exp $ +# $NetBSD: genassym.cf,v 1.74 2014/09/04 18:48:29 palle Exp $ # # Copyright (c) 1997 The NetBSD Foundation, Inc. @@ -168,6 +168,7 @@ define CI_CTXBUSY offsetof(struct cpu_info, ci_ctxbusy) define CI_TSB_DMMU offsetof(struct cpu_info, ci_tsb_dmmu) define CI_TSB_IMMU offsetof(struct cpu_info, ci_tsb_immu) define CI_MMFSA offsetof(struct cpu_info, ci_mmfsa) +define CI_TSB_DESC offsetof(struct cpu_info, ci_tsb_desc) ifdef MULTIPROCESSOR define CI_IPIEVC offsetof(struct cpu_info, ci_ipi_evcnt[0].ev_count) endif diff --git a/sys/arch/sparc64/sparc64/locore.s b/sys/arch/sparc64/sparc64/locore.s index f5e9a05465fa..fda875a484c0 100644 --- a/sys/arch/sparc64/sparc64/locore.s +++ b/sys/arch/sparc64/sparc64/locore.s @@ -1,4 +1,4 @@ -/* $NetBSD: locore.s,v 1.371 2014/08/31 18:49:42 palle Exp $ */ +/* $NetBSD: locore.s,v 1.372 2014/09/04 18:48:29 palle Exp $ */ /* * Copyright (c) 2006-2010 Matthew R. Green @@ -4521,6 +4521,7 @@ ENTRY_NOPROFILE(cpu_initialize) /* for cosmetic reasons - nicer backtrace */ nop /* sun4v */ + LDPTR [%l7 + CI_TSB_DESC], %o0 call _C_LABEL(pmap_setup_tsb_sun4v) nop ba 1f diff --git a/sys/arch/sparc64/sparc64/pmap.c b/sys/arch/sparc64/sparc64/pmap.c index 5666dacfa9fc..b1614eca0314 100644 --- a/sys/arch/sparc64/sparc64/pmap.c +++ b/sys/arch/sparc64/sparc64/pmap.c @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.c,v 1.289 2014/07/10 06:24:02 jdc Exp $ */ +/* $NetBSD: pmap.c,v 1.290 2014/09/04 18:48:29 palle Exp $ */ /* * * Copyright (C) 1996-1999 Eduardo Horvath. @@ -26,7 +26,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.289 2014/07/10 06:24:02 jdc Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.290 2014/09/04 18:48:29 palle Exp $"); #undef NO_VCACHE /* Don't forget the locked TLB in dostart */ #define HWREF @@ -149,10 +149,6 @@ int tsbsize; /* tsbents = 512 * 2^^tsbsize */ #define TSBENTS (512<ci_spinup = main; /* Call main when we're running. */ cpus->ci_paddr = cpu0paddr; #ifdef SUN4V - if (CPU_ISSUN4V) + if (CPU_ISSUN4V) { cpus->ci_mmfsa = cpu0paddr; + cpus->ci_tsb_desc = NULL; + } #endif cpus->ci_cpcb = (struct pcb *)u0va; cpus->ci_idepth = -1; @@ -1244,22 +1242,21 @@ cpu_pmap_prepare(struct cpu_info *ci, bool initial) } #ifdef SUN4V - if (initial && CPU_ISSUN4V) { - tsb_desc = (struct tsb_desc *)kdata_alloc( + if (CPU_ISSUN4V) { + ci->ci_tsb_desc = (struct tsb_desc *)kdata_alloc( sizeof(struct tsb_desc), 16); - memset(tsb_desc, 0, sizeof(struct tsb_desc)); + memset(ci->ci_tsb_desc, 0, sizeof(struct tsb_desc)); /* 8K page size used for TSB index computation */ - tsb_desc->td_idxpgsz = 0; - tsb_desc->td_assoc = 1; - tsb_desc->td_size = TSBENTS; - tsb_desc->td_ctxidx = -1; - tsb_desc->td_pgsz = 0xf; - tsb_desc->td_pa = pmap_kextract((vaddr_t)ci->ci_tsb_dmmu); + ci->ci_tsb_desc->td_idxpgsz = 0; + ci->ci_tsb_desc->td_assoc = 1; + ci->ci_tsb_desc->td_size = TSBENTS; + ci->ci_tsb_desc->td_ctxidx = -1; + ci->ci_tsb_desc->td_pgsz = 0xf; + ci->ci_tsb_desc->td_pa = pmap_kextract((vaddr_t)ci->ci_tsb_dmmu); BDPRINTF(PDB_BOOT1, ("cpu %d: TSB descriptor allocated at %p " "size %08x - td_pa at %p\n", - ci->ci_index, tsb_desc, sizeof(struct tsb_desc), - tsb_desc->td_pa)); - + ci->ci_index, ci->ci_tsb_desc, sizeof(struct tsb_desc), + ci->ci_tsb_desc->td_pa)); } #endif @@ -3808,14 +3805,12 @@ pmap_setup_intstack_sun4v(paddr_t pa) } void -pmap_setup_tsb_sun4v(void) +pmap_setup_tsb_sun4v(struct tsb_desc* tsb_desc) { int err; - extern struct tsb_desc *tsb_desc; - extern paddr_t pmap_kextract(vaddr_t va); paddr_t tsb_desc_p; tsb_desc_p = pmap_kextract((vaddr_t)tsb_desc); - if ( !tsb_desc_p ) { + if (!tsb_desc_p) { panic("pmap_setup_tsb_sun4v() pmap_kextract() failed"); } err = hv_mmu_tsb_ctx0(1, tsb_desc_p);