preliminary support for com type UART in IT8712 superio chip

attached at LPC bus at Gemini LPC Host Controller at obio on Gemini.
This commit is contained in:
cliff 2008-11-09 09:15:42 +00:00
parent 3100fdac39
commit 2842dccfaa
7 changed files with 874 additions and 0 deletions

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/* $NetBSD: gemini_lpc.c,v 1.1 2008/11/09 09:15:42 cliff Exp $ */
#include "opt_gemini.h"
#include "locators.h"
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: gemini_lpc.c,v 1.1 2008/11/09 09:15:42 cliff Exp $");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <arch/arm/gemini/gemini_lpcvar.h>
#include <arch/arm/gemini/gemini_lpchcvar.h>
#include <arch/arm/gemini/gemini_reg.h>
/* XXX these should be in lpcreg.h or it8721reg.h */
#define IT8712_CFGCTL 0x02
# define CFGCTL_WAITKEY __BIT(1)
#define IT8712_LDN 0x07
#define IT8712_CHIPID1 0x20
#define IT8712_CHIPID2 0x21
#define IT8712_CSCV 0x22
# define CSCV_VERSION __BITS(3,0);
#define IT8712_CLKSEL 0x23
#define IT8712_SWSUSPEND 0x24
#define IT8712_ADDR 0x2e
#define IT8712_DATA 0x2f
static int gemini_lpc_match(struct device *, struct cfdata *, void *);
static void gemini_lpc_attach(struct device *, struct device *, void *);
static int gemini_lpc_search(device_t, cfdata_t, const int *, void *);
static int gemini_lpc_busprint(void *, const char *);
static uint8_t it8712_pnp_read(lpctag_t, int, uint);
static void it8712_pnp_write(lpctag_t, int, uint, uint8_t);
static void it8712_pnp_enter(lpctag_t);
static void it8712_pnp_exit(lpctag_t);
CFATTACH_DECL_NEW(lpc, sizeof(struct gemini_lpc_softc),
gemini_lpc_match, gemini_lpc_attach, NULL, NULL);
static gemini_lpc_bus_ops_t gemini_lpc_bus_ops = {
it8712_pnp_read,
it8712_pnp_write,
it8712_pnp_enter,
it8712_pnp_exit,
gemini_lpchc_intr_establish,
gemini_lpchc_intr_disestablish,
};
static int
gemini_lpc_match(struct device *parent, struct cfdata *cf, void *aux)
{
struct gemini_lpc_attach_args *lpc = aux;
if (lpc->lpc_addr == LPCCF_ADDR_DEFAULT)
panic("lpc must have addr specified in config.");
return 1;
}
static void
gemini_lpc_attach(struct device *parent, struct device *self, void *aux)
{
gemini_lpc_softc_t *sc = device_private(self);
struct gemini_lpchc_attach_args *lpchc = aux;
bus_space_tag_t iot;
bus_space_handle_t ioh;
uint8_t id1, id2, vers, clk, susp;
sc->sc_addr = lpchc->lpchc_addr;
#if 0
sc->sc_size = lpchc->lpchc_size;
#else
/*
* we just map the configuration registers
* child devices can map their own I/O
*/
sc->sc_size = 4096;
#endif
iot = lpchc->lpchc_iot;
if (bus_space_map(iot, sc->sc_addr, sc->sc_size, 0, &ioh))
panic("%s: Cannot map registers", device_xname(self));
sc->sc_iot = iot;
sc->sc_ioh = ioh;
it8712_pnp_enter(sc);
id1 = it8712_pnp_read(sc, GEMINI_LPC_LDN_ALL, IT8712_CHIPID1);
id2 = it8712_pnp_read(sc, GEMINI_LPC_LDN_ALL, IT8712_CHIPID2);
vers = it8712_pnp_read(sc, GEMINI_LPC_LDN_ALL, IT8712_CSCV);
vers &= CSCV_VERSION;
clk = it8712_pnp_read(sc, GEMINI_LPC_LDN_ALL, IT8712_CLKSEL);
susp = it8712_pnp_read(sc, GEMINI_LPC_LDN_ALL, IT8712_SWSUSPEND);
it8712_pnp_exit(sc);
aprint_normal("\n%s: chip ID %x%x, version %d",
device_xname(self), id1, id2, vers);
aprint_normal("\n%s: clksel %#x, susp %#x ",
device_xname(self), clk, susp);
sc->sc_lpchctag = lpchc->lpchc_tag;
aprint_normal("\n");
aprint_naive("\n");
/*
* attach the rest of our devices
*/
config_search_ia(gemini_lpc_search, self, "lpc", NULL);
}
static int
gemini_lpc_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
{
gemini_lpc_softc_t *sc = device_private(parent);
gemini_lpc_attach_args_t lpc;
lpc.lpc_ldn = cf->cf_loc[LPCCF_LDN];
lpc.lpc_addr = cf->cf_loc[LPCCF_ADDR];
lpc.lpc_size = cf->cf_loc[LPCCF_SIZE];
lpc.lpc_intr = cf->cf_loc[LPCCF_INTR];
lpc.lpc_iot = sc->sc_iot;
lpc.lpc_tag = sc;
lpc.lpc_base = sc->sc_addr;
lpc.lpc_intrtag = sc->sc_lpchctag;
lpc.lpc_bus_ops = &gemini_lpc_bus_ops;
if (config_match(parent, cf, &lpc)) {
config_attach(parent, cf, &lpc, gemini_lpc_busprint);
return 0; /* love it */
}
return UNCONF; /* hate it */
}
static int
gemini_lpc_busprint(void *aux, const char *name)
{
struct gemini_lpc_attach_args *lpc = aux;
if (lpc->lpc_ldn != LPCCF_LDN_DEFAULT)
aprint_normal(" ldn %d", lpc->lpc_ldn);
if (lpc->lpc_addr != LPCCF_ADDR_DEFAULT)
aprint_normal(" addr %#lx", lpc->lpc_addr);
if (lpc->lpc_size != LPCCF_SIZE_DEFAULT)
aprint_normal(" size %#lx", lpc->lpc_size);
if (lpc->lpc_intr != LPCCF_INTR_DEFAULT)
aprint_normal(" intr %d", lpc->lpc_intr);
return UNCONF;
}
/*
* LPC bus ops
*/
static uint8_t
it8712_pnp_read(lpctag_t tag, int ldn, uint index)
{
gemini_lpc_softc_t *sc = tag;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
if (ldn != GEMINI_LPC_LDN_ALL) {
bus_space_write_1(iot, ioh, IT8712_ADDR, IT8712_LDN);
bus_space_write_1(iot, ioh, IT8712_DATA, ldn);
}
bus_space_write_1(iot, ioh, IT8712_ADDR, index);
return bus_space_read_1(iot, ioh, IT8712_DATA);
}
static void
it8712_pnp_write(lpctag_t tag, int ldn, uint index, uint8_t val)
{
gemini_lpc_softc_t *sc = tag;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
if (ldn != GEMINI_LPC_LDN_ALL) {
bus_space_write_1(iot, ioh, IT8712_ADDR, IT8712_LDN);
bus_space_write_1(iot, ioh, IT8712_DATA, ldn);
}
bus_space_write_1(iot, ioh, IT8712_ADDR, index);
bus_space_write_1(iot, ioh, IT8712_DATA, val);
}
static void
it8712_pnp_enter(lpctag_t tag)
{
gemini_lpc_softc_t *sc = tag;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
bus_space_write_1(iot, ioh, IT8712_ADDR, 0x87);
bus_space_write_1(iot, ioh, IT8712_ADDR, 0x01);
bus_space_write_1(iot, ioh, IT8712_ADDR, 0x55);
bus_space_write_1(iot, ioh, IT8712_ADDR, 0x55);
}
static void
it8712_pnp_exit(lpctag_t tag)
{
gemini_lpc_softc_t *sc = tag;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
bus_space_write_1(iot, ioh, IT8712_ADDR, IT8712_CFGCTL);
bus_space_write_1(iot, ioh, IT8712_DATA, CFGCTL_WAITKEY);
}

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/* $NetBSD: gemini_lpchc.c,v 1.1 2008/11/09 09:15:42 cliff Exp $ */
/*
* GEMINI LPC Host Controller
*/
#include "opt_gemini.h"
#include "locators.h"
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: gemini_lpchc.c,v 1.1 2008/11/09 09:15:42 cliff Exp $");
#include <sys/param.h>
#include <sys/callout.h>
#include <sys/cdefs.h>
#include <sys/device.h>
#include <sys/kernel.h>
#include <sys/systm.h>
#include <sys/malloc.h>
#include <machine/param.h>
#include <machine/bus.h>
#include <arm/gemini/gemini_lpchcvar.h>
#include <arm/gemini/gemini_lpcvar.h>
#include <arm/gemini/gemini_reg.h>
static inline void
gemini_lpchc_sirq_cfg(bus_space_tag_t iot, bus_space_handle_t ioh,
bus_size_t offset, uint32_t bit, boolean_t doset)
{
uint32_t r;
r = bus_space_read_4(iot, ioh, offset);
if (doset)
r |= bit;
else
r &= ~bit;
bus_space_write_4(iot, ioh, offset, r);
}
static inline void
gemini_lpchc_sirq_ack(bus_space_tag_t iot, bus_space_handle_t ioh,
uint32_t bit)
{
uint32_t r;
r = bus_space_read_4(iot, ioh, GEMINI_LPCHC_SERIRQSTS);
r &= bit;
if (r != 0)
bus_space_write_4(iot, ioh, GEMINI_LPCHC_SERIRQSTS, r);
}
static inline void
gemini_lpchc_sirq_disable(bus_space_tag_t iot, bus_space_handle_t ioh)
{
uint32_t r;
r = bus_space_read_4(iot, ioh, GEMINI_LPCHC_IRQCTL);
r &= ~LPCHC_IRQCTL_SIRQEN;
bus_space_write_4(iot, ioh, GEMINI_LPCHC_IRQCTL, r);
}
static inline void
gemini_lpchc_sirq_enable(bus_space_tag_t iot, bus_space_handle_t ioh)
{
uint32_t r;
r = bus_space_read_4(iot, ioh, GEMINI_LPCHC_IRQCTL);
r |= LPCHC_IRQCTL_SIRQEN;
r |= LPCHC_IRQCTL_SIRQMS; /* XXX "continuous mode" */
r |= IRQCTL_SIRQFW_8; /* XXX SIRW Frame Width 8 clocks */
bus_space_write_4(iot, ioh, GEMINI_LPCHC_IRQCTL, r);
#if 0
delay(10); /* wait 1 serial IRQ cycle */
r &= ~LPCHC_IRQCTL_SIRQMS; /* XXX "quiet mode" */
bus_space_write_4(iot, ioh, GEMINI_LPCHC_IRQCTL, r);
#endif
}
static inline void
gemini_lpchc_intrq_init(gemini_lpchc_softc_t *sc)
{
SIMPLEQ_INIT(&sc->sc_intrq);
}
static inline int
gemini_lpchc_intrq_empty(gemini_lpchc_softc_t *sc)
{
return SIMPLEQ_EMPTY(&sc->sc_intrq);
}
static inline void *
gemini_lpchc_intrq_insert(gemini_lpchc_softc_t *sc, int (*func)(void *),
void *arg, uint32_t bit, boolean_t isedge)
{
gemini_lpchc_intrq_t *iqp;
iqp = malloc(sizeof(*iqp), M_DEVBUF, M_NOWAIT|M_ZERO);
if (iqp == NULL) {
printf("gemini_lpchc_intrq_insert: malloc failed\n");
return NULL;
}
iqp->iq_func = func;
iqp->iq_arg = arg;
iqp->iq_bit = bit;
iqp->iq_isedge = isedge;
SIMPLEQ_INSERT_TAIL(&sc->sc_intrq, iqp, iq_q);
return (void *)iqp;
}
static inline void
gemini_lpchc_intrq_remove(gemini_lpchc_softc_t *sc, void *cookie)
{
gemini_lpchc_intrq_t *iqp;
SIMPLEQ_FOREACH(iqp, &sc->sc_intrq, iq_q) {
if ((void *)iqp == cookie) {
SIMPLEQ_REMOVE(&sc->sc_intrq,
iqp, gemini_lpchc_intrq, iq_q);
free(iqp, M_DEVBUF);
return;
}
}
}
static inline int
gemini_lpchc_intrq_dispatch(gemini_lpchc_softc_t *sc)
{
gemini_lpchc_intrq_t *iqp;
uint32_t r;
int rv = 0;
r = bus_space_read_4(sc->sc_iot, sc->sc_ioh, GEMINI_LPCHC_SERIRQSTS);
r &= ~LPCHC_SERIRQSTS_RESV;
SIMPLEQ_FOREACH(iqp, &sc->sc_intrq, iq_q) {
if ((r & iqp->iq_bit) != 0) {
if (iqp->iq_isedge) {
gemini_lpchc_sirq_ack(sc->sc_iot, sc->sc_ioh,
iqp->iq_bit);
}
rv |= (*iqp->iq_func)(iqp->iq_arg);
}
}
return (rv != 0);
}
void
gemini_lpchc_init(lpcintrtag_t tag)
{
gemini_lpchc_softc_t *sc = tag;
uint32_t r;
gemini_lpchc_intrq_init(sc);
r = bus_space_read_4(sc->sc_iot, sc->sc_ioh, GEMINI_LPCHC_CSR);
r |= LPCHC_CSR_BEN;
bus_space_write_4(sc->sc_iot, sc->sc_ioh, GEMINI_LPCHC_CSR, r);
}
void *
gemini_lpchc_intr_establish(lpcintrtag_t tag, uint irq,
int ipl, int type, int (*func)(void *), void *arg)
{
gemini_lpchc_softc_t *sc = tag;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
uint32_t bit;
boolean_t isedge;
boolean_t ishigh;
void *ih;
isedge = ((type == IST_EDGE_RISING) || (type == IST_EDGE_FALLING));
ishigh = ((type == IST_EDGE_RISING) || (type == IST_LEVEL_HIGH));
if (irq >= GEMINI_LPCHC_NSERIRQ) {
printf("%s: bad irq %d\n", __FUNCTION__, irq);
return NULL;
}
#if 0
bit = 1 << irq;
#else
bit = (1 << GEMINI_LPCHC_NSERIRQ) -1; /* XXX */
#endif
/* set IRQ type */
gemini_lpchc_sirq_cfg(iot, ioh, GEMINI_LPCHC_SERIRQTYP,
bit, isedge);
/* set IRQ polarity */
gemini_lpchc_sirq_cfg(iot, ioh, GEMINI_LPCHC_SERIRQPOLARITY,
bit, ishigh);
/* ack a-priori edge status */
if (isedge)
gemini_lpchc_sirq_ack(iot, ioh, bit);
if (gemini_lpchc_intrq_empty(sc))
gemini_lpchc_sirq_enable(iot, ioh);
ih = gemini_lpchc_intrq_insert(sc, func, arg, bit, isedge);
if (ih == NULL)
if (gemini_lpchc_intrq_empty(sc))
gemini_lpchc_sirq_disable(iot, ioh);
return ih;
}
void
gemini_lpchc_intr_disestablish(lpcintrtag_t tag, void *ih)
{
gemini_lpchc_softc_t *sc = tag;
gemini_lpchc_intrq_remove(sc, ih);
if (gemini_lpchc_intrq_empty(sc))
gemini_lpchc_sirq_disable(sc->sc_iot, sc->sc_ioh);
}
int
gemini_lpchc_intr(void *arg)
{
gemini_lpchc_softc_t *sc = arg;
int rv;
printf("%s: enter\n", __FUNCTION__);
rv = gemini_lpchc_intrq_dispatch(sc);
printf("%s: exit\n", __FUNCTION__);
return rv;
}

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/* $NetBSD: gemini_lpchcvar.h,v 1.1 2008/11/09 09:15:42 cliff Exp $ */
#ifndef _ARM_GEMINI_LPHCVAR_H
#define _ARM_GEMINI_LPHCVAR_H
#include <sys/types.h>
#include <sys/device.h>
#include <machine/bus.h>
#include <arch/arm/gemini/gemini_lpcvar.h>
typedef struct gemini_lpchc_attach_args {
void *lpchc_tag;
bus_space_tag_t lpchc_iot;
bus_addr_t lpchc_addr;
bus_size_t lpchc_size;
} gemini_lpchc_attach_args_t;
typedef struct gemini_lpchc_intrq {
SIMPLEQ_ENTRY(gemini_lpchc_intrq) iq_q;
int (*iq_func)(void *);
void *iq_arg;
uint32_t iq_bit;
boolean_t iq_isedge;
} gemini_lpchc_intrq_t;
typedef struct gemini_lpchc_softc {
struct device sc_dev;
bus_addr_t sc_addr;
bus_size_t sc_size;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
int sc_intr;
void *sc_ih;
SIMPLEQ_HEAD(, gemini_lpchc_intrq) sc_intrq;
} gemini_lpchc_softc_t;
void gemini_lpchc_init(lpcintrtag_t);
void *gemini_lpchc_intr_establish(lpcintrtag_t, uint, int, int,
int (*)(void *), void *);
void gemini_lpchc_intr_disestablish(lpcintrtag_t, void *);
int gemini_lpchc_intr(void *);
#endif /* _ARM_GEMINI_LPHCVAR_H */

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/* $NetBSD: gemini_lpcvar.h,v 1.1 2008/11/09 09:15:42 cliff Exp $ */
#ifndef _ARM_GEMINI_LPCVAR_H
#define _ARM_GEMINI_LPCVAR_H
#include <sys/types.h>
#include <sys/device.h>
#include <machine/bus.h>
#define GEMINI_LPC_LDN_ALL -1 /* "global" LDN */
typedef void * lpctag_t;
typedef void * lpcintrtag_t;
typedef struct gemini_lpc_bus_ops {
uint8_t (*lpc_pnp_read)(lpctag_t, int, uint);
void (*lpc_pnp_write)(lpctag_t, int, uint, uint8_t);
void (*lpc_pnp_enter)(lpctag_t);
void (*lpc_pnp_exit)(lpctag_t);
void *(*lpc_intr_establish)(lpcintrtag_t,
uint, int, int, int (*)(void *), void *);
void (*lpc_intr_diestablish)(lpcintrtag_t, void *);
} gemini_lpc_bus_ops_t;
typedef struct gemini_lpc_attach_args {
void *lpc_intrtag;
void *lpc_tag;
uint lpc_ldn;
bus_addr_t lpc_base;
bus_addr_t lpc_addr;
bus_size_t lpc_size;
uint lpc_intr;
bus_space_tag_t lpc_iot;
gemini_lpc_bus_ops_t *lpc_bus_ops;
} gemini_lpc_attach_args_t;
typedef struct gemini_lpc_softc {
struct device sc_dev;
bus_addr_t sc_addr;
bus_size_t sc_size;
int sc_intr;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
void *sc_lpchctag;
} gemini_lpc_softc_t;
/* la_flags */
#define LPC_FL_ENABLED 0x01 /* device is enabled */
#endif /* _ARM_GEMINI_LPCVAR_H */

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/* $NetBSD: lpc_com.c,v 1.1 2008/11/09 09:15:42 cliff Exp $ */
/* adapted from:
* NetBSD: gemini_com.c,v 1.1 2008/10/24 04:23:18 matt Exp
*/
/*
* Based on arch/arm/xscale/pxa2x0_com.c
*
* Copyright 2003 Wasabi Systems, Inc.
* All rights reserved.
*
* Written by Steve C. Woodford for Wasabi Systems, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Wasabi Systems, Inc.
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: lpc_com.c,v 1.1 2008/11/09 09:15:42 cliff Exp $");
#include "opt_com.h"
#include "locators.h"
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <sys/termios.h>
#include <sys/callout.h>
#include <sys/kernel.h>
#include <machine/intr.h>
#include <machine/bus.h>
#include <dev/ic/comreg.h>
#include <dev/ic/comvar.h>
#include <arm/gemini/gemini_obiovar.h>
#include <arm/gemini/gemini_lpchcvar.h>
#include <arm/gemini/gemini_lpcvar.h>
#include <arm/gemini/gemini_reg.h>
#include <arm/gemini/lpc_com.h>
typedef struct lpc_com_softc {
struct com_softc sc_com;
bus_addr_t sc_addr;
bus_size_t sc_size;
int sc_intr;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
struct callout sc_callout;
} lpc_com_softc_t;
static int lpc_com_match(device_t, cfdata_t , void *);
static void lpc_com_attach(device_t, device_t, void *);
static int lpc_com_intr(void *);
static void lpc_com_time(void *);
CFATTACH_DECL_NEW(lpc_com, sizeof(struct lpc_com_softc),
lpc_com_match, lpc_com_attach, NULL, NULL);
static int
lpc_com_match(device_t parent, cfdata_t cf, void *aux)
{
struct gemini_lpc_attach_args *lpc = aux;
gemini_lpc_bus_ops_t *ops;
lpctag_t lpctag;
bus_space_tag_t iot;
bus_space_handle_t ioh;
bus_addr_t iobase;
int rv;
if (lpc->lpc_addr == LPCCF_LDN_DEFAULT
|| lpc->lpc_addr == LPCCF_ADDR_DEFAULT)
panic("lpc_com must have ldn and addr"
" in config.");
if ((lpc->lpc_intr != LPCCF_INTR_DEFAULT) && (lpc->lpc_intr > 0xff))
panic("lpc_com: bad intr %d", lpc->lpc_intr);
if (lpc->lpc_size == LPCCF_SIZE_DEFAULT)
lpc->lpc_size = IT8712F_UART_SIZE;
iobase = lpc->lpc_base + lpc->lpc_addr;
if (com_is_console(lpc->lpc_iot, iobase, NULL))
return 1;
lpctag = lpc->lpc_tag;
ops = lpc->lpc_bus_ops;
(*ops->lpc_pnp_enter)(lpctag);
/* Activate */
(*ops->lpc_pnp_write)(lpctag, lpc->lpc_ldn, 0x30, 0x01);
/* Set address */
(*ops->lpc_pnp_write)(lpctag, lpc->lpc_ldn, 0x60,
(lpc->lpc_addr % 0xff00) >> 8);
(*ops->lpc_pnp_write)(lpctag, lpc->lpc_ldn, 0x61,
(lpc->lpc_addr % 0x00ff) >> 0);
/* Set Interrupt Level */
(*ops->lpc_pnp_write)(lpctag, lpc->lpc_ldn, 0x70, lpc->lpc_intr);
/* Set Special Configuration Regs */
(*ops->lpc_pnp_write)(lpctag, lpc->lpc_ldn, 0xf0, 0x00);
#if 0
(*ops->lpc_pnp_write)(lpctag, lpc->lpc_ldn, 0xf1, 0x50);
#else
(*ops->lpc_pnp_write)(lpctag, lpc->lpc_ldn, 0xf1, 0x58); /* LO */
#endif
(*ops->lpc_pnp_write)(lpctag, lpc->lpc_ldn, 0xf2, 0x00);
(*ops->lpc_pnp_write)(lpctag, lpc->lpc_ldn, 0xf3, 0x7f);
(*ops->lpc_pnp_exit)(lpctag);
iot = lpc->lpc_iot;
if (bus_space_map(iot, iobase, lpc->lpc_size, 0, &ioh))
return 0;
rv = comprobe1(iot, ioh);
bus_space_unmap(iot, ioh, lpc->lpc_size);
return rv;
}
static void
lpc_com_attach(device_t parent, device_t self, void *aux)
{
struct lpc_com_softc *sc = device_private(self);
struct gemini_lpc_attach_args *lpc = aux;
gemini_lpc_bus_ops_t *ops = lpc->lpc_bus_ops;
bus_space_tag_t iot;
bus_space_handle_t ioh;
bus_addr_t iobase;
sc->sc_com.sc_dev = self;
iot = lpc->lpc_iot;
iobase = lpc->lpc_base + lpc->lpc_addr;
sc->sc_com.sc_frequency = IT8712F_COM_FREQ;
sc->sc_com.sc_type = COM_TYPE_NORMAL;
if (com_is_console(iot, iobase, &ioh) == 0 &&
bus_space_map(iot, iobase, lpc->lpc_size, 0, &ioh)) {
panic(": can't map registers\n");
return;
}
COM_INIT_REGS(sc->sc_com.sc_regs, iot, ioh, iobase);
com_attach_subr(&sc->sc_com);
aprint_naive("\n");
if (lpc->lpc_intr == LPCCF_INTR_DEFAULT) {
/* callout based polliung */
callout_init(&sc->sc_callout, 0);
callout_setfunc(&sc->sc_callout, lpc_com_time, sc);
callout_schedule(&sc->sc_callout, hz/8);
aprint_normal("%s: callout polling mode\n", device_xname(self));
} else {
/* interrupting */
#if 0
(*ops->lpc_intr_establish)(lpc->lpc_intrtag, lpc->lpc_intr,
IPL_SERIAL, IST_LEVEL_HIGH, comintr, &sc->sc_com);
#else
(*ops->lpc_intr_establish)(lpc->lpc_intrtag, lpc->lpc_intr,
IPL_SERIAL, IST_LEVEL_LOW, lpc_com_intr, &sc->sc_com);
#endif
}
}
int
lpc_com_intr(void *arg)
{
printf(".");
return comintr(arg);
}
void
lpc_com_time(void *arg)
{
lpc_com_softc_t *sc = arg;
int s;
s = splserial();
(void)comintr(&sc->sc_com);
callout_schedule(&sc->sc_callout, hz/8);
splx(s);
}

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@ -0,0 +1,11 @@
/* $NetBSD: lpc_com.h,v 1.1 2008/11/09 09:15:42 cliff Exp $ */
#ifndef _ARM_GEMINI_LPC_COM_H
#define _ARM_GEMINI_LPC_COM_H
#define IT8712F_UART_SIZE 8
#define IT8712F_COM_FREQ (24000000 / 13)
#endif /* _ARM_GEMINI_LPC_COM_H */

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/* $NetBSD: obio_lpchc.c,v 1.1 2008/11/09 09:15:42 cliff Exp $ */
/*
* obio attachment for GEMINI LPC Host Controller
*/
#include "opt_gemini.h"
#include "locators.h"
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: obio_lpchc.c,v 1.1 2008/11/09 09:15:42 cliff Exp $");
#include <sys/param.h>
#include <sys/callout.h>
#include <sys/cdefs.h>
#include <sys/device.h>
#include <sys/kernel.h>
#include <sys/systm.h>
#include <machine/param.h>
#include <machine/bus.h>
#include <arm/gemini/gemini_obiovar.h>
#include <arm/gemini/gemini_lpcvar.h>
#include <arm/gemini/gemini_lpchcvar.h>
#include <arm/gemini/gemini_reg.h>
static int gemini_lpchc_match(struct device *, struct cfdata *, void *);
static void gemini_lpchc_attach(struct device *, struct device *, void *);
static int gemini_lpchc_print(void *, const char *);
CFATTACH_DECL(obio_lpchc, sizeof(struct gemini_lpchc_softc),
gemini_lpchc_match, gemini_lpchc_attach, NULL, NULL);
static int
gemini_lpchc_match(struct device *parent, struct cfdata *cf, void *aux)
{
struct obio_attach_args *obio = aux;
if (obio->obio_addr == OBIOCF_ADDR_DEFAULT)
panic("geminilpchc must have addr specified in config.");
if (obio->obio_addr == GEMINI_LPCHC_BASE)
return 1;
return 0;
}
static void
gemini_lpchc_attach(struct device *parent, struct device *self, void *aux)
{
gemini_lpchc_softc_t *sc = device_private(self);
struct obio_attach_args *obio = aux;
struct gemini_lpchc_attach_args lpchc;
uint32_t r;
void *ih=NULL;
sc->sc_addr = obio->obio_addr;
sc->sc_size = (obio->obio_size == OBIOCF_SIZE_DEFAULT)
? GEMINI_LPCHC_SIZE : obio->obio_size;
sc->sc_iot = obio->obio_iot;
if (bus_space_map(sc->sc_iot, sc->sc_addr, sc->sc_size, 0, &sc->sc_ioh))
panic("%s: Cannot map registers", device_xname(self));
r = bus_space_read_4(sc->sc_iot, sc->sc_ioh, GEMINI_LPCHC_ID);
aprint_normal("\n%s: device %d, rev %#x ",
device_xname(self), _LPCHC_ID_DEVICE(r), _LPCHC_ID_REV(r));
sc->sc_intr = obio->obio_intr;
if (obio->obio_intr != OBIOCF_INTR_DEFAULT) {
ih = intr_establish(obio->obio_intr, IPL_SERIAL,
IST_LEVEL_HIGH, gemini_lpchc_intr, sc);
if (ih == NULL)
panic("%s: cannot register intr %d",
device_xname(self), obio->obio_intr);
}
sc->sc_ih = ih;
gemini_lpchc_init(sc);
aprint_normal("\n");
aprint_naive("\n");
lpchc.lpchc_iot = obio->obio_iot;
lpchc.lpchc_addr = GEMINI_LPCIO_BASE; /* XXX sc_addr+offset */
lpchc.lpchc_size = LPCCF_SIZE_DEFAULT; /* XXX placeholder */
lpchc.lpchc_tag = sc;
(void)config_found_ia(&sc->sc_dev, "lpcbus", &lpchc,
gemini_lpchc_print);
}
int
gemini_lpchc_print(void *aux, const char *name)
{
struct gemini_lpchc_attach_args *lpchc = aux;
if (lpchc->lpchc_addr != LPCCF_ADDR_DEFAULT)
aprint_normal(" addr %#lx", lpchc->lpchc_addr);
return UNCONF;
}