Some cleanups.
This commit is contained in:
soren
parent
c42f28d24a
commit
278498c05f
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@ -1,4 +1,4 @@
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/* $NetBSD: autoconf.c,v 1.1 2000/03/19 23:07:43 soren Exp $ */
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/* $NetBSD: autoconf.c,v 1.2 2000/03/31 14:51:49 soren Exp $ */
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/*
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* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
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@ -33,19 +33,15 @@
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#include <machine/cpu.h>
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void findroot(struct device **, int *);
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static void findroot(struct device **, int *);
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int cpuspeed = 100; /* XXX Approximate number of instructions per usec */
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void initicu(void);
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int cpuspeed = 100; /* Until we know more precisely. */
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void
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cpu_configure()
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{
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(void)splhigh();
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initicu(); /* XXX */
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if (config_rootfound("mainbus", "mainbus") == NULL)
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panic("no mainbus found");
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@ -66,15 +62,49 @@ cpu_rootconf()
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setroot(booted_device, booted_partition);
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}
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dev_t bootdev = 0;
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struct device *booted_device;
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extern char bootstring[];
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extern int netboot;
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void
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findroot(devpp, partp)
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struct device **devpp;
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int *partp;
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{
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struct device *dv;
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if (booted_device) {
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*devpp = booted_device;
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return;
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}
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/*
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* Default to "not found".
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*/
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*devpp = NULL;
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if ((booted_device == NULL) && netboot == 0)
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for (dv = alldevs.tqh_first; dv != NULL;
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dv = dv->dv_list.tqe_next)
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if (dv->dv_class == DV_DISK &&
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!strcmp(dv->dv_cfdata->cf_driver->cd_name, "wd"))
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*devpp = dv;
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/*
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* XXX Match up MBR boot specification with BSD disklabel for root?
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*/
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*partp = 0;
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return;
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}
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void
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device_register(dev, aux)
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struct device *dev;
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void *aux;
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{
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if ((booted_device == NULL) && (netboot == 1))
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if (dev->dv_class == DV_IFNET)
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booted_device = dev;
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: bus.c,v 1.1 2000/03/19 23:07:43 soren Exp $ */
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/* $NetBSD: bus.c,v 1.2 2000/03/31 14:51:49 soren Exp $ */
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/*
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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@ -92,7 +92,7 @@ bus_space_map(t, bpa, size, flags, bshp)
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else
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*bshp = MIPS_PHYS_TO_KSEG1(bpa);
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/* Evil! */
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/* XXX Evil! */
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if (bpa < 0x10000000)
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*bshp += 0x10000000;
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@ -1,4 +1,4 @@
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/* $NetBSD: clock.c,v 1.3 2000/03/23 08:09:54 nisimura Exp $ */
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/* $NetBSD: clock.c,v 1.4 2000/03/31 14:51:49 soren Exp $ */
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/*
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* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
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@ -97,6 +97,9 @@ resettodr()
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struct clock_ymdhms dt;
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int s;
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if (cold == 1)
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return;
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s = splclock();
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MC146818_GETTOD(NULL, ®s);
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splx(s);
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@ -1,4 +1,4 @@
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/* $NetBSD: disksubr.c,v 1.3 2000/03/22 20:38:05 soren Exp $ */
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/* $NetBSD: disksubr.c,v 1.4 2000/03/31 14:51:49 soren Exp $ */
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/*
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* Copyright (c) 1982, 1986, 1988 Regents of the University of California.
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@ -55,7 +55,7 @@ dk_establish(dk, dev)
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}
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/*
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* Scan MBR for NetBSD partittion. Return NO_MBR_SIGNATURE if no MBR found
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* Scan MBR for NetBSD partittion. Return NO_MBR_SIGNATURE if no MBR found
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* Otherwise, copy valid MBR partition-table into dp, and if a NetBSD
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* partition is found, return a pointer to it; else return NULL.
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*/
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@ -1,4 +1,4 @@
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/* $NetBSD: locore_machdep.S,v 1.2 2000/03/22 21:15:59 soren Exp $ */
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/* $NetBSD: locore_machdep.S,v 1.3 2000/03/31 14:51:49 soren Exp $ */
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/*
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* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
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@ -36,10 +36,6 @@
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.globl _C_LABEL(intrnames)
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.globl _C_LABEL(eintrnames)
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/*
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* For compatiblity with mips/mips interrupts().
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*/
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_C_LABEL(intrnames):
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.asciiz "softclock"
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.asciiz "softnet"
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@ -1,4 +1,4 @@
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/* $NetBSD: machdep.c,v 1.6 2000/03/27 01:51:17 nisimura Exp $ */
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/* $NetBSD: machdep.c,v 1.7 2000/03/31 14:51:49 soren Exp $ */
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/*
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* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
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@ -82,14 +82,16 @@ vm_map_t exec_map = NULL;
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vm_map_t mb_map = NULL;
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vm_map_t phys_map = NULL;
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int maxmem; /* Max memory per process */
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int physmem; /* Total physical memory */
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int physmem; /* Total physical memory */
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char bootstring[512]; /* Boot command */
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int netboot; /* Are we netbooting? */
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phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
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int mem_cluster_cnt;
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void configure(void);
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void mach_init(void);
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void mach_init(unsigned int);
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#ifdef DEBUG
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/* Stack trace code violates prototypes to get callee's registers. */
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@ -100,109 +102,24 @@ extern void stacktrace(void);
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* safepri is a safe priority for sleep to set for a spin-wait during
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* autoconfiguration or after a panic. Used as an argument to splx().
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*/
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int safepri = MIPS3_PSL_LOWIPL;
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extern void mips_vector_init(void);
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int safepri = MIPS1_PSL_LOWIPL;
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extern struct user *proc0paddr;
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static int cobalt_hardware_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
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/* XXX */
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extern int iointr(unsigned int, struct clockframe *);
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#define ICU_LEN 16
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extern struct intrhand *intrhand[ICU_LEN];
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extern struct com_mainbus_softc *com0;
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void *tlp0;
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void *tlp1;
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int comintr(void *);
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int tlp_intr(void *);
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static int
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cobalt_hardware_intr(mask, pc, status, cause)
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u_int32_t mask;
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u_int32_t pc;
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u_int32_t status;
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u_int32_t cause;
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{
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struct clockframe cf;
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static u_int32_t cycles;
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int s;
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/* XXX Reverse hardlock and statclock? */
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#define TICK_CYCLES 1250000 /* XXX 250 MHz XXX */
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if (cause & MIPS_INT_MASK_5) {
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cycles = mips3_cycle_count();
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mips3_write_compare(cycles + TICK_CYCLES);
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cf.pc = pc;
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cf.sr = status;
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s = splstatclock(); /* XXX redo interrupts XXX */
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statclock(&cf);
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splx(s); /* XXX redo interrupts XXX */
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cause &= ~MIPS_INT_MASK_5;
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}
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if (cause & MIPS_INT_MASK_4) {
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iointr(mask, &cf);
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cause &= ~MIPS_INT_MASK_4;
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}
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if (cause & MIPS_INT_MASK_3) {
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s = spltty(); /* XXX redo interrupts XXX */
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comintr(com0);
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splx(s); /* XXX redo interrupts XXX */
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cause &= ~MIPS_INT_MASK_3;
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}
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if (cause & MIPS_INT_MASK_1) {
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s = splnet(); /* XXX redo interrupts XXX */
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tlp_intr(tlp0);
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splx(s); /* XXX redo interrupts XXX */
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cause &= ~MIPS_INT_MASK_1;
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}
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if (cause & MIPS_INT_MASK_2) {
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s = splnet(); /* XXX redo interrupts XXX */
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tlp_intr(tlp1);
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splx(s); /* XXX redo interrupts XXX */
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cause &= ~MIPS_INT_MASK_1;
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cause &= ~MIPS_INT_MASK_2;
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}
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if (cause & MIPS_INT_MASK_0) {
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volatile u_int32_t *irq_src =
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(u_int32_t *)MIPS_PHYS_TO_KSEG1(0x14000c18);
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if (*irq_src & 0x00000100) {
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*irq_src = 0;
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cf.pc = pc;
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cf.sr = status;
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s = splclock(); /* XXX redo interrupts XXX */
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hardclock(&cf);
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splx(s); /* XXX redo interrupts XXX */
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}
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cause &= ~MIPS_INT_MASK_0;
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}
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return ((status & ~cause & MIPS_HARD_INT_MASK) | MIPS_SR_INT_IE);
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}
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/*
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* Do all the stuff that locore normally does before calling main().
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*/
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void
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mach_init(void)
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mach_init(memsize)
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unsigned int memsize;
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{
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caddr_t kernend, v, p0;
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u_long first, last;
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vsize_t size;
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extern char edata[], end[];
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int i;
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/*
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* Clear BSS.
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@ -210,11 +127,9 @@ mach_init(void)
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kernend = (caddr_t)mips_round_page(end);
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memset(edata, 0, kernend - edata);
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consinit();
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physmem = btoc(memsize - MIPS_KSEG0_START);
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#if 1
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boothowto = RB_SINGLE;
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#endif
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consinit();
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uvm_setpagesize();
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@ -225,24 +140,57 @@ mach_init(void)
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*/
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mips_vector_init();
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/*
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* The boot command is passed in the top 512 bytes,
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* so don't clobber that.
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*/
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mem_clusters[0].start = 0;
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mem_clusters[0].size = ctob(physmem) - 512;
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mem_cluster_cnt = 1;
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memcpy(bootstring, (char *)(memsize - 512), 512);
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bootstring[511] = '\0';
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for (i = 0; i < 512; i++) {
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switch (bootstring[i]) {
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case '\0':
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break;
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case ' ':
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continue;
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case '-':
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while (bootstring[i] != ' ') {
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i++;
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switch (bootstring[i]) {
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case 'a':
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boothowto |= RB_ASKNAME;
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break;
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case 'd':
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boothowto |= RB_KDB;
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break;
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case 's':
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boothowto |= RB_SINGLE;
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break;
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}
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}
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}
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if (memcmp("single", bootstring + i, 5) == 0)
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boothowto |= RB_SINGLE;
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if (memcmp("nfsroot=", bootstring + i, 8) == 0)
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netboot = 1;
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/*
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* XXX Select root device from 'dev=/dev/hd[abcd][1234]' too.
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*/
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}
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#ifdef DDB
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/*
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* Initialize machine-dependent DDB commands, in case of early panic.
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*/
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db_machine_init();
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/*
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* XXX Also get the symbol table. We wants it, yes, my precious.
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*/
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if (boothowto & RB_KDB)
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Debugger();
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#endif
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physmem = btoc(16 * 1024 * 1024); /* XXX */
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maxmem = physmem / 2;
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/* XXX */
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mem_clusters[0].start = 0;
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mem_clusters[0].size = ctob(physmem);
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mem_cluster_cnt = 1;
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/*
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* Load the rest of the available pages into the VM system.
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@ -411,7 +359,7 @@ cpu_reboot(howto, bootstr)
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howto |= RB_HALT;
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boothowto = howto;
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if ((howto & RB_NOSYNC) && (waittime < 0)) {
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if ((howto & RB_NOSYNC) == 0 && (waittime < 0)) {
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waittime = 0;
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vfs_shutdown();
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@ -440,9 +388,9 @@ haltsys:
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}
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printf("rebooting...\n\n");
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delay(100000);
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delay(500000);
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*(volatile char *)MIPS_PHYS_TO_KSEG1(LED_ADDR) = 0x0f; /* Hard reset. */
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*(volatile char *)MIPS_PHYS_TO_KSEG1(LED_ADDR) = LED_RESET;
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printf("WARNING: reboot failed!\n");
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for (;;);
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@ -497,3 +445,93 @@ cpu_exec_ecoff_hook(p, epp)
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return 0;
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}
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#endif /* EXEC_ECOFF */
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#define NINTR 6
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static struct {
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int (*func)(void *);
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void *arg;
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} intrtab[NINTR];
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void *
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cpu_intr_establish(level, ipl, func, arg)
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int level;
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int ipl;
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int (*func)(void *);
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void *arg;
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{
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if (level < 0 || level >= NINTR)
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panic("invalid interrupt level");
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if (intrtab[level].func != NULL)
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panic("cannot share CPU interrupts");
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intrtab[level].func = func;
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intrtab[level].arg = arg;
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return (void *)-1;
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}
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static int
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cobalt_hardware_intr(mask, pc, status, cause)
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u_int32_t mask;
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u_int32_t pc;
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u_int32_t status;
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u_int32_t cause;
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{
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struct clockframe cf;
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static u_int32_t cycles;
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if (cause & MIPS_INT_MASK_0) {
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volatile u_int32_t *irq_src =
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(u_int32_t *)MIPS_PHYS_TO_KSEG1(0x14000c18);
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if (*irq_src & 0x00000100) {
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*irq_src = 0;
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cf.pc = pc;
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cf.sr = status;
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hardclock(&cf);
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}
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cause &= ~MIPS_INT_MASK_0;
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}
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if (cause & MIPS_INT_MASK_5) {
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cycles = mips3_cycle_count();
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mips3_write_compare(cycles + 1250000); /* XXX */
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cf.pc = pc;
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cf.sr = status;
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#if 0
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statclock(&cf);
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#endif
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cause &= ~MIPS_INT_MASK_5;
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}
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if (cause & MIPS_INT_MASK_1) {
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if (intrtab[1].func != NULL)
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if ((*intrtab[1].func)(intrtab[1].arg))
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cause &= ~MIPS_INT_MASK_1;
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}
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if (cause & MIPS_INT_MASK_2) {
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if (intrtab[2].func != NULL)
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if ((*intrtab[2].func)(intrtab[2].arg))
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cause &= ~MIPS_INT_MASK_2;
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}
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if (cause & MIPS_INT_MASK_3) {
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if (intrtab[3].func != NULL)
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if ((*intrtab[3].func)(intrtab[3].arg))
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cause &= ~MIPS_INT_MASK_3;
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}
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if (cause & MIPS_INT_MASK_4) {
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if (intrtab[4].func != NULL)
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if ((*intrtab[4].func)(intrtab[4].arg))
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cause &= ~MIPS_INT_MASK_4;
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}
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return ((status & ~cause & MIPS_HARD_INT_MASK) | MIPS_SR_INT_IE);
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: mainbus.c,v 1.1 2000/03/19 23:07:44 soren Exp $ */
|
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/* $NetBSD: mainbus.c,v 1.2 2000/03/31 14:51:50 soren Exp $ */
|
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/*
|
||||
* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
|
||||
|
|
@ -53,11 +53,6 @@ mainbus_match(parent, match, aux)
|
|||
struct cfdata *match;
|
||||
void *aux;
|
||||
{
|
||||
struct cfdata *cf = match;
|
||||
|
||||
if (cf->cf_unit > 0)
|
||||
return 0;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
|
@ -69,7 +64,11 @@ mainbus_attach(parent, self, aux)
|
|||
{
|
||||
struct mainbus_attach_args *ma = aux;
|
||||
|
||||
printf(": Qube/RaQ\n");
|
||||
/*
|
||||
* XXX Check for Qube/RaQ 1 vs. 2.
|
||||
*/
|
||||
|
||||
printf("\n");
|
||||
|
||||
config_search(mainbus_search, self, ma);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
# $NetBSD: RAQ,v 1.3 2000/03/24 13:08:30 soren Exp $
|
||||
# $NetBSD: RAQ,v 1.4 2000/03/31 14:51:51 soren Exp $
|
||||
|
||||
include "arch/cobalt/conf/std.cobalt"
|
||||
|
||||
|
|
@ -6,13 +6,16 @@ maxusers 32
|
|||
|
||||
options KTRACE
|
||||
|
||||
options BUFCACHE=20
|
||||
|
||||
options DDB
|
||||
options DDB_HISTORY_SIZE=100
|
||||
#options DEBUG
|
||||
options DIAGNOSTIC
|
||||
makeoptions DEBUG="-g"
|
||||
#makeoptions DEBUG="-g"
|
||||
|
||||
options EXEC_ECOFF
|
||||
#options COMPAT_LINUX
|
||||
#options EXEC_ECOFF
|
||||
|
||||
file-system FFS
|
||||
file-system EXT2FS
|
||||
|
|
@ -26,20 +29,27 @@ options SOFTDEP
|
|||
options INET
|
||||
|
||||
options PCIVERBOSE
|
||||
#options PCI_CONFIG_DUMP # verbosely dump PCI config space
|
||||
#options PCI_CONFIG_DUMP
|
||||
options SCSIVERBOSE
|
||||
|
||||
options NFS_BOOT_DHCP
|
||||
|
||||
config netbsd root on ? type ?
|
||||
|
||||
#mainbus0 at root
|
||||
#cpu0 at mainbus? level 5
|
||||
#gt0 at mainbus? addr 0x14000000 level 0
|
||||
#com0 at gt? devbank X offset 0 level 3 # ??
|
||||
#panel0 at gt? devbank Y offset 0 # ??
|
||||
#pci0 at gt? devbank Z offset 0 level 4 # ??
|
||||
|
||||
mainbus0 at root
|
||||
cpu0 at mainbus?
|
||||
options COM16650
|
||||
com0 at mainbus? addr 0x1c800000 level 3
|
||||
#zsc0 at mainbus? addr 0x1c800000 level 3
|
||||
#panel0 at mainbus? addr 0xdeadbeef
|
||||
gt0 at mainbus? addr 0x14000000
|
||||
#zsc0 at mainbus? addr 0x1c800000 level 3 # Prototype systems
|
||||
#panel0 at mainbus? addr 0x1f000000 # ? # XXX
|
||||
gt0 at mainbus? addr 0x14000000 level 0
|
||||
pci* at gt0
|
||||
pchb* at pci? dev ? function ?
|
||||
pcib* at pci? dev ? function ?
|
||||
|
|
@ -48,12 +58,12 @@ options TLP_MATCH_21142
|
|||
lxtphy* at mii? phy ?
|
||||
#uhci* at pci? dev ? function ?
|
||||
ncr* at pci? dev ? function ?
|
||||
options NCR_IOMAPPED
|
||||
scsibus* at ncr?
|
||||
sd* at scsibus?
|
||||
st* at scsibus?
|
||||
sd* at scsibus? target ? lun ?
|
||||
st* at scsibus? target ? lun ?
|
||||
pciide* at pci? dev ? function ?
|
||||
wd* at pciide? channel ? drive ?
|
||||
|
||||
pseudo-device loop
|
||||
pseudo-device bpfilter 4
|
||||
pseudo-device pty 64
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
# $NetBSD: files.cobalt,v 1.1 2000/03/19 23:07:44 soren Exp $
|
||||
# $NetBSD: files.cobalt,v 1.2 2000/03/31 14:51:51 soren Exp $
|
||||
|
||||
maxpartitions 8
|
||||
|
||||
|
|
@ -53,8 +53,6 @@ device pcib
|
|||
attach pcib at pci
|
||||
file arch/cobalt/pci/pcib.c pcib
|
||||
|
||||
file arch/cobalt/pci/isaintr.c
|
||||
|
||||
include "dev/mii/files.mii"
|
||||
include "dev/scsipi/files.scsipi"
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: com_mainbus.c,v 1.1 2000/03/19 23:07:45 soren Exp $ */
|
||||
/* $NetBSD: com_mainbus.c,v 1.2 2000/03/31 14:51:52 soren Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
|
||||
|
|
@ -91,12 +91,10 @@ com_mainbus_attach(parent, self, aux)
|
|||
|
||||
/* XXX console check */
|
||||
/* XXX map */
|
||||
/* XXX interrupt */
|
||||
|
||||
com_attach_subr(sc);
|
||||
|
||||
/* XXX */
|
||||
com0 = sc;
|
||||
|
||||
cpu_intr_establish(maa->ma_level, IPL_SERIAL, comintr, sc);
|
||||
|
||||
return;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: gt.c,v 1.1 2000/03/19 23:07:45 soren Exp $ */
|
||||
/* $NetBSD: gt.c,v 1.2 2000/03/31 14:51:52 soren Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
|
||||
|
|
@ -77,12 +77,18 @@ gt_attach(parent, self, aux)
|
|||
|
||||
printf("\n");
|
||||
|
||||
/* XXX */
|
||||
*((volatile u_int32_t *)0xb4000c00) =
|
||||
(*((volatile u_int32_t *)0xb4000c00) & ~0x6) | 0x2;
|
||||
|
||||
#if NPCI > 0
|
||||
pba.pba_busname = "pci";
|
||||
pba.pba_dmat = &pci_bus_dma_tag;
|
||||
pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; /* XXX */
|
||||
/* XXX mrl mrm mwai? */
|
||||
pba.pba_bus = 0;
|
||||
pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED |
|
||||
PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY;
|
||||
config_found(self, &pba, gt_print);
|
||||
#endif
|
||||
return;
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: bus.h,v 1.1 2000/03/19 23:07:45 soren Exp $ */
|
||||
/* $NetBSD: bus.h,v 1.2 2000/03/31 14:51:52 soren Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
|
||||
|
|
@ -71,12 +71,12 @@ typedef u_long bus_space_handle_t;
|
|||
#define BUS_SPACE_MAP_LINEAR 0x02
|
||||
#define BUS_SPACE_MAP_PREFETCHABLE 0x04
|
||||
|
||||
int bus_space_map (bus_space_tag_t, bus_addr_t, bus_size_t,
|
||||
int bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t,
|
||||
int, bus_space_handle_t *);
|
||||
|
||||
/*
|
||||
* void bus_space_unmap (bus_space_tag_t t,
|
||||
* bus_space_handle_t bsh, bus_size_t size);
|
||||
* void bus_space_unmap(bus_space_tag_t t,
|
||||
* bus_space_handle_t bsh, bus_size_t size);
|
||||
*
|
||||
* Unmap a region of bus space.
|
||||
*/
|
||||
|
|
@ -84,18 +84,18 @@ int bus_space_map (bus_space_tag_t, bus_addr_t, bus_size_t,
|
|||
void bus_space_unmap (bus_space_tag_t, bus_space_handle_t, bus_size_t);
|
||||
|
||||
/*
|
||||
* int bus_space_subregion (bus_space_tag_t t,
|
||||
* int bus_space_subregion(bus_space_tag_t t,
|
||||
* bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
|
||||
* bus_space_handle_t *nbshp);
|
||||
*
|
||||
* Get a new handle for a subregion of an already-mapped area of bus space.
|
||||
*/
|
||||
|
||||
int bus_space_subregion (bus_space_tag_t t, bus_space_handle_t bsh,
|
||||
int bus_space_subregion(bus_space_tag_t t, bus_space_handle_t bsh,
|
||||
bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp);
|
||||
|
||||
/*
|
||||
* int bus_space_alloc (bus_space_tag_t t, bus_addr_t, rstart,
|
||||
* int bus_space_alloc(bus_space_tag_t t, bus_addr_t, rstart,
|
||||
* bus_addr_t rend, bus_size_t size, bus_size_t align,
|
||||
* bus_size_t boundary, int flags, bus_addr_t *addrp,
|
||||
* bus_space_handle_t *bshp);
|
||||
|
|
@ -115,11 +115,11 @@ int bus_space_alloc (bus_space_tag_t t, bus_addr_t rstart,
|
|||
* Free a region of bus space.
|
||||
*/
|
||||
|
||||
void bus_space_free (bus_space_tag_t t, bus_space_handle_t bsh,
|
||||
void bus_space_free(bus_space_tag_t t, bus_space_handle_t bsh,
|
||||
bus_size_t size);
|
||||
|
||||
/*
|
||||
* u_intN_t bus_space_read_N (bus_space_tag_t tag,
|
||||
* u_intN_t bus_space_read_N(bus_space_tag_t tag,
|
||||
* bus_space_handle_t bsh, bus_size_t offset);
|
||||
*
|
||||
* Read a 1, 2, 4, or 8 byte quantity from bus space
|
||||
|
|
@ -140,7 +140,7 @@ void bus_space_free (bus_space_tag_t t, bus_space_handle_t bsh,
|
|||
#endif
|
||||
|
||||
/*
|
||||
* void bus_space_read_multi_N (bus_space_tag_t tag,
|
||||
* void bus_space_read_multi_N(bus_space_tag_t tag,
|
||||
* bus_space_handle_t bsh, bus_size_t offset,
|
||||
* u_intN_t *addr, size_t count);
|
||||
*
|
||||
|
|
@ -177,7 +177,7 @@ __COBALT_bus_space_read_multi(4,32)
|
|||
#undef __COBALT_bus_space_read_multi
|
||||
|
||||
/*
|
||||
* void bus_space_read_region_N (bus_space_tag_t tag,
|
||||
* void bus_space_read_region_N(bus_space_tag_t tag,
|
||||
* bus_space_handle_t bsh, bus_size_t offset,
|
||||
* u_intN_t *addr, size_t count);
|
||||
*
|
||||
|
|
@ -217,7 +217,7 @@ __COBALT_bus_space_read_region(4,32)
|
|||
#undef __COBALT_bus_space_read_region
|
||||
|
||||
/*
|
||||
* void bus_space_write_N (bus_space_tag_t tag,
|
||||
* void bus_space_write_N(bus_space_tag_t tag,
|
||||
* bus_space_handle_t bsh, bus_size_t offset,
|
||||
* u_intN_t value);
|
||||
*
|
||||
|
|
@ -248,7 +248,7 @@ do { \
|
|||
#endif
|
||||
|
||||
/*
|
||||
* void bus_space_write_multi_N (bus_space_tag_t tag,
|
||||
* void bus_space_write_multi_N(bus_space_tag_t tag,
|
||||
* bus_space_handle_t bsh, bus_size_t offset,
|
||||
* const u_intN_t *addr, size_t count);
|
||||
*
|
||||
|
|
|
|||
|
|
@ -1,16 +1,17 @@
|
|||
/* $NetBSD: intr.h,v 1.2 2000/03/21 02:27:50 soren Exp $ */
|
||||
/* $NetBSD: intr.h,v 1.3 2000/03/31 14:51:52 soren Exp $ */
|
||||
|
||||
#include <mips/cpuregs.h>
|
||||
#include <mips/intr.h>
|
||||
|
||||
#define IPL_NONE 0 /* Disable only this interrupt. */
|
||||
#define IPL_BIO 1 /* Disable block I/O interrupts. */
|
||||
#define IPL_NET 2 /* Disable network interrupts. */
|
||||
#define IPL_TTY 3 /* Disable terminal interrupts. */
|
||||
#define IPL_IMP 4 /* memory allocation */
|
||||
#define IPL_CLOCK 4 /* Disable clock interrupts. */
|
||||
#define IPL_STATCLOCK 5 /* Disable profiling interrupts. */
|
||||
#define IPL_HIGH 6 /* Disable all interrupts. */
|
||||
#define NIPL 7
|
||||
#define IPL_IMP 4 /* Memory allocation */
|
||||
#define IPL_CLOCK 5 /* Disable clock interrupts. */
|
||||
#define IPL_STATCLOCK 6 /* Disable profiling interrupts. */
|
||||
#define IPL_HIGH 7 /* Disable all interrupts. */
|
||||
#define NIPL 8
|
||||
|
||||
/* Interrupt sharing types. */
|
||||
#define IST_NONE 0 /* none */
|
||||
|
|
@ -18,16 +19,9 @@
|
|||
#define IST_EDGE 2 /* edge-triggered */
|
||||
#define IST_LEVEL 3 /* level-triggered */
|
||||
|
||||
#define SIR_CLOCK 31
|
||||
#define SIR_NET 30
|
||||
#define SIR_CLOCKMASK ((1 << SIR_CLOCK))
|
||||
#define SIR_NETMASK ((1 << SIR_NET) | SIR_CLOCKMASK)
|
||||
#define SIR_ALLMASK (SIR_CLOCKMASK | SIR_NETMASK)
|
||||
|
||||
#ifdef _KERNEL
|
||||
#ifndef _LOCORE
|
||||
|
||||
int imask[NIPL];
|
||||
|
||||
extern int _splraise(int);
|
||||
extern int _spllower(int);
|
||||
extern int _splset(int);
|
||||
|
|
@ -52,24 +46,19 @@ extern void _clrsoftintr(int);
|
|||
#define splbio() _splraise(SPLBIO)
|
||||
#define splnet() _splraise(SPLNET)
|
||||
#define spltty() _splraise(SPLTTY)
|
||||
#define splimp() _splraise(SPLTTY)
|
||||
#define splclock() _splraise(SPLCLOCK)
|
||||
#define splimp() splclock()
|
||||
#define splstatclock() splclock()
|
||||
#define spllowersoftclock() _spllower(MIPS_SOFT_INT_MASK_0)
|
||||
#define splsoftclock() _splraise(MIPS_SOFT_INT_MASK_0)
|
||||
#define splsoftnet() _splraise(MIPS_SOFT_INT_MASK_1)
|
||||
#define spllowersoftclock() _spllower(MIPS_SOFT_INT_MASK_0)
|
||||
|
||||
extern unsigned int intrcnt[];
|
||||
#define SOFTCLOCK_INTR 0
|
||||
#define SOFTNET_INTR 1
|
||||
#define CLOCK_INTR 2
|
||||
#define FPU_INTR 3
|
||||
|
||||
/* Handle device interrupts. */
|
||||
extern int (*mips_hardware_intr)(unsigned int, unsigned int,
|
||||
unsigned int, unsigned int);
|
||||
|
||||
/* Handle software interrupts. */
|
||||
extern void (*mips_software_intr)(int);
|
||||
extern void * cpu_intr_establish(int, int, int (*)(void *), void *);
|
||||
extern void * icu_intr_establish(int, int, int, int (*)(void *), void *);
|
||||
|
||||
#endif /* !_LOCORE */
|
||||
#endif /* _LOCORE */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: param.h,v 1.2 2000/03/20 12:26:11 soren Exp $ */
|
||||
/* $NetBSD: param.h,v 1.3 2000/03/31 14:51:53 soren Exp $ */
|
||||
|
||||
#include <mips/mips_param.h>
|
||||
|
||||
|
|
@ -37,13 +37,13 @@
|
|||
#endif
|
||||
#endif
|
||||
|
||||
#include <machine/intr.h>
|
||||
|
||||
#ifdef _KERNEL
|
||||
#ifndef _LOCORE
|
||||
|
||||
__inline extern void delay(unsigned long);
|
||||
#define DELAY(n) delay(n)
|
||||
|
||||
#include <machine/intr.h>
|
||||
|
||||
#endif /* _LOCORE */
|
||||
#endif /* _KERNEL */
|
||||
|
|
|
|||
|
|
@ -1,3 +1,5 @@
|
|||
/* $NetBSD: types.h,v 1.1 2000/03/19 23:07:48 soren Exp $ */
|
||||
/* $NetBSD: types.h,v 1.2 2000/03/31 14:51:53 soren Exp $ */
|
||||
|
||||
#include <mips/types.h>
|
||||
|
||||
#define __HAVE_DEVICE_REGISTER
|
||||
|
|
|
|||
|
|
@ -1,8 +1,8 @@
|
|||
/* $NetBSD: vmparam.h,v 1.1 2000/03/19 23:07:48 soren Exp $ */
|
||||
/* $NetBSD: vmparam.h,v 1.2 2000/03/31 14:51:53 soren Exp $ */
|
||||
|
||||
#include <mips/vmparam.h>
|
||||
|
||||
#define VM_PHYSSEG_MAX 32
|
||||
#define VM_PHYSSEG_MAX 1
|
||||
|
||||
#define VM_NFREELIST 1
|
||||
#define VM_FREELIST_DEFAULT 0
|
||||
|
|
|
|||
|
|
@ -1,367 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 1995 Per Fogelstrom
|
||||
* Copyright (c) 1993, 1994 Charles M. Hannum.
|
||||
* Copyright (c) 1990 The Regents of the University of California.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This code is derived from software contributed to Berkeley by
|
||||
* William Jolitz and Don Ahn.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by the University of
|
||||
* California, Berkeley and its contributors.
|
||||
* 4. Neither the name of the University nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/proc.h>
|
||||
#include <sys/user.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/time.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/device.h>
|
||||
#include <sys/malloc.h>
|
||||
#include <vm/vm.h>
|
||||
|
||||
#include <machine/cpu.h>
|
||||
#include <machine/bus.h>
|
||||
#include <machine/autoconf.h>
|
||||
#include <machine/intr.h>
|
||||
|
||||
#include <dev/pci/pcivar.h>
|
||||
#include <dev/pci/pcireg.h>
|
||||
#include <dev/pci/pcidevs.h>
|
||||
|
||||
#define IO_ICU1 0x020
|
||||
#define IO_ICU2 0x0a0
|
||||
|
||||
#define IRQ_SLAVE 2
|
||||
#define ICU_LEN 16
|
||||
|
||||
u_int8_t isa_inb(int);
|
||||
void isa_outb(int, u_int8_t);
|
||||
|
||||
__inline u_int8_t isa_inb(int x)
|
||||
{
|
||||
return (*((volatile unsigned char *) (0xb0000000 | (x))));
|
||||
}
|
||||
|
||||
__inline void isa_outb(int x, u_int8_t y)
|
||||
{
|
||||
*((volatile unsigned char *) (0xb0000000 | x)) = y;
|
||||
DELAY(100);
|
||||
}
|
||||
|
||||
typedef int isa_chipset_tag_t;
|
||||
|
||||
void * intr_establish(isa_chipset_tag_t, int, int, int, int (*)(void *),
|
||||
void *);
|
||||
void intr_disestablish(isa_chipset_tag_t, void*);
|
||||
int iointr(unsigned int, struct clockframe *);
|
||||
void initicu(void);
|
||||
void intr_calculatemasks(void);
|
||||
int fakeintr(void *a);
|
||||
char * isa_intr_typename(int);
|
||||
|
||||
#define LEGAL_IRQ(x) ((x) >= 0 && (x) < ICU_LEN && (x) != 2)
|
||||
|
||||
struct intrhand {
|
||||
struct intrhand *ih_next;
|
||||
int (*ih_fun) __P((void *));
|
||||
void *ih_arg;
|
||||
u_long ih_count;
|
||||
int ih_level;
|
||||
int ih_irq;
|
||||
char *ih_what;
|
||||
};
|
||||
|
||||
int imen;
|
||||
int intrtype[ICU_LEN], intrmask[ICU_LEN], intrlevel[ICU_LEN];
|
||||
struct intrhand *intrhand[ICU_LEN];
|
||||
|
||||
int fakeintr(a)
|
||||
void *a;
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Recalculate the interrupt masks from scratch.
|
||||
* We could code special registry and deregistry versions of this function that
|
||||
* would be faster, but the code would be nastier, and we don't expect this to
|
||||
* happen very much anyway.
|
||||
*/
|
||||
void
|
||||
intr_calculatemasks()
|
||||
{
|
||||
int irq, level;
|
||||
struct intrhand *q;
|
||||
|
||||
/* First, figure out which levels each IRQ uses. */
|
||||
for (irq = 0; irq < ICU_LEN; irq++) {
|
||||
register int levels = 0;
|
||||
for (q = intrhand[irq]; q; q = q->ih_next)
|
||||
levels |= 1 << q->ih_level;
|
||||
intrlevel[irq] = levels;
|
||||
}
|
||||
|
||||
/* Then figure out which IRQs use each level. */
|
||||
for (level = 0; level < 5; level++) {
|
||||
register int irqs = 0;
|
||||
for (irq = 0; irq < ICU_LEN; irq++)
|
||||
if (intrlevel[irq] & (1 << level))
|
||||
irqs |= 1 << irq;
|
||||
imask[level] = irqs | SIR_ALLMASK;
|
||||
}
|
||||
|
||||
/*
|
||||
* There are tty, network and disk drivers that use free() at interrupt
|
||||
* time, so imp > (tty | net | bio).
|
||||
*/
|
||||
imask[IPL_IMP] |= imask[IPL_TTY] | imask[IPL_NET] | imask[IPL_BIO];
|
||||
|
||||
/*
|
||||
* Enforce a hierarchy that gives slow devices a better chance at not
|
||||
* dropping data.
|
||||
*/
|
||||
imask[IPL_TTY] |= imask[IPL_NET] | imask[IPL_BIO];
|
||||
imask[IPL_NET] |= imask[IPL_BIO];
|
||||
|
||||
/*
|
||||
* These are pseudo-levels.
|
||||
*/
|
||||
imask[IPL_NONE] = 0x00000000;
|
||||
imask[IPL_HIGH] = 0xffffffff;
|
||||
|
||||
/* And eventually calculate the complete masks. */
|
||||
for (irq = 0; irq < ICU_LEN; irq++) {
|
||||
register int irqs = 1 << irq;
|
||||
for (q = intrhand[irq]; q; q = q->ih_next)
|
||||
irqs |= imask[q->ih_level];
|
||||
intrmask[irq] = irqs | SIR_ALLMASK;
|
||||
}
|
||||
|
||||
/* Lastly, determine which IRQs are actually in use. */
|
||||
{
|
||||
register int irqs = 0;
|
||||
for (irq = 0; irq < ICU_LEN; irq++)
|
||||
if (intrhand[irq])
|
||||
irqs |= 1 << irq;
|
||||
if (irqs >= 0x100) /* any IRQs >= 8 in use */
|
||||
irqs |= 1 << IRQ_SLAVE;
|
||||
imen = ~irqs;
|
||||
isa_outb(IO_ICU1 + 1, imen);
|
||||
isa_outb(IO_ICU2 + 1, imen >> 8);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Establish a ISA bus interrupt.
|
||||
*/
|
||||
void *
|
||||
intr_establish(ic, irq, type, level, ih_fun, ih_arg)
|
||||
isa_chipset_tag_t ic;
|
||||
int irq;
|
||||
int type;
|
||||
int level;
|
||||
int (*ih_fun) __P((void *));
|
||||
void *ih_arg;
|
||||
{
|
||||
struct intrhand **p, *q, *ih;
|
||||
static struct intrhand fakehand = {NULL, fakeintr};
|
||||
extern int cold;
|
||||
|
||||
/* no point in sleeping unless someone can free memory. */
|
||||
ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK);
|
||||
if (ih == NULL)
|
||||
panic("pci_intr_establish: can't malloc handler info");
|
||||
|
||||
if (!LEGAL_IRQ(irq) || type == IST_NONE)
|
||||
panic("intr_establish: bogus irq or type");
|
||||
|
||||
switch (intrtype[irq]) {
|
||||
case IST_EDGE:
|
||||
case IST_LEVEL:
|
||||
if (type == intrtype[irq])
|
||||
break;
|
||||
case IST_PULSE:
|
||||
if (type != IST_NONE)
|
||||
panic("intr_establish: can't share %s with %s",
|
||||
isa_intr_typename(intrtype[irq]),
|
||||
isa_intr_typename(type));
|
||||
break;
|
||||
}
|
||||
|
||||
/*
|
||||
* Figure out where to put the handler.
|
||||
* This is O(N^2), but we want to preserve the order, and N is
|
||||
* generally small.
|
||||
*/
|
||||
for (p = &intrhand[irq]; (q = *p) != NULL; p = &q->ih_next)
|
||||
;
|
||||
|
||||
/*
|
||||
* Actually install a fake handler momentarily, since we might be doing
|
||||
* this with interrupts enabled and don't want the real routine called
|
||||
* until masking is set up.
|
||||
*/
|
||||
fakehand.ih_level = level;
|
||||
*p = &fakehand;
|
||||
|
||||
intr_calculatemasks();
|
||||
|
||||
/*
|
||||
* Poke the real handler in now.
|
||||
*/
|
||||
ih->ih_fun = ih_fun;
|
||||
ih->ih_arg = ih_arg;
|
||||
ih->ih_count = 0;
|
||||
ih->ih_next = NULL;
|
||||
ih->ih_level = level;
|
||||
ih->ih_irq = irq;
|
||||
ih->ih_what = ""; /* XXX - should be eliminated */
|
||||
*p = ih;
|
||||
|
||||
return (ih);
|
||||
}
|
||||
|
||||
void
|
||||
intr_disestablish(ic, arg)
|
||||
isa_chipset_tag_t ic;
|
||||
void *arg;
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* Process an interrupt from the ISA bus.
|
||||
*/
|
||||
int
|
||||
iointr(mask, cf)
|
||||
unsigned mask;
|
||||
struct clockframe *cf;
|
||||
{
|
||||
struct intrhand *ih;
|
||||
int isa_vector;
|
||||
int o_imen;
|
||||
char vector;
|
||||
|
||||
(void) &isa_vector; /* shut off gcc unused-variable warnings */
|
||||
|
||||
#if 1
|
||||
isa_outb(IO_ICU1, 0x0f); /* Poll */
|
||||
vector = isa_inb(IO_ICU1);
|
||||
if(vector > 0 || (isa_vector = vector & 7) == 2) {
|
||||
isa_outb(IO_ICU2, 0x0f);
|
||||
vector = isa_inb(IO_ICU2);
|
||||
if(vector > 0)
|
||||
return(~0);
|
||||
isa_vector = (vector & 7) | 8;
|
||||
}
|
||||
#endif
|
||||
|
||||
o_imen = imen;
|
||||
imen |= 1 << (isa_vector & (ICU_LEN - 1));
|
||||
if(isa_vector & 0x08) {
|
||||
isa_inb(IO_ICU2 + 1);
|
||||
isa_outb(IO_ICU2 + 1, imen >> 8);
|
||||
isa_outb(IO_ICU2, 0x60 + (isa_vector & 7));
|
||||
isa_outb(IO_ICU1, 0x60 + IRQ_SLAVE);
|
||||
}
|
||||
else {
|
||||
isa_inb(IO_ICU1 + 1);
|
||||
isa_outb(IO_ICU1 + 1, imen);
|
||||
isa_outb(IO_ICU1, 0x60 + isa_vector);
|
||||
}
|
||||
ih = intrhand[isa_vector];
|
||||
while(ih) {
|
||||
(*ih->ih_fun)(ih->ih_arg);
|
||||
ih = ih->ih_next;
|
||||
}
|
||||
imen = o_imen;
|
||||
isa_inb(IO_ICU1 + 1);
|
||||
isa_inb(IO_ICU2 + 1);
|
||||
isa_outb(IO_ICU1 + 1, imen);
|
||||
isa_outb(IO_ICU2 + 1, imen >> 8);
|
||||
|
||||
return(~0); /* Dont reenable */
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialize the interrupt controller logic.
|
||||
*/
|
||||
void
|
||||
initicu()
|
||||
{
|
||||
|
||||
isa_outb(IO_ICU1, 0x11); /* reset; program device, four bytes */
|
||||
isa_outb(IO_ICU1+1, 0); /* starting at this vector index */
|
||||
isa_outb(IO_ICU1+1, 1 << IRQ_SLAVE); /* slave on line 2 */
|
||||
isa_outb(IO_ICU1+1, 1); /* 8086 mode */
|
||||
isa_outb(IO_ICU1+1, 0xff); /* leave interrupts masked */
|
||||
isa_outb(IO_ICU1, 0x68); /* special mask mode (if available) */
|
||||
isa_outb(IO_ICU1, 0x0a); /* Read IRR by default. */
|
||||
|
||||
isa_outb(IO_ICU2, 0x11); /* reset; program device, four bytes */
|
||||
isa_outb(IO_ICU2+1, 8); /* staring at this vector index */
|
||||
isa_outb(IO_ICU2+1, IRQ_SLAVE);
|
||||
isa_outb(IO_ICU2+1, 1); /* 8086 mode */
|
||||
isa_outb(IO_ICU2+1, 0xff); /* leave interrupts masked */
|
||||
isa_outb(IO_ICU2, 0x68); /* special mask mode (if available) */
|
||||
isa_outb(IO_ICU2, 0x0a); /* Read IRR by default. */
|
||||
|
||||
/*
|
||||
* Initialize the VT82C586.
|
||||
* XXX
|
||||
*/
|
||||
|
||||
isa_outb(0x20, 0x10);
|
||||
isa_outb(0x21, 0x00);
|
||||
isa_outb(0x21, 0x00);
|
||||
|
||||
isa_outb(0xa0, 0x10);
|
||||
isa_outb(0xa1, 0x00);
|
||||
isa_outb(0xa1, 0x00);
|
||||
}
|
||||
|
||||
char *
|
||||
isa_intr_typename(type)
|
||||
int type;
|
||||
{
|
||||
|
||||
switch (type) {
|
||||
case IST_NONE :
|
||||
return ("none");
|
||||
case IST_PULSE:
|
||||
return ("pulsed");
|
||||
case IST_EDGE:
|
||||
return ("edge-triggered");
|
||||
case IST_LEVEL:
|
||||
return ("level-triggered");
|
||||
default:
|
||||
panic("isa_intr_typename: invalid type %d", type);
|
||||
}
|
||||
}
|
||||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: pchb.c,v 1.1 2000/03/19 23:07:48 soren Exp $ */
|
||||
/* $NetBSD: pchb.c,v 1.2 2000/03/31 14:51:55 soren Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
|
||||
|
|
@ -66,23 +66,8 @@ pchb_attach(parent, self, aux)
|
|||
{
|
||||
struct pci_attach_args *pa = aux;
|
||||
char devinfo[256];
|
||||
pcireg_t bhlc;
|
||||
|
||||
pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
|
||||
printf("\n%s: %s, rev %d\n", self->dv_xname, devinfo,
|
||||
PCI_REVISION(pa->pa_class));
|
||||
|
||||
/*
|
||||
* XXX Still isn't quite right or enough.
|
||||
*/
|
||||
|
||||
bhlc = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
|
||||
|
||||
bhlc &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
|
||||
bhlc |= (0x40 << PCI_LATTIMER_SHIFT);
|
||||
|
||||
bhlc &= ~(PCI_CACHELINE_MASK << PCI_CACHELINE_SHIFT);
|
||||
bhlc |= (7 << PCI_CACHELINE_SHIFT);
|
||||
|
||||
pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG, bhlc);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: pci_machdep.c,v 1.3 2000/03/21 02:27:50 soren Exp $ */
|
||||
/* $NetBSD: pci_machdep.c,v 1.4 2000/03/31 14:51:55 soren Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
|
||||
|
|
@ -37,6 +37,7 @@
|
|||
|
||||
#define _COBALT_BUS_DMA_PRIVATE
|
||||
#include <machine/bus.h>
|
||||
#include <machine/intr.h>
|
||||
|
||||
#include <dev/pci/pcivar.h>
|
||||
#include <dev/pci/pcireg.h>
|
||||
|
|
@ -153,17 +154,22 @@ pci_intr_string(pc, ih)
|
|||
pci_chipset_tag_t pc;
|
||||
pci_intr_handle_t ih;
|
||||
{
|
||||
static char irqstr[8]; /* 4 + 2 + NULL + sanity */
|
||||
static char irqstr[8];
|
||||
|
||||
/*
|
||||
* XXX
|
||||
*/
|
||||
|
||||
if (ih == 4)
|
||||
sprintf(irqstr, "level 1");
|
||||
else if (ih == 13)
|
||||
sprintf(irqstr, "level 2");
|
||||
else
|
||||
sprintf(irqstr, "irq %d", ih);
|
||||
|
||||
sprintf(irqstr, "irq %d", ih);
|
||||
return irqstr;
|
||||
}
|
||||
|
||||
/* XXX */
|
||||
extern void * intr_establish(int, int, int, int, int (*)(void *), void *);
|
||||
extern void *tlp0;
|
||||
extern void *tlp1;
|
||||
|
||||
void *
|
||||
pci_intr_establish(pc, ih, level, func, arg)
|
||||
pci_chipset_tag_t pc;
|
||||
|
|
@ -172,19 +178,16 @@ pci_intr_establish(pc, ih, level, func, arg)
|
|||
void *arg;
|
||||
{
|
||||
/*
|
||||
* XXX XXX XXX
|
||||
* The two Tulips are wired directly to CPU interrupts.
|
||||
* XXX
|
||||
*/
|
||||
|
||||
if (ih == 4) {
|
||||
tlp0 = arg;
|
||||
return (void *)-1;
|
||||
}
|
||||
if (ih == 13) {
|
||||
tlp1 = arg;
|
||||
return (void *)-1;
|
||||
}
|
||||
|
||||
return intr_establish(NULL, ih, IST_LEVEL, level, func, arg);
|
||||
if (ih == 4)
|
||||
return cpu_intr_establish(1, level, func, arg);
|
||||
else if (ih == 13)
|
||||
return cpu_intr_establish(2, level, func, arg);
|
||||
else
|
||||
return icu_intr_establish(ih, IST_LEVEL, level, func, arg);
|
||||
}
|
||||
|
||||
void
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: pcib.c,v 1.1 2000/03/19 23:07:48 soren Exp $ */
|
||||
/* $NetBSD: pcib.c,v 1.2 2000/03/31 14:51:55 soren Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
|
||||
|
|
@ -29,21 +29,32 @@
|
|||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/device.h>
|
||||
#include <sys/malloc.h>
|
||||
|
||||
#include <machine/cpu.h>
|
||||
#include <machine/bus.h>
|
||||
#include <machine/autoconf.h>
|
||||
#include <machine/intr.h>
|
||||
|
||||
#include <dev/pci/pcivar.h>
|
||||
#include <dev/pci/pcireg.h>
|
||||
|
||||
#include <dev/pci/pcidevs.h>
|
||||
|
||||
#include <dev/isa/isareg.h>
|
||||
|
||||
static int pcib_match(struct device *, struct cfdata *, void *);
|
||||
static void pcib_attach(struct device *, struct device *, void *);
|
||||
static int icu_intr(void *);
|
||||
|
||||
struct cfattach pcib_ca = {
|
||||
sizeof(struct device), pcib_match, pcib_attach
|
||||
};
|
||||
|
||||
static struct {
|
||||
int (*func)(void *);
|
||||
void *arg;
|
||||
} icu[IO_ICUSIZE];
|
||||
|
||||
static int
|
||||
pcib_match(parent, match, aux)
|
||||
struct device *parent;
|
||||
|
|
@ -71,4 +82,57 @@ pcib_attach(parent, self, aux)
|
|||
pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
|
||||
printf("\n%s: %s, rev %d\n", self->dv_xname, devinfo,
|
||||
PCI_REVISION(pa->pa_class));
|
||||
|
||||
/*
|
||||
* Initialize ICU. Since we block all these interrupts with
|
||||
* splbio(), we can just enable all of them all the time here.
|
||||
*/
|
||||
*(volatile u_int8_t *)MIPS_PHYS_TO_KSEG1(0x10000000 + IO_ICU1) = 0x10;
|
||||
*(volatile u_int8_t *)MIPS_PHYS_TO_KSEG1(0x10000000 + IO_ICU1+1) = 0xff;
|
||||
*(volatile u_int8_t *)MIPS_PHYS_TO_KSEG1(0x10000000 + IO_ICU2) = 0x10;
|
||||
*(volatile u_int8_t *)MIPS_PHYS_TO_KSEG1(0x10000000 + IO_ICU2+1) = 0xff;
|
||||
wbflush();
|
||||
|
||||
cpu_intr_establish(4, IPL_NONE, icu_intr, NULL);
|
||||
}
|
||||
|
||||
void *
|
||||
icu_intr_establish(irq, type, level, func, arg)
|
||||
int irq;
|
||||
int type;
|
||||
int level;
|
||||
int (*func)(void *);
|
||||
void *arg;
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i <= IO_ICUSIZE; i++) {
|
||||
if (i == IO_ICUSIZE)
|
||||
panic("too many IRQs");
|
||||
|
||||
if (icu[i].func != NULL)
|
||||
continue;
|
||||
|
||||
icu[i].func = func;
|
||||
icu[i].arg = arg;
|
||||
break;
|
||||
}
|
||||
|
||||
return (void *)-1;
|
||||
}
|
||||
|
||||
int
|
||||
icu_intr(arg)
|
||||
void *arg;
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < IO_ICUSIZE; i++) {
|
||||
if (icu[i].func == NULL)
|
||||
return 0;
|
||||
|
||||
(*icu[i].func)(icu[i].arg);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: pciide_machdep.c,v 1.1 2000/03/19 23:07:48 soren Exp $ */
|
||||
/* $NetBSD: pciide_machdep.c,v 1.2 2000/03/31 14:51:55 soren Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
|
||||
|
|
@ -34,9 +34,6 @@
|
|||
#include <dev/pci/pciidereg.h>
|
||||
#include <dev/pci/pciidevar.h>
|
||||
|
||||
/* XXX */
|
||||
void *intr_establish(int, int, int, int, int (*)(void *), void *);
|
||||
|
||||
void *
|
||||
pciide_machdep_compat_intr_establish(dev, pa, chan, func, arg)
|
||||
struct device *dev;
|
||||
|
|
@ -48,10 +45,8 @@ pciide_machdep_compat_intr_establish(dev, pa, chan, func, arg)
|
|||
int irq;
|
||||
void *cookie;
|
||||
|
||||
/* XXX XXX XXX */
|
||||
|
||||
irq = PCIIDE_COMPAT_IRQ(chan);
|
||||
cookie = intr_establish(NULL, irq, IST_EDGE, IPL_BIO, func, arg);
|
||||
cookie = icu_intr_establish(irq, IST_EDGE, IPL_BIO, func, arg);
|
||||
if (cookie == NULL)
|
||||
return (NULL);
|
||||
printf("%s: %s channel interrupting at irq %d\n", dev->dv_xname,
|
||||
|
|
|
|||
Loading…
Reference in New Issue