Fix 3 problem. Be more stringest in testing register for use. Fix ffs

builtin.  Fix addsi2 pattern.
This commit is contained in:
matt 2001-05-03 17:12:52 +00:00
parent 61ac6af20b
commit 26f751e159
3 changed files with 62 additions and 19 deletions

View File

@ -42,7 +42,17 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
#if 1
#undef PREFERRED_DEBUGGING_TYPE
#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
#define DBX_OUTPUT_FUNCTION_END(file,decl) \
do \
{ \
if (DECL_SECTION_NAME (decl) == NULL_TREE) \
text_section (); \
else \
named_section (decl, NULL, 1); \
} \
while (0)
#endif
#undef DWARF_DEBUGGING_INFO
#undef DWARF2_DEBUGGING_INFO

View File

@ -95,6 +95,11 @@ print_operand_address (file, addr)
goto retry;
case REG:
if (REGNO (addr) >= 16)
{
debug_rtx (orig_addr);
abort ();
}
fprintf (file, "(%s)", reg_names[REGNO (addr)]);
break;
@ -286,7 +291,14 @@ print_operand_address (file, addr)
output_address (offset);
if (breg != 0)
fprintf (file, "(%s)", reg_names[REGNO (breg)]);
{
if (REGNO (breg) >= 16)
{
debug_rtx (orig_addr);
abort ();
}
fprintf (file, "(%s)", reg_names[REGNO (breg)]);
}
if (ireg != 0)
{
@ -775,9 +787,14 @@ check_float_value (mode, d, overflow)
if (GET_CODE (X) == REG) \
{ \
extern rtx *reg_equiv_mem; \
if (! reload_in_progress \
|| (xfoob = reg_equiv_mem[REGNO (X)]) == 0 \
|| INDIRECTABLE_ADDRESS_P (xfoob, STRICT, INDEXED, 0)) \
if (! reload_in_progress) \
goto ADDR; \
if (!STRICT) \
{ \
if ((xfoob = reg_equiv_mem[REGNO (xfoob)]) == 0) \
goto ADDR; \
} \
if (INDIRECTABLE_ADDRESS_P (xfoob, STRICT, INDEXED, 0)) \
goto ADDR; \
} \
if (INDIRECTABLE_CONSTANT_ADDRESS_P (X, INDEXED, 0)) goto ADDR; \
@ -850,6 +867,7 @@ legitimate_address_p(mode, xbar, strict)
int strict;
{
register rtx xfoo, xfoo0, xfoo1;
int from = __LINE__;
GO_IF_NONINDEXED_ADDRESS (xbar, win, strict, 0);
if (GET_CODE (xbar) == PLUS)
{
@ -857,32 +875,45 @@ legitimate_address_p(mode, xbar, strict)
xfoo = XEXP (xbar, 0);
if (INDEX_TERM_P (xfoo, mode, strict))
{
from = __LINE__;
GO_IF_NONINDEXED_ADDRESS (XEXP (xbar, 1), win, strict, 0);
}
xfoo = XEXP (xbar, 1);
if (INDEX_TERM_P (xfoo, mode, strict))
{
from = __LINE__;
GO_IF_NONINDEXED_ADDRESS (XEXP (xbar, 0), win, strict, 0);
}
/* Handle offset(reg)[index] with offset added outermost */
if (INDIRECTABLE_CONSTANT_ADDRESS_P (XEXP (xbar, 0), 1, 0))
{
from = __LINE__;
if (GET_CODE (XEXP (xbar, 1)) == REG
&& XREG_OK_FOR_BASE_P (XEXP (xbar, 1), strict))
goto win;
from = __LINE__;
GO_IF_REG_PLUS_INDEX (XEXP (xbar, 1), mode, win, strict);
}
if (INDIRECTABLE_CONSTANT_ADDRESS_P (XEXP (xbar, 1), 1, 0))
{
from = __LINE__;
if (GET_CODE (XEXP (xbar, 0)) == REG
&& XREG_OK_FOR_BASE_P (XEXP (xbar, 0), strict))
goto win;
from = __LINE__;
GO_IF_REG_PLUS_INDEX (XEXP (xbar, 0), mode, win, strict);
}
}
return 0;
win:
#if 0
if (strict)
{
fprintf(stderr, "line=%d\n", from);
debug_rtx (xbar);
}
#endif
return 1;
}
@ -958,7 +989,8 @@ vax_nonsymbolic_operand (op, mode)
if (vax_symbolic_operand (op, mode))
return 0;
#if 0
if (GET_CODE (op) != CONST_INT && GET_CODE (op) != REG)
if (GET_CODE (op) != CONST_INT && GET_CODE (op) != REG &&
GET_CODE (op) != MEM)
debug_rtx (op);
#endif
return 1;
@ -1050,7 +1082,7 @@ legitimize_pic_address (orig, reg, code)
{
rtx pic_ref = orig;
if (!(flag_pic || TARGET_HALFPIC))
if (!(flag_pic || TARGET_HALFPIC) || no_new_pseudos)
return pic_ref;
/* fprintf(stderr, "before: "); debug_rtx(orig); */

View File

@ -791,7 +791,7 @@
(define_insn "*addsi2"
[(set (match_operand:SI 0 "vax_lvalue_operand" "=g")
(plus:SI (match_operand:SI 1 "vax_nonsymbolic_operand" "%0")
(plus:SI (match_operand:SI 1 "vax_nonsymbolic_operand" "0")
(match_operand:SI 2 "vax_nonsymbolic_operand" "g")))]
""
"*
@ -800,7 +800,12 @@
{
if (GET_CODE (operands[0]) == REG)
return \"movab %a2[%0],%0\";
operands[2] = legitimize_pic_address(operands[2], NULL, CODE_FOR_nothing);
if (TARGET_HALFPIC || flag_pic)
{
if (push_operand (operands[0], SImode))
abort ();
return \"pushab %a2\;addl2 (sp)+,%0\";
}
}
if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) < 0)
return \"subl2 $%n2,%0\";
@ -1268,30 +1273,26 @@
;;- Library expansions.
(define_expand "ffssi2"
[(set (match_operand:SI 0 "vax_lvalue_operand" "=&g")
[(set (match_operand:SI 0 "vax_lvalue_operand" "=&ro")
(ffs:SI (match_operand:SI 1 "general_operand" "g")))]
""
"
{
rtx label = gen_label_rtx ();
rtx temp = gen_reg_rtx (SImode);
emit_insn (gen_ffssi_1 (temp, operands[1]));
emit_insn (gen_ffssi_1 (operands[0], operands[1]));
emit_jump_insn (gen_beq (label));
emit_insn (gen_incsi (temp, temp));
emit_insn (gen_incsi (operands[0], operands[0]));
emit_label (label);
if ( !rtx_equal_p (temp, operands[0]))
emit_move_insn (operands[0], temp);
DONE;
}");
(define_insn "ffssi_1"
[(set (match_operand:SI 0 "vax_lvalue_operand" "=&r")
(unspec:SI [(match_operand:SI 1 "general_operand" "g")] 0))
[(set (match_operand:SI 0 "vax_lvalue_operand" "=&ro")
(ffs:SI (match_operand:SI 1 "general_operand" "g")))
(set (cc0) (match_dup 0))]
""
"clrl %0\;ffs %0,$32,%1,%0")
"clrl %0\;ffs %0,$32,%1,%0");
;;- Multiply instructions.
(define_insn "muldf3"