Fix 3 problem. Be more stringest in testing register for use. Fix ffs
builtin. Fix addsi2 pattern.
This commit is contained in:
parent
61ac6af20b
commit
26f751e159
10
gnu/dist/toolchain/gcc/config/vax/netbsd-elf.h
vendored
10
gnu/dist/toolchain/gcc/config/vax/netbsd-elf.h
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@ -42,7 +42,17 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
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#if 1
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#undef PREFERRED_DEBUGGING_TYPE
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#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
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#define DBX_OUTPUT_FUNCTION_END(file,decl) \
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do \
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{ \
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if (DECL_SECTION_NAME (decl) == NULL_TREE) \
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text_section (); \
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else \
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named_section (decl, NULL, 1); \
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} \
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while (0)
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#endif
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#undef DWARF_DEBUGGING_INFO
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#undef DWARF2_DEBUGGING_INFO
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44
gnu/dist/toolchain/gcc/config/vax/vax.c
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44
gnu/dist/toolchain/gcc/config/vax/vax.c
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@ -95,6 +95,11 @@ print_operand_address (file, addr)
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goto retry;
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case REG:
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if (REGNO (addr) >= 16)
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{
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debug_rtx (orig_addr);
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abort ();
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}
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fprintf (file, "(%s)", reg_names[REGNO (addr)]);
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break;
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@ -286,7 +291,14 @@ print_operand_address (file, addr)
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output_address (offset);
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if (breg != 0)
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fprintf (file, "(%s)", reg_names[REGNO (breg)]);
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{
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if (REGNO (breg) >= 16)
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{
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debug_rtx (orig_addr);
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abort ();
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}
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fprintf (file, "(%s)", reg_names[REGNO (breg)]);
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}
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if (ireg != 0)
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{
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@ -775,9 +787,14 @@ check_float_value (mode, d, overflow)
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if (GET_CODE (X) == REG) \
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{ \
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extern rtx *reg_equiv_mem; \
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if (! reload_in_progress \
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|| (xfoob = reg_equiv_mem[REGNO (X)]) == 0 \
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|| INDIRECTABLE_ADDRESS_P (xfoob, STRICT, INDEXED, 0)) \
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if (! reload_in_progress) \
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goto ADDR; \
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if (!STRICT) \
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{ \
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if ((xfoob = reg_equiv_mem[REGNO (xfoob)]) == 0) \
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goto ADDR; \
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} \
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if (INDIRECTABLE_ADDRESS_P (xfoob, STRICT, INDEXED, 0)) \
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goto ADDR; \
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} \
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if (INDIRECTABLE_CONSTANT_ADDRESS_P (X, INDEXED, 0)) goto ADDR; \
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@ -850,6 +867,7 @@ legitimate_address_p(mode, xbar, strict)
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int strict;
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{
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register rtx xfoo, xfoo0, xfoo1;
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int from = __LINE__;
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GO_IF_NONINDEXED_ADDRESS (xbar, win, strict, 0);
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if (GET_CODE (xbar) == PLUS)
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{
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@ -857,32 +875,45 @@ legitimate_address_p(mode, xbar, strict)
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xfoo = XEXP (xbar, 0);
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if (INDEX_TERM_P (xfoo, mode, strict))
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{
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from = __LINE__;
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GO_IF_NONINDEXED_ADDRESS (XEXP (xbar, 1), win, strict, 0);
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}
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xfoo = XEXP (xbar, 1);
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if (INDEX_TERM_P (xfoo, mode, strict))
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{
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from = __LINE__;
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GO_IF_NONINDEXED_ADDRESS (XEXP (xbar, 0), win, strict, 0);
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}
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/* Handle offset(reg)[index] with offset added outermost */
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if (INDIRECTABLE_CONSTANT_ADDRESS_P (XEXP (xbar, 0), 1, 0))
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{
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from = __LINE__;
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if (GET_CODE (XEXP (xbar, 1)) == REG
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&& XREG_OK_FOR_BASE_P (XEXP (xbar, 1), strict))
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goto win;
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from = __LINE__;
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GO_IF_REG_PLUS_INDEX (XEXP (xbar, 1), mode, win, strict);
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}
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if (INDIRECTABLE_CONSTANT_ADDRESS_P (XEXP (xbar, 1), 1, 0))
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{
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from = __LINE__;
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if (GET_CODE (XEXP (xbar, 0)) == REG
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&& XREG_OK_FOR_BASE_P (XEXP (xbar, 0), strict))
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goto win;
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from = __LINE__;
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GO_IF_REG_PLUS_INDEX (XEXP (xbar, 0), mode, win, strict);
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}
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}
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return 0;
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win:
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#if 0
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if (strict)
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{
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fprintf(stderr, "line=%d\n", from);
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debug_rtx (xbar);
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}
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#endif
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return 1;
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}
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@ -958,7 +989,8 @@ vax_nonsymbolic_operand (op, mode)
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if (vax_symbolic_operand (op, mode))
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return 0;
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#if 0
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if (GET_CODE (op) != CONST_INT && GET_CODE (op) != REG)
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if (GET_CODE (op) != CONST_INT && GET_CODE (op) != REG &&
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GET_CODE (op) != MEM)
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debug_rtx (op);
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#endif
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return 1;
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@ -1050,7 +1082,7 @@ legitimize_pic_address (orig, reg, code)
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{
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rtx pic_ref = orig;
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if (!(flag_pic || TARGET_HALFPIC))
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if (!(flag_pic || TARGET_HALFPIC) || no_new_pseudos)
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return pic_ref;
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/* fprintf(stderr, "before: "); debug_rtx(orig); */
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27
gnu/dist/toolchain/gcc/config/vax/vax.md
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27
gnu/dist/toolchain/gcc/config/vax/vax.md
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@ -791,7 +791,7 @@
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(define_insn "*addsi2"
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[(set (match_operand:SI 0 "vax_lvalue_operand" "=g")
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(plus:SI (match_operand:SI 1 "vax_nonsymbolic_operand" "%0")
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(plus:SI (match_operand:SI 1 "vax_nonsymbolic_operand" "0")
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(match_operand:SI 2 "vax_nonsymbolic_operand" "g")))]
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""
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"*
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@ -800,7 +800,12 @@
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{
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if (GET_CODE (operands[0]) == REG)
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return \"movab %a2[%0],%0\";
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operands[2] = legitimize_pic_address(operands[2], NULL, CODE_FOR_nothing);
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if (TARGET_HALFPIC || flag_pic)
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{
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if (push_operand (operands[0], SImode))
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abort ();
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return \"pushab %a2\;addl2 (sp)+,%0\";
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}
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}
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if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) < 0)
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return \"subl2 $%n2,%0\";
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@ -1268,30 +1273,26 @@
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;;- Library expansions.
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(define_expand "ffssi2"
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[(set (match_operand:SI 0 "vax_lvalue_operand" "=&g")
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[(set (match_operand:SI 0 "vax_lvalue_operand" "=&ro")
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(ffs:SI (match_operand:SI 1 "general_operand" "g")))]
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""
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"
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{
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rtx label = gen_label_rtx ();
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rtx temp = gen_reg_rtx (SImode);
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emit_insn (gen_ffssi_1 (temp, operands[1]));
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emit_insn (gen_ffssi_1 (operands[0], operands[1]));
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emit_jump_insn (gen_beq (label));
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emit_insn (gen_incsi (temp, temp));
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emit_insn (gen_incsi (operands[0], operands[0]));
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emit_label (label);
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if ( !rtx_equal_p (temp, operands[0]))
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emit_move_insn (operands[0], temp);
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DONE;
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}");
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(define_insn "ffssi_1"
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[(set (match_operand:SI 0 "vax_lvalue_operand" "=&r")
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(unspec:SI [(match_operand:SI 1 "general_operand" "g")] 0))
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[(set (match_operand:SI 0 "vax_lvalue_operand" "=&ro")
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(ffs:SI (match_operand:SI 1 "general_operand" "g")))
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(set (cc0) (match_dup 0))]
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""
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"clrl %0\;ffs %0,$32,%1,%0")
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"clrl %0\;ffs %0,$32,%1,%0");
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;;- Multiply instructions.
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(define_insn "muldf3"
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