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regen.

This commit is contained in:
andvar 2023-08-10 06:23:27 +00:00
parent bfd02c2cd4
commit 263445ea3d
2 changed files with 4 additions and 4 deletions
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4
sys/dev/pci/pcidevs.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: pcidevs.h,v 1.1472 2023/08/09 09:58:00 msaitoh Exp $ */
/* $NetBSD: pcidevs.h,v 1.1473 2023/08/10 06:23:27 andvar Exp $ */
/*
* THIS FILE IS AUTOMATICALLY GENERATED. DO NOT EDIT.
@ -9941,7 +9941,7 @@
#define PCI_PRODUCT_VIATECH_VX900_PCIE_1 0xb410 /* VX900 PCI Express Root Port 1 */
#define PCI_PRODUCT_VIATECH_VT3237_PPB 0xb999 /* K8T890 North / VT8237 South PCI-PCI Bridge */
#define PCI_PRODUCT_VIATECH_K8T890_PPB_C238 0xc238 /* K8T890 PCI-PCI Bridge */
#define PCI_PRODUCT_VIATECH_VX800_PCI_G0 0xc353 /* VX800/VX820 PCI Express Root Port G0 */
#define PCI_PRODUCT_VIATECH_VX800_PCIE_G0 0xc353 /* VX800/VX820 PCI Express Root Port G0 */
#define PCI_PRODUCT_VIATECH_P4M900_PPB_2 0xc364 /* CN896/P4M900 PCI-PCI Bridge */
#define PCI_PRODUCT_VIATECH_VX900_PCIE_2 0xc410 /* VX900 PCI Express Root Port 2 */
#define PCI_PRODUCT_VIATECH_K8T890_PPB_D238 0xd238 /* K8T890 PCI-PCI Bridge */

4
sys/dev/pci/pcidevs_data.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: pcidevs_data.h,v 1.1471 2023/08/09 09:58:00 msaitoh Exp $ */
/* $NetBSD: pcidevs_data.h,v 1.1472 2023/08/10 06:23:27 andvar Exp $ */
/*
* THIS FILE IS AUTOMATICALLY GENERATED. DO NOT EDIT.
@ -17989,7 +17989,7 @@ static const uint32_t pci_products[] = {
41543, 8360, 2173, 42050, 8644, 8725, 6521, 0,
PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_PPB_C238,
41543, 8725, 6521, 0,
PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX800_PCI_G0,
PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX800_PCIE_G0,
41591, 615, 4320, 8083, 8096, 42380, 0,
PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_P4M900_PPB_2,
41603, 8725, 6521, 0,