Add driver for ELBOX FastATA 1200 Mk-III/Mk-IV (and the man page).
This commit is contained in:
rkujawa
parent
d2b3be01af
commit
25abb1786a
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@ -1,4 +1,4 @@
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# $NetBSD: mi,v 1.1350 2011/10/18 10:19:11 wiz Exp $
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# $NetBSD: mi,v 1.1351 2011/10/27 22:12:24 rkujawa Exp $
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#
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# Note: don't delete entries from here - mark them as "obsolete" instead.
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#
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@ -728,6 +728,7 @@
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./usr/share/man/cat4/amiga/bppcsc.0 man-sys-catman .cat
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./usr/share/man/cat4/amiga/console.0 man-sys-catman .cat
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./usr/share/man/cat4/amiga/ed.0 man-sys-catman .cat
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./usr/share/man/cat4/amiga/efa.0 man-sys-catman .cat
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./usr/share/man/cat4/amiga/es.0 man-sys-catman .cat
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./usr/share/man/cat4/amiga/fdc.0 man-sys-catman .cat
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./usr/share/man/cat4/amiga/grf.0 man-sys-catman .cat
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@ -3604,6 +3605,7 @@
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./usr/share/man/html4/amiga/bppcsc.html man-sys-htmlman html
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./usr/share/man/html4/amiga/console.html man-sys-htmlman html
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./usr/share/man/html4/amiga/ed.html man-sys-htmlman html
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./usr/share/man/html4/amiga/efa.html man-sys-htmlman html
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./usr/share/man/html4/amiga/es.html man-sys-htmlman html
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./usr/share/man/html4/amiga/fdc.html man-sys-htmlman html
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./usr/share/man/html4/amiga/grf.html man-sys-htmlman html
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@ -6177,6 +6179,7 @@
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./usr/share/man/man4/amiga/bppcsc.4 man-sys-man .man
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./usr/share/man/man4/amiga/console.4 man-sys-man .man
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./usr/share/man/man4/amiga/ed.4 man-sys-man .man
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./usr/share/man/man4/amiga/efa.4 man-sys-man .man
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./usr/share/man/man4/amiga/es.4 man-sys-man .man
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./usr/share/man/man4/amiga/fdc.4 man-sys-man .man
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./usr/share/man/man4/amiga/grf.4 man-sys-man .man
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@ -1,8 +1,8 @@
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# from: @(#)Makefile 8.2 (Berkeley) 2/16/94
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# $NetBSD: Makefile,v 1.20 2011/09/17 17:04:22 rkujawa Exp $
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# $NetBSD: Makefile,v 1.21 2011/10/27 22:12:24 rkujawa Exp $
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MAN= afsc.4 ahsc.4 amidisplaycc.4 atzsc.4 autoconf.4 console.4 bah.4 \
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bppcsc.4 ed.4 es.4 fdc.4 grf.4 \
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bppcsc.4 ed.4 efa.4 es.4 fdc.4 grf.4 \
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grfcl.4 grfcv.4 grfcv3d.4 grfet.4 grfrh.4 grfrt.4 grful.4 \
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gtsc.4 intro.4 ite.4 mem.4 mfcs.4 mgnsc.4 mppb.4 p5pb.4 \
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qn.4 ser.4 wesc.4 zssc.4
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@ -0,0 +1,110 @@
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.\" $NetBSD: efa.4,v 1.1 2011/10/27 22:12:24 rkujawa Exp $
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.\"
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.\" Copyright (c) 2011 The NetBSD Foundation, Inc.
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.\" All rights reserved.
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.\"
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.\" This code is derived from software contributed to The NetBSD Foundation
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.\" by Radoslaw Kujawa.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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.\" POSSIBILITY OF SUCH DAMAGE.
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.\"
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.Dd October 25, 2011
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.Dt EFA 4 amiga
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.Os
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.Sh NAME
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.Nm efa
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.Nd ELBOX FastATA 1200 IDE disk controller driver
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.Sh SYNOPSIS
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.Cd "efa0 at mainbus0"
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.\".Cd "options EFA_32BIT_IO"
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.\".Cd "options EFA_NO_INTR"
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.Sh DESCRIPTION
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The
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.Nm
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driver provides support for the FastATA 1200 family of IDE controllers and
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provides the interface with the hardware for the
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.Xr ata 4
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driver. PIO modes 0, 3, 4 and 5 are supported.
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.\".Pp
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.\"The following kernel configuration options are available:
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.\".Bl -ohang
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.\".It Cd options EFA_32BIT_IO
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.\"Use 32-bit data port.
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.\".It Cd options EFA_GAYLE_COMPAT
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.\"Drive FastATA in Gayle IDE compatibility mode. Use if the driver does not
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.\"work correctly in native (default) mode. Limits operation to PIO0 mode.
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.\".El
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.Sh HARDWARE
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The
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.Nm
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driver supports the following hardware:
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.Bl -tag -width "ELBOX FastATA 1200 Mk-IV" -offset indent
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.It Em ELBOX FastATA 1200 Mk-III
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.It Em ELBOX FastATA 1200 Mk-IV
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.El
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.Sh SEE ALSO
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.Xr ata 4 ,
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.Xr wdc 4
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.Sh HISTORY
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The
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.Nm
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device first appeared in
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.Nx 6.0 .
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.Sh AUTHORS
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.An -nosplit
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The
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.Nm
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driver was written by
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.An Radoslaw Kujawa Aq radoslaw.kujawa@gmail.com .
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.Sh CAVEATS
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Older versions of FastATA 1200 are NOT supported:
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.Bl -tag -width "ELBOX FastATA 1200 Mk-II" -offset indent
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.It Em ELBOX FastATA 1200 Mk-I
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.It Em ELBOX FastATA 1200 Lite
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.It Em ELBOX FastATA 1200 GOLD
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.It Em ELBOX FastATA 1200 Mk-II
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.El
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.Pp
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These devices do not generate hardware interrupts and need to be driven in
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non-standard polling mode. Code needed to support it is present in driver
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but does not work correctly.
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.Pp
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Some of the above devices were also marketed under PowerFlyer and Winner brands.
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.Pp
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The
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.Nm
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driver can not coexist with
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.Xr wdc 4
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driver attached to
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.Xr mainbus 4 ,
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because FastATA 1200 hardware uses portions of the on-board Gayle IDE
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controller. These
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drivers should not be enabled in the same kernel.
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.Pp
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DMA modes are not supported, this is a hardware limitation.
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.Sh BUGS
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Performance is worse than with official AmigaOS driver from ELBOX.
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.Pp
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Disks paritioned in split mode, which is specific to official AmigaOS FastATA
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driver, are not recognized in NetBSD.
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.Pp
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Improved probe procedure should be written.
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@ -1,4 +1,4 @@
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# $NetBSD: GENERIC.in,v 1.84 2011/09/19 19:15:29 rkujawa Exp $
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# $NetBSD: GENERIC.in,v 1.85 2011/10/27 22:12:23 rkujawa Exp $
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#
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##
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# GENERIC machine description file
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@ -57,7 +57,7 @@ include "arch/amiga/conf/std.amiga"
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options INCLUDE_CONFIG_FILE # embed config file in kernel binary
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#ident "GENERIC-$Revision: 1.84 $"
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#ident "GENERIC-$Revision: 1.85 $"
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m4_ifdef(`INSTALL_CONFIGURATION', `m4_dnl
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makeoptions COPTS="-Os"
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@ -528,8 +528,10 @@ scsibus* at empsc0
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wdc0 at mainbus0 # A4000 & A1200 IDE bus
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wdc* at zbus0 # Buddha / Catweasel
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#efa0 at mainbus0 # ELBOX FastATA 1200 Mk-III/Mk-IV
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atabus* at wdc? channel ? # ATA bus
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#atabus* at efa? channel ? # ATA bus
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wd* at atabus? drive ? # + drives
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atapibus* at atabus? # ATAPI bus
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cd* at atapibus? drive ? # ATAPI CD-ROM drives
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@ -1,4 +1,4 @@
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# $NetBSD: files.amiga,v 1.148 2011/09/19 19:15:29 rkujawa Exp $
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# $NetBSD: files.amiga,v 1.149 2011/10/27 22:12:23 rkujawa Exp $
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# maxpartitions must be first item in files.${ARCH}.newconf
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maxpartitions 16 # NOTE THAT AMIGA IS SPECIAL!
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@ -470,6 +470,11 @@ file arch/amiga/dev/wdc_amiga.c wdc_amiga
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attach wdc at zbus with wdc_buddha
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file arch/amiga/dev/wdc_buddha.c wdc_buddha
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# FastATA
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device efa: ata,wdc_common
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attach efa at mainbus
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file arch/amiga/dev/efa.c efa
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# Compatibility modules
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# NetBSD m68k a.out Binary Compatibility (COMPAT_AOUT_M68K)
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@ -0,0 +1,558 @@
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/* $NetBSD: efa.c,v 1.1 2011/10/27 22:12:23 rkujawa Exp $ */
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/*-
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* Copyright (c) 2011 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Radoslaw Kujawa.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Driver for FastATA 1200 EIDE controller, manufactured by ELBOX Computer.
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*
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* Gayle-related stuff inspired by wdc_amiga.c written by Michael L. Hitch
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* and Aymeric Vincent.
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*/
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#include <sys/cdefs.h>
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/device.h>
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#include <sys/bus.h>
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#include <sys/proc.h>
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#include <sys/kernel.h>
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#include <sys/kthread.h>
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#include <machine/cpu.h>
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#include <machine/intr.h>
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#include <sys/bswap.h>
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#include <amiga/amiga/cia.h>
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#include <amiga/amiga/custom.h>
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#include <amiga/amiga/device.h>
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#include <amiga/amiga/gayle.h>
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#include <amiga/dev/zbusvar.h>
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#include <dev/ata/atavar.h>
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#include <dev/ic/wdcvar.h>
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#include <amiga/dev/efareg.h>
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#include <amiga/dev/efavar.h>
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/* #define EFA_32BIT_IO 1 */
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/* #define EFA_NO_INTR 1 */
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/* #define EFA_DEBUG 1 */
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int efa_probe(device_t, cfdata_t, void *);
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void efa_attach(device_t, device_t, void *);
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int efa_intr(void *);
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int efa_intr_soft(void *arg);
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static void efa_set_opts(struct efa_softc *sc);
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static bool efa_mapbase(struct efa_softc *sc);
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static bool efa_mapreg_gayle(struct efa_softc *sc);
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static bool efa_mapreg_native(struct efa_softc *sc);
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static void efa_fata_subregion_pio0(struct wdc_regs *wdr_fata);
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static void efa_fata_subregion_pion(struct wdc_regs *wdr_fata, bool data32);
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static void efa_setup_channel(struct ata_channel *chp);
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static void efa_attach_channel(struct efa_softc *sc, int i);
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static void efa_select_regset(struct efa_softc *sc, int chnum,
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uint8_t piomode);
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static void efa_poll_kthread(void *arg);
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#ifdef EFA_DEBUG
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static void efa_debug_print_regmapping(struct wdc_regs *wdr_fata);
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#endif /* EFA_DEBUG */
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CFATTACH_DECL_NEW(efa, sizeof(struct efa_softc),
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efa_probe, efa_attach, NULL, NULL);
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#define PIO_NSUPP 0xFFFFFFFF
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static const bus_addr_t pio_offsets[] =
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{ FATA1_PIO0_OFF, PIO_NSUPP, PIO_NSUPP, FATA1_PIO3_OFF, FATA1_PIO4_OFF,
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FATA1_PIO5_OFF };
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static const unsigned int wdr_offsets_pio0[] =
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{ FATA1_PIO0_OFF_DATA, FATA1_PIO0_OFF_ERROR, FATA1_PIO0_OFF_SECCNT,
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FATA1_PIO0_OFF_SECTOR, FATA1_PIO0_OFF_CYL_LO, FATA1_PIO0_OFF_CYL_HI,
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FATA1_PIO0_OFF_SDH, FATA1_PIO0_OFF_COMMAND };
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static const unsigned int wdr_offsets_pion[] =
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{ FATA1_PION_OFF_DATA, FATA1_PION_OFF_ERROR, FATA1_PION_OFF_SECCNT,
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FATA1_PION_OFF_SECTOR, FATA1_PION_OFF_CYL_LO, FATA1_PION_OFF_CYL_HI,
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FATA1_PION_OFF_SDH, FATA1_PION_OFF_COMMAND };
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static const unsigned int wdr_offsets_pion32[] =
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{ FATA1_PION_OFF_DATA32, FATA1_PION_OFF_ERROR, FATA1_PION_OFF_SECCNT,
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FATA1_PION_OFF_SECTOR, FATA1_PION_OFF_CYL_LO, FATA1_PION_OFF_CYL_HI,
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FATA1_PION_OFF_SDH, FATA1_PION_OFF_COMMAND };
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int
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efa_probe(device_t parent, cfdata_t cfp, void *aux)
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{
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/* FastATA 1200 uses portions of Gayle IDE interface, and efa driver
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* can't coexist with wdc_amiga. Match "wdc" on an A1200, because
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* FastATA 1200 does not autoconfigure. */
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if( !matchname(aux, "wdc") || !is_a1200() )
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return(0);
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return 100;
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}
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void
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efa_attach(device_t parent, device_t self, void *aux)
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{
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int i;
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struct efa_softc *sc = device_private(self);
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aprint_normal(": ELBOX FastATA 1200\n");
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gayle_init();
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sc->sc_dev = self;
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efa_set_opts(sc);
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if(!efa_mapbase(sc)) {
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aprint_error_dev(self, "couldn't map base addresses\n");
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return;
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}
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if(!efa_mapreg_gayle(sc)) {
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aprint_error_dev(self, "couldn't map Gayle registers\n");
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return;
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}
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if(!efa_mapreg_native(sc)) {
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aprint_error_dev(self, "couldn't map FastATA regsters\n");
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return;
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}
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sc->sc_wdcdev.sc_atac.atac_pio_cap = 5;
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sc->sc_wdcdev.sc_atac.atac_nchannels = FATA1_CHANNELS;
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sc->sc_wdcdev.sc_atac.atac_set_modes = efa_setup_channel;
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sc->sc_wdcdev.sc_atac.atac_dev = self;
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sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanlist;
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if(sc->sc_32bit_io)
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sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA32;
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else
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sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16;
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/*
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* The following should work for polling mode, but it does not.
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* if(sc->sc_no_intr)
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* sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_NOIRQ;
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*/
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wdc_allocate_regs(&sc->sc_wdcdev);
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sc->sc_intreg = &gayle.intreq;
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for(i = 0; i < FATA1_CHANNELS; i++) {
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efa_attach_channel(sc, i);
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}
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if(sc->sc_no_intr) {
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sc->sc_fata_softintr = softint_establish(SOFTINT_BIO,
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(void (*)(void *))efa_intr_soft, sc);
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if (sc->sc_fata_softintr == NULL) {
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aprint_error_dev(self, "couldn't create soft intr\n");
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return;
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}
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if (kthread_create(PRI_NONE, 0, NULL, efa_poll_kthread, sc,
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NULL, "efa")) {
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aprint_error_dev(self, "couldn't create kthread\n");
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return;
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}
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} else {
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sc->sc_isr.isr_intr = efa_intr;
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sc->sc_isr.isr_arg = sc;
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sc->sc_isr.isr_ipl = 2;
|
||||
add_isr (&sc->sc_isr);
|
||||
gayle.intena |= GAYLE_INT_IDE;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
static void
|
||||
efa_attach_channel(struct efa_softc *sc, int chnum)
|
||||
{
|
||||
sc->sc_chanlist[chnum] = &sc->sc_ports[chnum].chan;
|
||||
|
||||
sc->sc_ports[chnum].chan.ch_channel = chnum;
|
||||
sc->sc_ports[chnum].chan.ch_atac = &sc->sc_wdcdev.sc_atac;
|
||||
sc->sc_ports[chnum].chan.ch_queue = &sc->sc_ports[chnum].queue;
|
||||
sc->sc_ports[chnum].chan.ch_ndrive = 2;
|
||||
|
||||
if(!sc->sc_32bit_io)
|
||||
efa_select_regset(sc, chnum, 0); /* Start in PIO0. */
|
||||
else
|
||||
efa_select_regset(sc, chnum, 3);
|
||||
|
||||
wdc_init_shadow_regs(&sc->sc_ports[chnum].chan);
|
||||
|
||||
wdcattach(&sc->sc_ports[chnum].chan);
|
||||
|
||||
#ifdef EFA_DEBUG
|
||||
aprint_normal_dev(sc->sc_dev, "done init for channel %d\n", chnum);
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
/* TODO: convert to callout(9) */
|
||||
static void
|
||||
efa_poll_kthread(void *arg)
|
||||
{
|
||||
struct efa_softc *sc = arg;
|
||||
|
||||
for(;;) {
|
||||
/* TODO: actually check if interrupt status register is set */
|
||||
softint_schedule(sc->sc_fata_softintr);
|
||||
/* TODO: convert to kpause */
|
||||
tsleep(arg, PWAIT, "efa_poll", hz);
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
efa_set_opts(struct efa_softc *sc)
|
||||
{
|
||||
#ifdef EFA_32BIT_IO
|
||||
sc->sc_32bit_io = true; /* XXX: bus_space_read_multi_stream_4 */
|
||||
#else
|
||||
sc->sc_32bit_io = false;
|
||||
#endif /* EFA_32BIT_IO */
|
||||
|
||||
#ifdef EFA_NO_INTR
|
||||
sc->sc_no_intr = true; /* XXX: not yet! */
|
||||
#else
|
||||
sc->sc_no_intr = false;
|
||||
#endif /* EFA_NO_INTR */
|
||||
|
||||
if(sc->sc_no_intr)
|
||||
aprint_verbose_dev(sc->sc_dev, "hardware interrupt disabled\n");
|
||||
|
||||
if(sc->sc_32bit_io)
|
||||
aprint_verbose_dev(sc->sc_dev, "32-bit I/O enabled\n");
|
||||
}
|
||||
|
||||
int
|
||||
efa_intr_soft(void *arg)
|
||||
{
|
||||
int ret = 0;
|
||||
struct efa_softc *sc = (struct efa_softc *)arg;
|
||||
|
||||
/* TODO: check which channel needs servicing */
|
||||
/*
|
||||
uint8_t fataintreq;
|
||||
fataintreq = bus_space_read_1(sc->sc_ports[0].wdr[piom].cmd_iot,
|
||||
sc->sc_ports[chnum].intst[piom], 0);
|
||||
*/
|
||||
|
||||
ret = wdcintr(&sc->sc_ports[0].chan);
|
||||
ret = wdcintr(&sc->sc_ports[1].chan);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int
|
||||
efa_intr(void *arg)
|
||||
{
|
||||
struct efa_softc *sc = (struct efa_softc *)arg;
|
||||
int r1, r2;
|
||||
|
||||
u_char intreq = *sc->sc_intreg;
|
||||
int ret = 0;
|
||||
|
||||
if (intreq & GAYLE_INT_IDE) {
|
||||
gayle.intreq = 0x7c | (intreq & 0x03);
|
||||
/* How to check which channel caused interrupt?
|
||||
* Interrupt status register is not very useful here. */
|
||||
r1 = wdcintr(&sc->sc_ports[0].chan);
|
||||
r2 = wdcintr(&sc->sc_ports[1].chan);
|
||||
ret = r1 | r2;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static bool
|
||||
efa_mapbase(struct efa_softc *sc)
|
||||
{
|
||||
int i, j;
|
||||
static struct bus_space_tag fata_cmd_iot;
|
||||
static struct bus_space_tag gayle_cmd_iot;
|
||||
|
||||
gayle_cmd_iot.base = (bus_addr_t) ztwomap(GAYLE_IDE_BASE + 2);
|
||||
gayle_cmd_iot.absm = &amiga_bus_stride_4swap;
|
||||
fata_cmd_iot.base = (bus_addr_t) ztwomap(FATA1_BASE);
|
||||
fata_cmd_iot.absm = &amiga_bus_stride_4swap;
|
||||
|
||||
#ifdef EFA_DEBUG
|
||||
aprint_normal_dev(sc->sc_dev, "Gayle %x -> %x, FastATA %x -> %x\n",
|
||||
GAYLE_IDE_BASE, gayle_cmd_iot.base, FATA1_BASE, fata_cmd_iot.base);
|
||||
#endif
|
||||
|
||||
if(!gayle_cmd_iot.base)
|
||||
return false;
|
||||
if(!fata_cmd_iot.base)
|
||||
return false;
|
||||
|
||||
sc->sc_gayle_wdc_regs.cmd_iot = &gayle_cmd_iot;
|
||||
sc->sc_gayle_wdc_regs.ctl_iot = &gayle_cmd_iot;
|
||||
|
||||
for(i = 0; i < FATA1_CHANNELS; i++) {
|
||||
for(j = 0; j < PIO_COUNT; j++) {
|
||||
sc->sc_ports[i].wdr[j].cmd_iot = &fata_cmd_iot;
|
||||
sc->sc_ports[i].wdr[j].ctl_iot = &gayle_cmd_iot;
|
||||
}
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
/* Gayle IDE register mapping, we need it anyway. */
|
||||
static bool
|
||||
efa_mapreg_gayle(struct efa_softc *sc)
|
||||
{
|
||||
int i;
|
||||
|
||||
struct wdc_regs *wdr = &sc->sc_gayle_wdc_regs;
|
||||
|
||||
if (bus_space_map(wdr->cmd_iot, 0, 0x40, 0,
|
||||
&wdr->cmd_baseioh)) {
|
||||
return false;
|
||||
}
|
||||
|
||||
for (i = 0; i < WDC_NREG; i++) {
|
||||
if (bus_space_subregion(wdr->cmd_iot,
|
||||
wdr->cmd_baseioh, i, i == 0 ? 4 : 1,
|
||||
&wdr->cmd_iohs[i]) != 0) {
|
||||
|
||||
bus_space_unmap(wdr->cmd_iot,
|
||||
wdr->cmd_baseioh, 0x40);
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
if (bus_space_subregion(wdr->cmd_iot,
|
||||
wdr->cmd_baseioh, 0x406, 1, &wdr->ctl_ioh))
|
||||
return false;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
/* Native FastATA register mapping, suitable for PIO modes 0 to 5. */
|
||||
static bool
|
||||
efa_mapreg_native(struct efa_softc *sc) {
|
||||
int i,j;
|
||||
struct wdc_regs *wdr_gayle = &sc->sc_gayle_wdc_regs;
|
||||
struct wdc_regs *wdr_fata;
|
||||
|
||||
for(i = 0; i < FATA1_CHANNELS; i++) {
|
||||
|
||||
for(j = 0; j < PIO_COUNT; j++) {
|
||||
|
||||
wdr_fata = &sc->sc_ports[i].wdr[j];
|
||||
sc->sc_ports[i].mode_ok[j] = false;
|
||||
|
||||
if(pio_offsets[j] == PIO_NSUPP) {
|
||||
#ifdef EFA_DEBUG
|
||||
aprint_normal_dev(sc->sc_dev,
|
||||
"Skipping mapping for PIO mode %x\n", j);
|
||||
#endif
|
||||
continue;
|
||||
}
|
||||
|
||||
if(bus_space_map(wdr_fata->cmd_iot,
|
||||
pio_offsets[j] + FATA1_CHAN_SIZE * i,
|
||||
FATA1_CHAN_SIZE, 0, &wdr_fata->cmd_baseioh)) {
|
||||
return false;
|
||||
}
|
||||
#ifdef EFA_DEBUG
|
||||
aprint_normal_dev(sc->sc_dev,
|
||||
"Chan %x PIO mode %x mapped %x -> %x\n",
|
||||
i, j, (bus_addr_t) kvtop((void*)
|
||||
wdr_fata->cmd_baseioh), (unsigned int)
|
||||
wdr_fata->cmd_baseioh);
|
||||
#endif
|
||||
|
||||
sc->sc_ports[i].mode_ok[j] = true;
|
||||
|
||||
if(j == 0)
|
||||
efa_fata_subregion_pio0(wdr_fata);
|
||||
else {
|
||||
if(sc->sc_32bit_io)
|
||||
efa_fata_subregion_pion(wdr_fata,
|
||||
true);
|
||||
else
|
||||
efa_fata_subregion_pion(wdr_fata,
|
||||
false);
|
||||
|
||||
bus_space_subregion(wdr_fata->cmd_iot,
|
||||
wdr_fata->cmd_baseioh, FATA1_PION_OFF_INTST,
|
||||
1, &sc->sc_ports[i].intst[j]);
|
||||
}
|
||||
|
||||
/* No 32-bit register for PIO0 ... */
|
||||
if(j == 0 && sc->sc_32bit_io)
|
||||
sc->sc_ports[i].mode_ok[j] = false;
|
||||
|
||||
wdr_fata->ctl_ioh = wdr_gayle->ctl_ioh;
|
||||
};
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
efa_fata_subregion_pio0(struct wdc_regs *wdr_fata)
|
||||
{
|
||||
|
||||
bus_space_subregion(wdr_fata->cmd_iot, wdr_fata->cmd_baseioh,
|
||||
FATA1_PIO0_OFF_DATA, 4, &wdr_fata->cmd_iohs[wd_data]);
|
||||
bus_space_subregion(wdr_fata->cmd_iot, wdr_fata->cmd_baseioh,
|
||||
FATA1_PIO0_OFF_ERROR, 1, &wdr_fata->cmd_iohs[wd_error]);
|
||||
bus_space_subregion(wdr_fata->cmd_iot, wdr_fata->cmd_baseioh,
|
||||
FATA1_PIO0_OFF_SECCNT, 1, &wdr_fata->cmd_iohs[wd_seccnt]);
|
||||
bus_space_subregion(wdr_fata->cmd_iot, wdr_fata->cmd_baseioh,
|
||||
FATA1_PIO0_OFF_SECTOR, 1, &wdr_fata->cmd_iohs[wd_sector]);
|
||||
bus_space_subregion(wdr_fata->cmd_iot, wdr_fata->cmd_baseioh,
|
||||
FATA1_PIO0_OFF_CYL_LO, 1, &wdr_fata->cmd_iohs[wd_cyl_lo]);
|
||||
bus_space_subregion(wdr_fata->cmd_iot, wdr_fata->cmd_baseioh,
|
||||
FATA1_PIO0_OFF_CYL_HI, 1, &wdr_fata->cmd_iohs[wd_cyl_hi]);
|
||||
bus_space_subregion(wdr_fata->cmd_iot, wdr_fata->cmd_baseioh,
|
||||
FATA1_PIO0_OFF_SDH, 1, &wdr_fata->cmd_iohs[wd_sdh]);
|
||||
bus_space_subregion(wdr_fata->cmd_iot, wdr_fata->cmd_baseioh,
|
||||
FATA1_PIO0_OFF_COMMAND, 1, &wdr_fata->cmd_iohs[wd_command]);
|
||||
}
|
||||
|
||||
static void
|
||||
efa_fata_subregion_pion(struct wdc_regs *wdr_fata, bool data32)
|
||||
{
|
||||
if(data32)
|
||||
bus_space_subregion(wdr_fata->cmd_iot, wdr_fata->cmd_baseioh,
|
||||
FATA1_PION_OFF_DATA32, 8, &wdr_fata->cmd_iohs[wd_data]);
|
||||
else
|
||||
bus_space_subregion(wdr_fata->cmd_iot, wdr_fata->cmd_baseioh,
|
||||
FATA1_PION_OFF_DATA, 4, &wdr_fata->cmd_iohs[wd_data]);
|
||||
|
||||
bus_space_subregion(wdr_fata->cmd_iot, wdr_fata->cmd_baseioh,
|
||||
FATA1_PION_OFF_ERROR, 1, &wdr_fata->cmd_iohs[wd_error]);
|
||||
bus_space_subregion(wdr_fata->cmd_iot, wdr_fata->cmd_baseioh,
|
||||
FATA1_PION_OFF_SECCNT, 1, &wdr_fata->cmd_iohs[wd_seccnt]);
|
||||
bus_space_subregion(wdr_fata->cmd_iot, wdr_fata->cmd_baseioh,
|
||||
FATA1_PION_OFF_SECTOR, 1, &wdr_fata->cmd_iohs[wd_sector]);
|
||||
bus_space_subregion(wdr_fata->cmd_iot, wdr_fata->cmd_baseioh,
|
||||
FATA1_PION_OFF_CYL_LO, 1, &wdr_fata->cmd_iohs[wd_cyl_lo]);
|
||||
bus_space_subregion(wdr_fata->cmd_iot, wdr_fata->cmd_baseioh,
|
||||
FATA1_PION_OFF_CYL_HI, 1, &wdr_fata->cmd_iohs[wd_cyl_hi]);
|
||||
bus_space_subregion(wdr_fata->cmd_iot, wdr_fata->cmd_baseioh,
|
||||
FATA1_PION_OFF_SDH, 1, &wdr_fata->cmd_iohs[wd_sdh]);
|
||||
bus_space_subregion(wdr_fata->cmd_iot, wdr_fata->cmd_baseioh,
|
||||
FATA1_PION_OFF_COMMAND, 1, &wdr_fata->cmd_iohs[wd_command]);
|
||||
}
|
||||
|
||||
static void
|
||||
efa_setup_channel(struct ata_channel *chp)
|
||||
{
|
||||
int drive, chnum;
|
||||
uint8_t mode;
|
||||
struct atac_softc *atac;
|
||||
struct ata_drive_datas *drvp;
|
||||
struct efa_softc *sc;
|
||||
int ipl;
|
||||
|
||||
chnum = chp->ch_channel;
|
||||
atac = chp->ch_atac;
|
||||
sc = device_private(atac->atac_dev);
|
||||
|
||||
mode = 5; /* start with fastest possible setting */
|
||||
|
||||
#ifdef EFA_DEBUG
|
||||
aprint_normal_dev(sc->sc_dev, "efa_setup_channel for ch %d\n",
|
||||
chnum);
|
||||
#endif /* EFA_DEBUG */
|
||||
|
||||
/* We might be in the middle of something... so raise IPL. */
|
||||
ipl = splvm();
|
||||
|
||||
for (drive = 0; drive < 2; drive++) {
|
||||
drvp = &chp->ch_drive[drive];
|
||||
|
||||
if ((drvp->drive_flags & DRIVE) == 0)
|
||||
continue; /* nothing to see here */
|
||||
|
||||
if(drvp->PIO_cap < mode);
|
||||
mode = drvp->PIO_cap;
|
||||
|
||||
/* TODO: check if sc_ports->mode_ok */
|
||||
|
||||
#ifdef EFA_DEBUG
|
||||
aprint_normal_dev(sc->sc_dev, "drive %d supports %d\n",
|
||||
drive, drvp->PIO_cap);
|
||||
#endif /* EFA_DEBUG */
|
||||
|
||||
drvp->PIO_mode = mode;
|
||||
}
|
||||
|
||||
/* Change FastATA register set. */
|
||||
efa_select_regset(sc, chnum, mode);
|
||||
/* re-init shadow regs */
|
||||
wdc_init_shadow_regs(&sc->sc_ports[chnum].chan);
|
||||
|
||||
splx(ipl);
|
||||
}
|
||||
|
||||
static void
|
||||
efa_select_regset(struct efa_softc *sc, int chnum, uint8_t piomode)
|
||||
{
|
||||
struct wdc_softc *wdc;
|
||||
|
||||
wdc = CHAN_TO_WDC(&sc->sc_ports[chnum].chan);
|
||||
wdc->regs[chnum] = sc->sc_ports[chnum].wdr[piomode];
|
||||
|
||||
#ifdef EFA_DEBUG
|
||||
aprint_normal_dev(sc->sc_dev, "switched ch %d to PIO %d\n",
|
||||
chnum, piomode);
|
||||
|
||||
efa_debug_print_regmapping(&wdc->regs[chnum]);
|
||||
#endif /* EFA_DEBUG */
|
||||
}
|
||||
|
||||
#ifdef EFA_DEBUG
|
||||
static void
|
||||
efa_debug_print_regmapping(struct wdc_regs *wdr_fata)
|
||||
{
|
||||
int i;
|
||||
aprint_normal("base %x->%x",
|
||||
(bus_addr_t) kvtop((void*) wdr_fata->cmd_baseioh),
|
||||
(bus_addr_t) wdr_fata->cmd_baseioh);
|
||||
for (i = 0; i < WDC_NREG; i++) {
|
||||
aprint_normal("reg %x, %x->%x, ", i,
|
||||
(bus_addr_t) kvtop((void*) wdr_fata->cmd_iohs[i]),
|
||||
(bus_addr_t) wdr_fata->cmd_iohs[i]);
|
||||
}
|
||||
aprint_normal("\n");
|
||||
}
|
||||
#endif /* EFA_DEBUG */
|
||||
|
||||
|
|
@ -0,0 +1,74 @@
|
|||
/* $NetBSD: efareg.h,v 1.1 2011/10/27 22:12:23 rkujawa Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2011 The NetBSD Foundation, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This code is derived from software contributed to The NetBSD Foundation
|
||||
* by Radoslaw Kujawa.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _AMIGA_EFAREG_H_
|
||||
|
||||
#define GAYLE_IDE_BASE 0xDA0000
|
||||
#define FATA1_BASE 0xDA2000
|
||||
|
||||
/* Offsets. Stride of 4 is used, so multiply any offset by 4. */
|
||||
#define FATA1_PIO0_OFF 0x0 // XXX 0
|
||||
#define FATA1_PIO3_OFF 0x4000
|
||||
#define FATA1_PIO4_OFF 0x5000
|
||||
#define FATA1_PIO5_OFF 0x4800
|
||||
|
||||
#define FATA1_CHAN_SIZE 0x400
|
||||
#define FATA1_REGS_SIZE 0x4BC0
|
||||
|
||||
/* PIO0 */
|
||||
#define FATA1_PIO0_OFF_DATA 0x0
|
||||
#define FATA1_PIO0_OFF_ERROR 0x1
|
||||
#define FATA1_PIO0_OFF_SECCNT 0x2
|
||||
#define FATA1_PIO0_OFF_SECTOR 0x3
|
||||
#define FATA1_PIO0_OFF_CYL_LO 0x4
|
||||
#define FATA1_PIO0_OFF_CYL_HI 0x5
|
||||
#define FATA1_PIO0_OFF_SDH 0x6
|
||||
#define FATA1_PIO0_OFF_COMMAND 0x7
|
||||
|
||||
/* PIO3-5 */
|
||||
#define FATA1_PION_OFF_DATA 0x82 /* 16-bit data port */
|
||||
#define FATA1_PION_OFF_DATA32 0x0 /* 32-bit data port, 2 cycles to HD */
|
||||
#define FATA1_PION_OFF_ERROR 0x80
|
||||
#define FATA1_PION_OFF_SECCNT 0x100
|
||||
#define FATA1_PION_OFF_SECTOR 0x180
|
||||
#define FATA1_PION_OFF_CYL_LO 0x200
|
||||
#define FATA1_PION_OFF_CYL_HI 0x280
|
||||
#define FATA1_PION_OFF_SDH 0x300
|
||||
#define FATA1_PION_OFF_COMMAND 0x380
|
||||
|
||||
#define FATA1_PION_OFF_INTST 0x140 /* FastATA interrupt status */
|
||||
|
||||
#define FATA1_INT_ANY 0x80
|
||||
#define FATA1_INT_DRIVE0 0x40
|
||||
#define FATA1_INT_DRIVE1 0x20
|
||||
|
||||
#endif /* _AMIGA_EFAREG_H_ */
|
||||
|
||||
|
|
@ -0,0 +1,70 @@
|
|||
/* $NetBSD: efavar.h,v 1.1 2011/10/27 22:12:23 rkujawa Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2011 The NetBSD Foundation, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This code is derived from software contributed to The NetBSD Foundation
|
||||
* by Radoslaw Kujawa.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <dev/ata/atavar.h>
|
||||
#include <dev/ic/wdcvar.h>
|
||||
|
||||
#define FATA1_CHANNELS 2
|
||||
#define PIO_COUNT 6
|
||||
|
||||
struct efa_port {
|
||||
|
||||
struct ata_channel chan;
|
||||
struct ata_queue queue;
|
||||
|
||||
uint8_t mode; /* currently set mode */
|
||||
|
||||
struct wdc_regs wdr[6]; /* PIO0-5 */
|
||||
bus_space_handle_t intst[6]; /* interrupt status register */
|
||||
bool mode_ok[6]; /* is this PIO mode usable? */
|
||||
};
|
||||
|
||||
struct efa_softc {
|
||||
device_t sc_dev;
|
||||
|
||||
struct wdc_softc sc_wdcdev;
|
||||
struct ata_channel *sc_chanlist[FATA1_CHANNELS];
|
||||
|
||||
struct efa_port sc_ports[FATA1_CHANNELS];
|
||||
|
||||
/* Force 32-bit data port, otherwise always use 16-bit */
|
||||
bool sc_32bit_io;
|
||||
/* Disable hw interrupt support (for FastATA 1200 older than Mk-III) */
|
||||
bool sc_no_intr;
|
||||
|
||||
struct isr sc_isr;
|
||||
volatile u_char *sc_intreg;
|
||||
|
||||
void *sc_fata_softintr;
|
||||
|
||||
struct wdc_regs sc_gayle_wdc_regs;
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue