Optimize user-side TLB invalidation when !defined(M68020).
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@ -1,4 +1,4 @@
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/* $NetBSD: locore.s,v 1.59 1996/03/12 23:46:32 scottr Exp $ */
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/* $NetBSD: locore.s,v 1.60 1996/03/14 05:50:06 scottr Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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@ -1456,8 +1456,10 @@ __TBIA:
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Lmotommu3:
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#endif
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pflusha
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#if defined(M68020)
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tstl _mmutype
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jgt Ltbia851
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#endif
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movl #DC_CLEAR,d0
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movc d0,cacr | invalidate on-chip d-cache
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Ltbia851:
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@ -1539,15 +1541,17 @@ ENTRY(TBIAU)
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.word 0xf518 | yes, pflusha (for now) XXX
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Lmotommu6:
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#endif
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#if defined(M68020)
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tstl _mmutype
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jgt Ltbiau851
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jle Ltbiau851
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pflush #0,#4 | flush user TLB entries
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rts
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Ltbiau851:
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#endif
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pflush #0,#4 | flush user TLB entries
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movl #DC_CLEAR,d0
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movc d0,cacr | invalidate on-chip d-cache
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rts
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Ltbiau851:
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pflush #0,#4 | flush user TLB entries
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rts
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/*
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* Invalidate instruction cache
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