Major rework to support Qlogic ISP2100 (Fibre Channel PCI card). Also now
able to read SXP registers (instead of panicing). Probably have done a bit of setup overkill- we now alloc some scratch memory for the 2100 that I thought I would need for the Port database, but so far I haven't needed to retrieve the port database. Well, early days yet.
This commit is contained in:
mjacob
parent
9de423f255
commit
24add65376
@ -1,4 +1,4 @@
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/* $NetBSD: isp_pci.c,v 1.14 1997/06/08 22:15:34 thorpej Exp $ */
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/* $NetBSD: isp_pci.c,v 1.15 1997/08/16 00:28:10 mjacob Exp $ */
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/*
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* PCI specific probe and attach routines for Qlogic ISP SCSI adapters.
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@ -61,6 +61,7 @@ static void isp_pci_dmateardown __P((struct ispsoftc *, struct scsi_xfer *,
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u_int32_t));
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static void isp_pci_reset1 __P((struct ispsoftc *));
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static void isp_pci_dumpregs __P((struct ispsoftc *));
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static struct ispmdvec mdvec = {
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isp_pci_rd_reg,
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@ -70,16 +71,41 @@ static struct ispmdvec mdvec = {
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isp_pci_dmateardown,
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NULL,
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isp_pci_reset1,
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isp_pci_dumpregs,
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ISP_RISC_CODE,
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ISP_CODE_LENGTH,
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ISP_CODE_ORG,
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BIU_PCI_CONF1_FIFO_16 | BIU_BURST_ENABLE,
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ISP_CODE_VERSION,
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BIU_PCI_CONF1_FIFO_64 | BIU_BURST_ENABLE,
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60 /* MAGIC- all known PCI card implementations are 60MHz */
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};
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static struct ispmdvec mdvec_2100 = {
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isp_pci_rd_reg,
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isp_pci_wr_reg,
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isp_pci_mbxdma,
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isp_pci_dmasetup,
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isp_pci_dmateardown,
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NULL,
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isp_pci_reset1,
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isp_pci_dumpregs,
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ISP2100_RISC_CODE,
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ISP2100_CODE_LENGTH,
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ISP2100_CODE_ORG,
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ISP2100_CODE_VERSION,
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BIU_PCI_CONF1_FIFO_64 | BIU_BURST_ENABLE,
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60 /* MAGIC- all known PCI card implementations are 60MHz */
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};
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#define PCI_QLOGIC_ISP \
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((PCI_PRODUCT_QLOGIC_ISP1020 << 16) | PCI_VENDOR_QLOGIC)
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#ifndef PCI_PRODUCT_QLOGIC_ISP2100
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#define PCI_PRODUCT_QLOGIC_ISP2100 0x2100
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#endif
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#define PCI_QLOGIC_ISP2100 \
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((PCI_PRODUCT_QLOGIC_ISP2100 << 16) | PCI_VENDOR_QLOGIC)
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#define IO_MAP_REG 0x10
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#define MEM_MAP_REG 0x14
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@ -93,12 +119,15 @@ static void isp_pci_attach __P((struct device *, struct device *, void *));
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struct isp_pcisoftc {
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struct ispsoftc pci_isp;
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pci_chipset_tag_t pci_pc;
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pcitag_t pci_tag;
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bus_space_tag_t pci_st;
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bus_space_handle_t pci_sh;
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bus_dma_tag_t pci_dmat;
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bus_dmamap_t pci_scratch_dmap; /* for fcp only */
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bus_dmamap_t pci_rquest_dmap;
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bus_dmamap_t pci_result_dmap;
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bus_dmamap_t pci_xfer_dmap[RQUEST_QUEUE_LEN];
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bus_dmamap_t pci_xfer_dmap[MAXISPREQUEST];
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void * pci_ih;
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};
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@ -118,7 +147,8 @@ isp_pci_probe(parent, match, aux)
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{
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struct pci_attach_args *pa = aux;
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if (pa->pa_id == PCI_QLOGIC_ISP) {
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if (pa->pa_id == PCI_QLOGIC_ISP ||
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pa->pa_id == PCI_QLOGIC_ISP2100) {
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return (1);
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} else {
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return (0);
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@ -137,8 +167,7 @@ isp_pci_attach(parent, self, aux)
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bus_space_handle_t sh, ioh, memh;
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pci_intr_handle_t ih;
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const char *intrstr;
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int ioh_valid, memh_valid;
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int i;
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int ioh_valid, memh_valid, i;
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ioh_valid = (pci_mapreg_map(pa, IO_MAP_REG,
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PCI_MAPREG_TYPE_IO, 0,
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@ -162,14 +191,80 @@ isp_pci_attach(parent, self, aux)
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pcs->pci_st = st;
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pcs->pci_sh = sh;
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pcs->pci_dmat = pa->pa_dmat;
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pcs->pci_isp.isp_mdvec = &mdvec;
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pcs->pci_pc = pa->pa_pc;
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pcs->pci_tag = pa->pa_tag;
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if (pa->pa_id == PCI_QLOGIC_ISP) {
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pcs->pci_isp.isp_mdvec = &mdvec;
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pcs->pci_isp.isp_type = ISP_HA_SCSI_UNKNOWN;
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pcs->pci_isp.isp_param =
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malloc(sizeof (sdparam), M_DEVBUF, M_NOWAIT);
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if (pcs->pci_isp.isp_param == NULL) {
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printf("%s: couldn't allocate sdparam table\n",
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pcs->pci_isp.isp_name);
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}
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bzero(pcs->pci_isp.isp_param, sizeof (sdparam));
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} else if (pa->pa_id == PCI_QLOGIC_ISP2100) {
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u_int32_t data;
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pcs->pci_isp.isp_mdvec = &mdvec_2100;
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if (ioh_valid == 0) {
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printf("%s: warning, ISP2100 cannot use I/O Space"
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" Mappings\n", pcs->pci_isp.isp_name);
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} else {
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pcs->pci_st = iot;
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pcs->pci_sh = ioh;
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}
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#if 0
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printf("%s: PCIREGS cmd=%x bhlc=%x\n", pcs->pci_isp.isp_name,
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pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG),
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pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG));
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#endif
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pcs->pci_isp.isp_type = ISP_HA_FC_2100;
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pcs->pci_isp.isp_param =
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malloc(sizeof (fcparam), M_DEVBUF, M_NOWAIT);
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if (pcs->pci_isp.isp_param == NULL) {
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printf("%s: couldn't allocate fcparam table\n",
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pcs->pci_isp.isp_name);
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}
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bzero(pcs->pci_isp.isp_param, sizeof (fcparam));
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data = pci_conf_read(pa->pa_pc, pa->pa_tag,
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PCI_COMMAND_STATUS_REG);
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data |= PCI_COMMAND_MASTER_ENABLE |
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PCI_COMMAND_INVALIDATE_ENABLE;
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pci_conf_write(pa->pa_pc, pa->pa_tag,
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PCI_COMMAND_STATUS_REG, data);
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/*
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* Wierd- we need to clear the lsb in offset 0x30 to take the
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* chip out of reset state.
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*/
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data = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x30);
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data &= ~1;
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pci_conf_write(pa->pa_pc, pa->pa_tag, 0x30, data);
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#if 0
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/*
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* XXX: Need to get the actual revision number of the 2100 FB
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*/
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data = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
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data &= ~0xffff;
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data |= 0xf801;
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pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG, data);
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printf("%s: setting latency to %x and cache line size to %x\n",
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pcs->pci_isp.isp_name, (data >> 8) & 0xff,
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data & 0xff);
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#endif
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} else {
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return;
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}
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isp_reset(&pcs->pci_isp);
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if (pcs->pci_isp.isp_state != ISP_RESETSTATE) {
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free(pcs->pci_isp.isp_param, M_DEVBUF);
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return;
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}
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isp_init(&pcs->pci_isp);
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if (pcs->pci_isp.isp_state != ISP_INITSTATE) {
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isp_uninit(&pcs->pci_isp);
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free(pcs->pci_isp.isp_param, M_DEVBUF);
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return;
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}
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@ -177,6 +272,7 @@ isp_pci_attach(parent, self, aux)
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pa->pa_intrline, &ih)) {
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printf("%s: couldn't map interrupt\n", pcs->pci_isp.isp_name);
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isp_uninit(&pcs->pci_isp);
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free(pcs->pci_isp.isp_param, M_DEVBUF);
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return;
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}
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@ -189,6 +285,7 @@ isp_pci_attach(parent, self, aux)
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printf("%s: couldn't establish interrupt at %s\n",
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pcs->pci_isp.isp_name, intrstr);
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isp_uninit(&pcs->pci_isp);
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free(pcs->pci_isp.isp_param, M_DEVBUF);
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return;
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}
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printf("%s: interrupting at %s\n", pcs->pci_isp.isp_name, intrstr);
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@ -196,7 +293,7 @@ isp_pci_attach(parent, self, aux)
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/*
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* Create the DMA maps for the data transfers.
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*/
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for (i = 0; i < RQUEST_QUEUE_LEN; i++) {
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for (i = 0; i < RQUEST_QUEUE_LEN(&pcs->pci_isp); i++) {
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if (bus_dmamap_create(pcs->pci_dmat, MAXPHYS,
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(MAXPHYS / NBPG) + 1, MAXPHYS, 0, BUS_DMA_NOWAIT,
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&pcs->pci_xfer_dmap[i])) {
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@ -206,44 +303,51 @@ isp_pci_attach(parent, self, aux)
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return;
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}
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}
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/*
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* Do Generic attach now.
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*/
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isp_attach(&pcs->pci_isp);
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if (pcs->pci_isp.isp_state != ISP_RUNSTATE) {
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isp_uninit(&pcs->pci_isp);
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free(pcs->pci_isp.isp_param, M_DEVBUF);
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}
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}
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#define PCI_BIU_REGS_OFF 0x00
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#define PCI_MBOX_REGS_OFF 0x70
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#define PCI_SXP_REGS_OFF 0x80
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#define PCI_RISC_REGS_OFF 0x80
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#define PCI_BIU_REGS_OFF BIU_REGS_OFF
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static u_int16_t
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isp_pci_rd_reg(isp, regoff)
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struct ispsoftc *isp;
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int regoff;
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{
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u_int16_t rv;
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struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
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int offset;
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int offset, oldsxp = 0;
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if ((regoff & BIU_BLOCK) != 0) {
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offset = PCI_BIU_REGS_OFF;
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} else if ((regoff & MBOX_BLOCK) != 0) {
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offset = PCI_MBOX_REGS_OFF;
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if (isp->isp_type & ISP_HA_SCSI)
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offset = PCI_MBOX_REGS_OFF;
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else
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offset = PCI_MBOX_REGS2100_OFF;
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} else if ((regoff & SXP_BLOCK) != 0) {
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offset = PCI_SXP_REGS_OFF;
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/*
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* XXX
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* We will assume that someone has paused the RISC processor.
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*/
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panic("SXP Registers not accessible yet!");
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oldsxp = isp_pci_rd_reg(isp, BIU_CONF1);
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isp_pci_wr_reg(isp, BIU_CONF1, oldsxp & ~BIU_PCI_CONF1_SXP);
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} else {
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offset = PCI_RISC_REGS_OFF;
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}
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regoff &= 0xff;
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offset += regoff;
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return bus_space_read_2(pcs->pci_st, pcs->pci_sh, offset);
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rv = bus_space_read_2(pcs->pci_st, pcs->pci_sh, offset);
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if ((regoff & SXP_BLOCK) != 0) {
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isp_pci_wr_reg(isp, BIU_CONF1, oldsxp);
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}
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return (rv);
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}
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static void
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@ -253,23 +357,30 @@ isp_pci_wr_reg(isp, regoff, val)
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u_int16_t val;
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{
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struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) isp;
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int offset;
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int offset, oldsxp = 0;
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if ((regoff & BIU_BLOCK) != 0) {
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offset = PCI_BIU_REGS_OFF;
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} else if ((regoff & MBOX_BLOCK) != 0) {
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offset = PCI_MBOX_REGS_OFF;
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if (isp->isp_type & ISP_HA_SCSI)
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offset = PCI_MBOX_REGS_OFF;
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else
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offset = PCI_MBOX_REGS2100_OFF;
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} else if ((regoff & SXP_BLOCK) != 0) {
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offset = PCI_SXP_REGS_OFF;
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/*
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* XXX
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* We will assume that someone has paused the RISC processor.
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*/
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panic("SXP Registers not accessible yet!");
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oldsxp = isp_pci_rd_reg(isp, BIU_CONF1);
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isp_pci_wr_reg(isp, BIU_CONF1, oldsxp & ~BIU_PCI_CONF1_SXP);
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} else {
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offset = PCI_RISC_REGS_OFF;
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}
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regoff &= 0xff;
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offset += regoff;
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bus_space_write_2(pcs->pci_st, pcs->pci_sh, offset, val);
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if ((regoff & SXP_BLOCK) != 0) {
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isp_pci_wr_reg(isp, BIU_CONF1, oldsxp);
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}
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}
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static int
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@ -279,12 +390,13 @@ isp_pci_mbxdma(isp)
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struct isp_pcisoftc *pci = (struct isp_pcisoftc *)isp;
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bus_dma_segment_t seg;
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bus_size_t len;
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fcparam *fcp;
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int rseg;
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/*
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* Allocate and map the request queue.
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*/
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len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN);
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len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp));
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if (bus_dmamem_alloc(pci->pci_dmat, len, NBPG, 0, &seg, 1, &rseg,
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BUS_DMA_NOWAIT) ||
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bus_dmamem_map(pci->pci_dmat, &seg, rseg, len,
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@ -301,7 +413,7 @@ isp_pci_mbxdma(isp)
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/*
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* Allocate and map the result queue.
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*/
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len = ISP_QUEUE_SIZE(RESULT_QUEUE_LEN);
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len = ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp));
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if (bus_dmamem_alloc(pci->pci_dmat, len, NBPG, 0, &seg, 1, &rseg,
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BUS_DMA_NOWAIT) ||
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bus_dmamem_map(pci->pci_dmat, &seg, rseg, len,
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@ -312,9 +424,25 @@ isp_pci_mbxdma(isp)
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bus_dmamap_load(pci->pci_dmat, pci->pci_result_dmap,
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(caddr_t)isp->isp_result, len, NULL, BUS_DMA_NOWAIT))
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return (1);
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isp->isp_result_dma = pci->pci_result_dmap->dm_segs[0].ds_addr;
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if (isp->isp_type & ISP_HA_SCSI) {
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return (0);
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}
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fcp = isp->isp_param;
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len = ISP2100_SCRLEN;
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if (bus_dmamem_alloc(pci->pci_dmat, len, NBPG, 0, &seg, 1, &rseg,
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BUS_DMA_NOWAIT) ||
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bus_dmamem_map(pci->pci_dmat, &seg, rseg, len,
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(caddr_t *)&fcp->isp_scratch, BUS_DMA_NOWAIT|BUS_DMAMEM_NOSYNC))
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return (1);
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if (bus_dmamap_create(pci->pci_dmat, len, 1, len, 0, BUS_DMA_NOWAIT,
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&pci->pci_scratch_dmap) ||
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bus_dmamap_load(pci->pci_dmat, pci->pci_scratch_dmap,
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(caddr_t)fcp->isp_scratch, len, NULL, BUS_DMA_NOWAIT))
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return (1);
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fcp->isp_scdma = pci->pci_scratch_dmap->dm_segs[0].ds_addr;
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return (0);
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}
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@ -327,17 +455,17 @@ isp_pci_dmasetup(isp, xs, rq, iptrp, optr)
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u_int8_t optr;
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{
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struct isp_pcisoftc *pci = (struct isp_pcisoftc *)isp;
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bus_dmamap_t dmap = pci->pci_xfer_dmap[rq->req_handle];
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bus_dmamap_t dmap = pci->pci_xfer_dmap[rq->req_handle - 1];
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ispcontreq_t *crq;
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int segcnt, seg, error, ovseg;
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int segcnt, seg, error, ovseg, seglim;
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if (xs->datalen == 0) {
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rq->req_seg_count = 1;
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rq->req_flags |= REQFLAG_DATA_IN;
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return (0);
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}
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if (rq->req_handle >= RQUEST_QUEUE_LEN) {
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if (rq->req_handle > RQUEST_QUEUE_LEN(isp) ||
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rq->req_handle < 1) {
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panic("%s: bad handle (%d) in isp_pci_dmasetup\n",
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isp->isp_name, rq->req_handle);
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/* NOTREACHED */
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@ -349,6 +477,12 @@ isp_pci_dmasetup(isp, xs, rq, iptrp, optr)
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rq->req_flags |= REQFLAG_DATA_OUT;
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}
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if (isp->isp_type & ISP_HA_FC) {
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seglim = ISP_RQDSEG_T2;
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((ispreqt2_t *)rq)->req_totalcnt = xs->datalen;
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} else {
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seglim = ISP_RQDSEG;
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}
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error = bus_dmamap_load(pci->pci_dmat, dmap, xs->data, xs->datalen,
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NULL, xs->flags & SCSI_NOSLEEP ? BUS_DMA_NOWAIT : BUS_DMA_WAITOK);
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if (error)
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@ -357,21 +491,29 @@ isp_pci_dmasetup(isp, xs, rq, iptrp, optr)
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segcnt = dmap->dm_nsegs;
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for (seg = 0, rq->req_seg_count = 0;
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seg < segcnt && rq->req_seg_count < ISP_RQDSEG;
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seg++, rq->req_seg_count++) {
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rq->req_dataseg[rq->req_seg_count].ds_count =
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dmap->dm_segs[seg].ds_len;
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rq->req_dataseg[rq->req_seg_count].ds_base =
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dmap->dm_segs[seg].ds_addr;
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seg < segcnt && rq->req_seg_count < seglim;
|
||||
seg++, rq->req_seg_count++) {
|
||||
if (isp->isp_type & ISP_HA_FC) {
|
||||
ispreqt2_t *rq2 = (ispreqt2_t *)rq;
|
||||
rq2->req_dataseg[rq2->req_seg_count].ds_count =
|
||||
dmap->dm_segs[seg].ds_len;
|
||||
rq2->req_dataseg[rq2->req_seg_count].ds_base =
|
||||
dmap->dm_segs[seg].ds_addr;
|
||||
} else {
|
||||
rq->req_dataseg[rq->req_seg_count].ds_count =
|
||||
dmap->dm_segs[seg].ds_len;
|
||||
rq->req_dataseg[rq->req_seg_count].ds_base =
|
||||
dmap->dm_segs[seg].ds_addr;
|
||||
}
|
||||
}
|
||||
|
||||
if (seg == segcnt)
|
||||
goto mapsync;
|
||||
|
||||
do {
|
||||
crq = (ispcontreq_t *) ISP_QUEUE_ENTRY(isp->isp_rquest,
|
||||
*iptrp);
|
||||
*iptrp = (*iptrp + 1) & (RQUEST_QUEUE_LEN - 1);
|
||||
crq = (ispcontreq_t *)
|
||||
ISP_QUEUE_ENTRY(isp->isp_rquest, *iptrp);
|
||||
*iptrp = (*iptrp + 1) & (RQUEST_QUEUE_LEN(isp) - 1);
|
||||
if (*iptrp == optr) {
|
||||
printf("%s: Request Queue Overflow++\n",
|
||||
isp->isp_name);
|
||||
@ -392,7 +534,7 @@ isp_pci_dmasetup(isp, xs, rq, iptrp, optr)
|
||||
}
|
||||
} while (seg < segcnt);
|
||||
|
||||
mapsync:
|
||||
mapsync:
|
||||
bus_dmamap_sync(pci->pci_dmat, dmap, xs->flags & SCSI_DATA_IN ?
|
||||
BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
|
||||
return (0);
|
||||
@ -409,7 +551,6 @@ isp_pci_dmateardown(isp, xs, handle)
|
||||
|
||||
bus_dmamap_sync(pci->pci_dmat, dmap, xs->flags & SCSI_DATA_IN ?
|
||||
BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
|
||||
|
||||
bus_dmamap_unload(pci->pci_dmat, dmap);
|
||||
}
|
||||
|
||||
@ -420,3 +561,12 @@ isp_pci_reset1(isp)
|
||||
/* Make sure the BIOS is disabled */
|
||||
isp_pci_wr_reg(isp, HCCR, PCI_HCCR_CMD_BIOS);
|
||||
}
|
||||
|
||||
static void
|
||||
isp_pci_dumpregs(isp)
|
||||
struct ispsoftc *isp;
|
||||
{
|
||||
struct isp_pcisoftc *pci = (struct isp_pcisoftc *)isp;
|
||||
printf("%s: PCI Status Command/Status=%x\n", pci->pci_isp.isp_name,
|
||||
pci_conf_read(pci->pci_pc, pci->pci_tag, PCI_COMMAND_STATUS_REG));
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user