bus_dmamap_sync() is required for ICT table read/write.
Tested by arm platform.
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@ -1,4 +1,4 @@
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/* $NetBSD: if_iwn.c,v 1.79 2016/08/03 19:56:41 mlelstv Exp $ */
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/* $NetBSD: if_iwn.c,v 1.80 2016/11/24 12:32:47 hkenken Exp $ */
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/* $OpenBSD: if_iwn.c,v 1.135 2014/09/10 07:22:09 dcoppa Exp $ */
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/*-
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@ -22,7 +22,7 @@
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* adapters.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_iwn.c,v 1.79 2016/08/03 19:56:41 mlelstv Exp $");
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__KERNEL_RCSID(0, "$NetBSD: if_iwn.c,v 1.80 2016/11/24 12:32:47 hkenken Exp $");
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#define IWN_USE_RBUF /* Use local storage for RX */
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#undef IWN_HWCRYPTO /* XXX does not even compile yet */
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@ -2642,12 +2642,16 @@ iwn_intr(void *arg)
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/* Read interrupts from ICT (fast) or from registers (slow). */
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if (sc->sc_flags & IWN_FLAG_USE_ICT) {
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bus_dmamap_sync(sc->sc_dmat, sc->ict_dma.map, 0,
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IWN_ICT_SIZE, BUS_DMASYNC_POSTREAD);
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tmp = 0;
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while (sc->ict[sc->ict_cur] != 0) {
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tmp |= sc->ict[sc->ict_cur];
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sc->ict[sc->ict_cur] = 0; /* Acknowledge. */
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sc->ict_cur = (sc->ict_cur + 1) % IWN_ICT_COUNT;
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}
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bus_dmamap_sync(sc->sc_dmat, sc->ict_dma.map, 0,
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IWN_ICT_SIZE, BUS_DMASYNC_PREWRITE);
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tmp = le32toh(tmp);
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if (tmp == 0xffffffff) /* Shouldn't happen. */
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tmp = 0;
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