More work on Tseng support. Now both my et6000 _and_ the et6100 work. I just
whish that programming MDRAM latency values came out of the BlackMagic(tm) domain :-(
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@ -1,4 +1,4 @@
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/* $NetBSD: grfabs_et.c,v 1.11 1998/12/20 14:32:53 thomas Exp $ */
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/* $NetBSD: grfabs_et.c,v 1.12 1999/02/19 21:03:00 leo Exp $ */
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/*
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* Copyright (c) 1996 Leo Weppelman.
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@ -752,17 +752,19 @@ et6000_init()
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int i;
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u_char dac_tab[] = { 0x7d,0x67, 0x5d,0x64, 0x56,0x63,
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0x28,0x22, 0x79,0x49, 0x6f,0x47,
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0x28,0x41, 0x6b,0x44, 0xfe,0xff,
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0x00,0x00, 0x3d,0x23, 0x79,0x2e,
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0xa8,0x00, 0x00,0x84 };
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0x28,0x41, 0x6b,0x44, 0x00,0x00,
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0x00,0x00, 0x5d,0x25, 0x00,0x00,
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0x00,0x00, 0x00,0x96 };
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ba = et_priv.regkva + PCI_IOBASE;
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ba[0x40] = 0x00; /* Use standard vga addressing */
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ba[0x40] = 0x06; /* Use standard vga addressing */
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ba[0x41] = 0x2a; /* Performance control */
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ba[0x43] = 0x02; /* XCLK/SCLK config */
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ba[0x44] = 0x11; /* RAS/CAS config */
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ba[0x46] = 0x00; /* CRT display feature */
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ba[0x47] = 0x10;
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ba[0x58] = 0x00; /* Video Control 1 */
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ba[0x59] = 0x04; /* Video Control 2 */
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@ -771,8 +773,26 @@ et6000_init()
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*/
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ba[0x42] = 0x00; /* MCLK == CLK0 */
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ba[0x67] = 0x00; /* Start filling from dac-reg 0 and up... */
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for (i = 0; i < 0x0b; i++)
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for (i = 0; i < 0x16; i++)
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ba[0x69] = dac_tab[i];
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if (ba[8] == 0x70) { /* et6100, right? */
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volatile u_char *ma;
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u_char bv;
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ma = et_priv.memkva;
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/*
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* XXX Black magic to get the bloody MDRAM's to function...
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* XXX _Only_ tested on my card! [leo]
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*/
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bv = ba[45];
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ba[0x45] = bv | 0x40; /* Reset MDRAM's */
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ba[0x45] = bv | 0x70; /* Program latency value */
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ma[0x0] = 0; /* Yeah, right :-( */
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ba[0x45] = bv; /* Back to normal */
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ba[0x44] = 0x14; /* RAS/CAS config */
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}
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}
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void
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@ -830,8 +850,10 @@ et_sv_reg_t *et_regs;
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/*
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* General VGA registers
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*/
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for(i = 0; i < 5; i++)
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WSeq(ba, SEQ_ID_RESET, 0x01);
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for(i = 1; i < 5; i++)
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WSeq(ba, i, et_regs->seq[i]);
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WSeq(ba, SEQ_ID_RESET, 0x03);
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/*
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* Make sure we're allowed to write all crt-registers
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