Rework register usage in cpu_switchto so curcpu() is preserved across
ras_lookup. Only set vfp & tpid registers and do ras lookups if new lwp is not LW_SYSTEM. (tested on RPI and atf tests on BPI by skrll).
This commit is contained in:
matt
parent
3375ad1fb5
commit
236e90d4f2
@ -1,4 +1,4 @@
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/* $NetBSD: cpuswitch.S,v 1.87 2015/03/22 23:46:08 matt Exp $ */
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/* $NetBSD: cpuswitch.S,v 1.88 2015/03/24 07:16:16 matt Exp $ */
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/*
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* Copyright 2003 Wasabi Systems, Inc.
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@ -87,7 +87,7 @@
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#include <arm/asm.h>
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#include <arm/locore.h>
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RCSID("$NetBSD: cpuswitch.S,v 1.87 2015/03/22 23:46:08 matt Exp $")
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RCSID("$NetBSD: cpuswitch.S,v 1.88 2015/03/24 07:16:16 matt Exp $")
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/* LINTSTUB: include <sys/param.h> */
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@ -137,18 +137,18 @@ ENTRY(cpu_switchto)
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mov r4, r0
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#ifdef TPIDRPRW_IS_CURCPU
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GET_CURCPU(r3)
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GET_CURCPU(r5)
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#elif defined(TPIDRPRW_IS_CURLWP)
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mrc p15, 0, r0, c13, c0, 4 /* get old lwp (r4 maybe 0) */
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ldr r3, [r0, #(L_CPU)] /* get cpu from old lwp */
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ldr r5, [r0, #(L_CPU)] /* get cpu from old lwp */
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#elif !defined(MULTIPROCESSOR)
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ldr r3, [r6, #L_CPU] /* get cpu from new lwp */
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ldr r5, [r6, #L_CPU] /* get cpu from new lwp */
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#else
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#error curcpu() method not defined
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#endif
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/* rem: r3 = curcpu() */
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/* rem: r4 = old lwp */
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/* rem: r5 = curcpu() */
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/* rem: r6 = new lwp */
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#ifndef __HAVE_UNNESTED_INTRS
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@ -156,7 +156,7 @@ ENTRY(cpu_switchto)
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#endif
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#ifdef MULTIPROCESSOR
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str r3, [r6, #(L_CPU)]
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str r5, [r6, #(L_CPU)]
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#else
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/* l->l_cpu initialized in fork1() for single-processor */
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#endif
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@ -165,20 +165,16 @@ ENTRY(cpu_switchto)
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mcr p15, 0, r6, c13, c0, 4 /* set current lwp */
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#endif
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/* We have a new curlwp now so make a note it */
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str r6, [r3, #(CI_CURLWP)]
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/* Get the new pcb */
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ldr r7, [r6, #(L_PCB)]
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str r6, [r5, #(CI_CURLWP)]
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/* At this point we can allow IRQ's again. */
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#ifndef __HAVE_UNNESTED_INTRS
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IRQenable
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#endif
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/* rem: r3 = curcpu() */
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/* rem: r4 = old lwp */
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/* rem: r5 = curcpu() */
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/* rem: r6 = new lwp */
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/* rem: r7 = new pcb */
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/* rem: interrupts are enabled */
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/*
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@ -190,24 +186,23 @@ ENTRY(cpu_switchto)
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teq r4, #0
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beq .Ldo_switch
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/* rem: r3 = curcpu() */
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/* rem: r4 = old lwp */
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/* rem: r5 = curcpu() */
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/* rem: r6 = new lwp */
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/* rem: r7 = new pcb */
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/* rem: interrupts are enabled */
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/* Save old context */
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/* Get the user structure for the old lwp. */
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ldr r5, [r4, #(L_PCB)]
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ldr r7, [r4, #(L_PCB)]
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/* Save all the registers in the old lwp's pcb */
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#if defined(_ARM_ARCH_DWORD_OK)
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strd r8, r9, [r5, #(PCB_R8)]
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strd r10, r11, [r5, #(PCB_R10)]
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strd r12, r13, [r5, #(PCB_R12)]
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strd r8, r9, [r7, #(PCB_R8)]
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strd r10, r11, [r7, #(PCB_R10)]
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strd r12, r13, [r7, #(PCB_R12)]
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#else
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add r0, r5, #(PCB_R8)
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add r0, r7, #(PCB_R8)
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stmia r0, {r8-r13}
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#endif
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@ -216,29 +211,38 @@ ENTRY(cpu_switchto)
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* Save user read/write thread/process id register
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*/
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mrc p15, 0, r0, c13, c0, 2
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str r0, [r5, #(PCB_USER_PID_RW)]
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str r0, [r7, #(PCB_USER_PID_RW)]
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#endif
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/*
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* NOTE: We can now use r8-r13 until it is time to restore
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* them for the new process.
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*/
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/* rem: r3 = curcpu() */
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/* rem: r4 = old lwp */
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/* rem: r5 = old pcb */
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/* rem: r5 = curcpu() */
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/* rem: r6 = new lwp */
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/* rem: r7 = new pcb */
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/* rem: interrupts are enabled */
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/* Restore saved context */
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.Ldo_switch:
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/* rem: r3 = curcpu() */
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/* Get the new pcb */
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ldr r7, [r6, #(L_PCB)]
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/* rem: r4 = old lwp */
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/* rem: r5 = curcpu() */
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/* rem: r6 = new lwp */
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/* rem: r7 = new pcb */
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/* rem: interrupts are enabled */
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/*
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* If we are switching to a system lwp, don't bother restoring
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* thread or vfp registers and skip the ras check.
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*/
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ldr r0, [r6, #(L_FLAG)]
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tst r0, #(LW_SYSTEM)
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bne .Lswitch_do_restore
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#ifdef _ARM_ARCH_6
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/*
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* Restore user thread/process id registers
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@ -253,14 +257,34 @@ ENTRY(cpu_switchto)
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/*
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* If we have a VFP, we need to load FPEXC.
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*/
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ldr r0, [r3, #(CI_VFP_ID)]
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ldr r0, [r5, #(CI_VFP_ID)]
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cmp r0, #0
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ldrne r0, [r7, #(PCB_VFP_FPEXC)]
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vmsrne fpexc, r0
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#endif
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ldr r5, [r6, #(L_PROC)] /* fetch the proc for below */
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/*
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* Check for restartable atomic sequences (RAS).
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*/
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ldr r0, [r6, #(L_PROC)] /* fetch the proc for ras_lookup */
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ldr r2, [r0, #(P_RASLIST)]
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cmp r2, #0 /* p->p_nras == 0? */
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beq .Lswitch_do_restore
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/* we can use r8 since we haven't restored saved registers yet. */
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ldr r8, [r6, #(L_MD_TF)] /* r1 = trapframe (used below) */
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ldr r1, [r8, #(TF_PC)] /* second ras_lookup() arg */
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bl _C_LABEL(ras_lookup)
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cmn r0, #1 /* -1 means "not in a RAS" */
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strne r0, [r8, #(TF_PC)]
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/* rem: r4 = old lwp */
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/* rem: r5 = curcpu() */
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/* rem: r6 = new lwp */
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/* rem: r7 = new pcb */
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.Lswitch_do_restore:
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/* Restore all the saved registers */
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#ifdef __XSCALE__
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ldr r8, [r7, #(PCB_R8)]
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@ -280,24 +304,9 @@ ENTRY(cpu_switchto)
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/* Record the old lwp for pmap_activate()'s benefit */
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#ifndef ARM_MMU_EXTENDED
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str r4, [r3, #CI_LASTLWP]
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str r4, [r5, #CI_LASTLWP]
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#endif
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/* rem: r4 = old lwp */
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/* rem: r5 = new lwp's proc */
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/* rem: r6 = new lwp */
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/* rem: r7 = new pcb */
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/*
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* Check for restartable atomic sequences (RAS).
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*/
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ldr r2, [r5, #(P_RASLIST)]
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ldr r1, [r6, #(L_MD_TF)] /* r1 = trapframe (used below) */
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teq r2, #0 /* p->p_nras == 0? */
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bne .Lswitch_do_ras /* no, check for one */
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.Lswitch_return:
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/* cpu_switchto returns the old lwp */
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mov r0, r4
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/* lwp_trampoline expects new lwp as its second argument */
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@ -313,14 +322,6 @@ ENTRY(cpu_switchto)
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*/
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pop {r4-r7, ip, pc}
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.Lswitch_do_ras:
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ldr r1, [r1, #(TF_PC)] /* second ras_lookup() arg */
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mov r0, r5 /* first ras_lookup() arg */
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bl _C_LABEL(ras_lookup)
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cmn r0, #1 /* -1 means "not in a RAS" */
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ldrne r1, [r6, #(L_MD_TF)]
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strne r0, [r1, #(TF_PC)]
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b .Lswitch_return
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END(cpu_switchto)
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ENTRY_NP(lwp_trampoline)
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