Finish moving code between ip2x.c and ip3x.c to imc.c and crime.c.
This commit is contained in:
sekiya
parent
90ed8dc85b
commit
23020fc3cf
@ -1,6 +1,7 @@
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/* $NetBSD: crime.c,v 1.16 2004/01/13 14:31:37 sekiya Exp $ */
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/* $NetBSD: crime.c,v 1.17 2004/01/18 00:54:55 sekiya Exp $ */
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/*
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* Copyright (c) 2004 Christopher SEKIYA
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* Copyright (c) 2000 Soren S. Jorvang
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* All rights reserved.
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*
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@ -37,11 +38,12 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: crime.c,v 1.16 2004/01/13 14:31:37 sekiya Exp $");
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__KERNEL_RCSID(0, "$NetBSD: crime.c,v 1.17 2004/01/18 00:54:55 sekiya Exp $");
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <machine/cpu.h>
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#include <machine/locore.h>
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@ -58,9 +60,15 @@ __KERNEL_RCSID(0, "$NetBSD: crime.c,v 1.16 2004/01/13 14:31:37 sekiya Exp $");
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static int crime_match(struct device *, struct cfdata *, void *);
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static void crime_attach(struct device *, struct device *, void *);
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void crime_watchdog_tickle(void);
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void crime_bus_reset(void);
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void crime_watchdog_reset(void);
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void crime_watchdog_disable(void);
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void crime_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
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void *crime_intr_establish(int, int, int (*)(void *), void *);
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extern void mace_intr(int); /* XXX */
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struct crime_softc *crime_sc; /* only one per machine, okay to be global */
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static bus_space_tag_t crm_iot;
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static bus_space_handle_t crm_ioh;
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CFATTACH_DECL(crime, sizeof(struct crime_softc),
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crime_match, crime_attach, NULL, NULL);
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@ -73,10 +81,7 @@ struct {
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} crime[CRIME_NINTR];
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static int
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crime_match(parent, match, aux)
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struct device *parent;
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struct cfdata *match;
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void *aux;
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crime_match(struct device *parent, struct cfdata *match, void *aux)
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{
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/*
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@ -89,24 +94,20 @@ crime_match(parent, match, aux)
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}
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static void
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crime_attach(parent, self, aux)
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struct device *parent;
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struct device *self;
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void *aux;
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crime_attach(struct device *parent, struct device *self, void *aux)
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{
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struct crime_softc *sc = (struct crime_softc *)self;
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struct mainbus_attach_args *ma = aux;
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u_int64_t crm_id;
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u_int64_t baseline;
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u_int32_t cps;
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crime_sc = sc;
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crm_iot = SGIMIPS_BUS_SPACE_CRIME;
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sc->iot = SGIMIPS_BUS_SPACE_CRIME;
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if (bus_space_map(sc->iot, ma->ma_addr, 0 /* XXX */,
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BUS_SPACE_MAP_LINEAR, &sc->ioh))
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if (bus_space_map(crm_iot, ma->ma_addr, 0 /* XXX */,
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BUS_SPACE_MAP_LINEAR, &crm_ioh))
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panic("crime_attach: can't map I/O space");
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crm_id = bus_space_read_8(sc->iot, sc->ioh, CRIME_REV);
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crm_id = bus_space_read_8(crm_iot, crm_ioh, CRIME_REV);
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aprint_naive(": system ASIC");
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@ -135,20 +136,43 @@ crime_attach(parent, self, aux)
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aprint_normal(" (CRIME_ID: %llx)\n", crm_id);
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/* reset CRIME CPU & memory error registers */
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crime_bus_reset();
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baseline = bus_space_read_8(crm_iot, crm_ioh, CRIME_TIME) & CRIME_TIME_MASK;
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cps = mips3_cp0_count_read();
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while (((bus_space_read_8(crm_iot, crm_ioh, CRIME_TIME) & CRIME_TIME_MASK)
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- baseline) < 50 * 1000000 / 15)
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continue;
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cps = mips3_cp0_count_read() - cps;
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cps = cps / 5;
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/* Counter on R4k/R4400/R4600/R5k counts at half the CPU frequency */
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curcpu()->ci_cpu_freq = cps * 2 * hz;
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curcpu()->ci_cycles_per_hz = curcpu()->ci_cpu_freq / (2 * hz);
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curcpu()->ci_divisor_delay = curcpu()->ci_cpu_freq / (2 * 1000000);
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MIPS_SET_CI_RECIPRICAL(curcpu());
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/* Turn on memory error and crime error interrupts.
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All others turned on as devices are registered. */
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bus_space_write_8(sc->iot, sc->ioh, CRIME_INTMASK,
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bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK,
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CRIME_INT_MEMERR |
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CRIME_INT_CRMERR |
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CRIME_INT_VICE |
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CRIME_INT_VID_OUT |
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CRIME_INT_VID_IN2 |
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CRIME_INT_VID_IN1);
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bus_space_write_8(sc->iot, sc->ioh, CRIME_INTSTAT, 0);
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bus_space_write_8(sc->iot, sc->ioh, CRIME_SOFTINT, 0);
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bus_space_write_8(sc->iot, sc->ioh, CRIME_HARDINT, 0);
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bus_space_write_8(crm_iot, crm_ioh, CRIME_INTSTAT, 0);
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bus_space_write_8(crm_iot, crm_ioh, CRIME_SOFTINT, 0);
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bus_space_write_8(crm_iot, crm_ioh, CRIME_HARDINT, 0);
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platform.watchdog_reset = crime_watchdog_tickle;
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platform.bus_reset = crime_bus_reset;
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platform.watchdog_reset = crime_watchdog_reset;
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platform.watchdog_disable = crime_watchdog_disable;
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platform.watchdog_enable = crime_watchdog_reset;
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platform.intr_establish = crime_intr_establish;
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platform.intr0 = crime_intr;
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}
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/*
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@ -156,12 +180,7 @@ crime_attach(parent, self, aux)
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*/
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void *
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crime_intr_establish(irq, type, level, func, arg)
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int irq;
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int type;
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int level;
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int (*func)(void *);
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void *arg;
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crime_intr_establish(int irq, int level, int (*func)(void *), void *arg)
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{
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if (crime[irq].func != NULL)
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return NULL; /* panic("Cannot share CRIME interrupts!"); */
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@ -175,15 +194,51 @@ crime_intr_establish(irq, type, level, func, arg)
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}
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void
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crime_intr(pendmask)
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u_int pendmask;
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crime_intr(u_int32_t status, u_int32_t cause, u_int32_t pc, u_int32_t ipending)
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{
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u_int64_t crime_intmask;
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u_int64_t crime_intstat;
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u_int64_t crime_ipending;
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int i;
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for (i = 0; i < CRIME_NINTR; i++) {
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if ((pendmask & (1 << i)) && crime[i].func != NULL)
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(*crime[i].func)(crime[i].arg);
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crime_intmask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK);
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crime_intstat = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTSTAT);
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crime_ipending = (crime_intstat & crime_intmask);
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if (crime_ipending & 0xff)
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mace_intr(crime_ipending & 0xff);
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if (crime_ipending & 0xffff0000) {
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/*
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* CRIME interrupts for CPU and memory errors
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*/
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if (crime_ipending & CRIME_INT_MEMERR) {
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u_int64_t address =
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bus_space_read_8(crm_iot, crm_ioh, CRIME_MEM_ERROR_ADDR);
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u_int64_t status =
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bus_space_read_8(crm_iot, crm_ioh, CRIME_MEM_ERROR_STAT);
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printf("crime: memory error address %llx"
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" status %llx\n", address << 2, status);
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crime_bus_reset();
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}
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if (crime_ipending & CRIME_INT_CRMERR) {
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u_int64_t stat =
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bus_space_read_8(crm_iot, crm_ioh, CRIME_CPU_ERROR_STAT);
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printf("crime: cpu error %llx at"
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" address %llx\n", stat,
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bus_space_read_8(crm_iot, crm_ioh, CRIME_CPU_ERROR_ADDR));
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crime_bus_reset();
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}
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}
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crime_ipending &= 0xff00;
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if (crime_ipending)
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for (i = 0; i < CRIME_NINTR; i++) {
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if ((crime_ipending & (1 << i)) && crime[i].func != NULL)
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(*crime[i].func)(crime[i].arg);
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}
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}
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void
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@ -191,17 +246,34 @@ crime_intr_mask(unsigned int intr)
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{
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u_int64_t mask;
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mask = bus_space_read_8(crime_sc->iot, crime_sc->ioh, CRIME_INTMASK);
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mask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK);
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mask |= (1 << intr);
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bus_space_write_8(crime_sc->iot, crime_sc->ioh, CRIME_INTMASK, mask);
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bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK, mask);
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}
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void
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crime_watchdog_tickle(void)
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crime_bus_reset(void)
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{
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/* enable watchdog timer, clear it */
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bus_space_write_8(crime_sc->iot, crime_sc->ioh,
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CRIME_CONTROL, CRIME_CONTROL_DOG_ENABLE);
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bus_space_write_8(crime_sc->iot, crime_sc->ioh, CRIME_WATCHDOG, 0);
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bus_space_write_8(crm_iot, crm_ioh, CRIME_CPU_ERROR_STAT, 0);
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bus_space_write_8(crm_iot, crm_ioh, CRIME_MEM_ERROR_STAT, 0);
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}
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void
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crime_watchdog_reset(void)
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{
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/* enable watchdog timer, clear it */
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bus_space_write_8(crm_iot, crm_ioh,
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CRIME_CONTROL, CRIME_CONTROL_DOG_ENABLE);
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bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0);
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}
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void
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crime_watchdog_disable(void)
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{
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u_int64_t reg;
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bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0);
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reg = bus_space_read_8(crm_iot, crm_ioh, CRIME_CONTROL)
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& ~CRIME_CONTROL_DOG_ENABLE;
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bus_space_write_8(crm_iot, crm_ioh, CRIME_CONTROL, reg);
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: crimevar.h,v 1.2 2003/11/17 10:07:58 keihan Exp $ */
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/* $NetBSD: crimevar.h,v 1.3 2004/01/18 00:54:55 sekiya Exp $ */
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/*
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* Copyright (c) 2003 Christopher SEKIYA
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@ -36,13 +36,6 @@
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struct crime_softc {
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struct device sc_dev;
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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};
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extern struct crime_softc *crime_sc;
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void *crime_intr_establish(int, int, int, int (*)(void *), void *);
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void crime_intr(u_int);
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void crime_intr_mask(unsigned int);
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@ -1,4 +1,4 @@
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/* $NetBSD: imc.c,v 1.13 2004/01/13 14:31:37 sekiya Exp $ */
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/* $NetBSD: imc.c,v 1.14 2004/01/18 00:54:55 sekiya Exp $ */
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/*
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* Copyright (c) 2001 Rafal K. Boni
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@ -28,7 +28,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: imc.c,v 1.13 2004/01/13 14:31:37 sekiya Exp $");
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__KERNEL_RCSID(0, "$NetBSD: imc.c,v 1.14 2004/01/18 00:54:55 sekiya Exp $");
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#include <sys/param.h>
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#include <sys/device.h>
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@ -59,7 +59,9 @@ static void imc_attach(struct device *, struct device *, void *);
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static int imc_print(void *, const char *);
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void imc_bus_reset(void);
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void imc_bus_error(void);
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void imc_watchdog_tickle(void);
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void imc_watchdog_reset(void);
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void imc_watchdog_disable(void);
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void imc_watchdog_enable(void);
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CFATTACH_DECL(imc, sizeof(struct imc_softc),
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imc_match, imc_attach, NULL, NULL);
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@ -110,7 +112,9 @@ imc_attach(parent, self, aux)
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panic("imc_attach: could not allocate memory\n");
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platform.bus_reset = imc_bus_reset;
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platform.watchdog_reset = imc_watchdog_tickle;
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platform.watchdog_reset = imc_watchdog_reset;
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platform.watchdog_disable = imc_watchdog_disable;
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platform.watchdog_enable = imc_watchdog_enable;
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sysid = bus_space_read_4(isc.iot, isc.ioh, IMC_SYSID);
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@ -220,11 +224,7 @@ imc_attach(parent, self, aux)
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iaa.iaa_name = "gio";
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(void)config_found(self, (void*)&iaa, imc_print);
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/* enable watchdog and clear it */
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reg = bus_space_read_4(isc.iot, isc.ioh, IMC_CPUCTRL0);
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reg |= IMC_CPUCTRL0_WDOG;
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bus_space_write_4(isc.iot, isc.ioh, IMC_CPUCTRL0, reg);
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imc_watchdog_tickle();
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imc_watchdog_enable();
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}
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@ -260,7 +260,29 @@ imc_bus_error(void)
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}
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void
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imc_watchdog_tickle(void)
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imc_watchdog_reset(void)
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{
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bus_space_write_4(isc.iot, isc.ioh, IMC_WDOG, 0);
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}
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void
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imc_watchdog_disable(void)
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{
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u_int32_t reg;
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bus_space_write_4(isc.iot, isc.ioh, IMC_WDOG, 0);
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reg = bus_space_read_4(isc.iot, isc.ioh, IMC_CPUCTRL0);
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reg &= IMC_CPUCTRL0_WDOG;
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bus_space_write_4(isc.iot, isc.ioh, IMC_CPUCTRL0, reg);
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}
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void
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imc_watchdog_enable(void)
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{
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u_int32_t reg;
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/* enable watchdog and clear it */
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reg = bus_space_read_4(isc.iot, isc.ioh, IMC_CPUCTRL0);
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reg |= IMC_CPUCTRL0_WDOG;
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bus_space_write_4(isc.iot, isc.ioh, IMC_CPUCTRL0, reg);
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imc_watchdog_reset();
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: int2reg.h,v 1.1 2004/01/10 05:16:57 sekiya Exp $ */
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/* $NetBSD: int2reg.h,v 1.2 2004/01/18 00:54:55 sekiya Exp $ */
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/*
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* Copyright (c) 2004 Christopher SEKIYA
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@ -30,6 +30,12 @@
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#if !defined(_ARCH_SGIMIPS_DEV_INT2_H_)
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#define _ARCH_SGIMIPS_DEV_INT2_H_
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/* The INT has known locations on all SGI machines */
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#define INT_IP12 0x1fb801c0
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#define INT_IP20 0x1fb801c0
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#define INT_IP22 0x1fbd9000
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#define INT_IP24 0x1fbd9880
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#define INT2_LOCAL0_STATUS 0x00
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#define INT2_LOCAL0_MASK 0x04
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#define INT2_LOCAL1_STATUS 0x08
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