0.9 "official" patch 001:

(1)	added support for ed1 in both generic kernels at:
	device ed1 at isa? port 0x250 net irq 9 iomem 0xd8000 vector edintr
(2)	brought if_ed.c up to DG's 1.19 rev.
This commit is contained in:
cgd 1993-08-26 00:26:50 +00:00
parent 7523985763
commit 225917bfe6
4 changed files with 12 additions and 10 deletions

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@ -1,7 +1,7 @@
#
# GENERICAHA -- Generic machine w/aha driver -- distribution floppy
#
# $Id: GENERICAHA,v 1.23 1993/08/07 08:03:41 cgd Exp $
# $Id: GENERICAHA,v 1.24 1993/08/26 00:26:50 cgd Exp $
#
machine "i386"
@ -64,6 +64,7 @@ device lpa0 at isa? port "IO_LPT1" tty
device lpa1 at isa? port "IO_LPT2" tty
device ed0 at isa? port 0x280 net irq 9 iomem 0xd0000 vector edintr
device ed1 at isa? port 0x250 net irq 9 iomem 0xd8000 vector edintr
#device we0 at isa? port 0x280 net irq 9 iomem 0xd0000 iosiz 8192 vector weintr
#device ec0 at isa? port 0x250 net irq 9 iomem 0xd8000 iosiz 8192 vector ecintr
device ne0 at isa? port 0x300 net irq 9 vector neintr

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@ -1,7 +1,7 @@
#
# GENERICAHBBT -- Generic machine w/ahb and bt drivers -- distribution floppy
#
# $Id: GENERICAHBBT,v 1.19 1993/08/07 08:03:46 cgd Exp $
# $Id: GENERICAHBBT,v 1.20 1993/08/26 00:26:53 cgd Exp $
#
machine "i386"
@ -73,6 +73,7 @@ device lpa0 at isa? port "IO_LPT1" tty
device lpa1 at isa? port "IO_LPT2" tty
device ed0 at isa? port 0x280 net irq 9 iomem 0xd0000 vector edintr
device ed1 at isa? port 0x250 net irq 9 iomem 0xd8000 vector edintr
#device we0 at isa? port 0x280 net irq 9 iomem 0xd0000 iosiz 8192 vector weintr
#device ec0 at isa? port 0x250 net irq 9 iomem 0xd8000 iosiz 8192 vector ecintr
device ne0 at isa? port 0x300 net irq 9 vector neintr

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@ -12,7 +12,7 @@
* Currently supports the Western Digital/SMC 8003 and 8013 series
* and the 3Com 3c503
*
* $Id: if_ed.c,v 1.5 1993/08/03 01:52:57 glass Exp $
* $Id: if_ed.c,v 1.6 1993/08/26 00:27:05 cgd Exp $
*/
#include "ed.h"
@ -807,14 +807,14 @@ ed_init(unit)
if (sc->memwidth == 16) {
/*
* Set FIFO threshold to 8, No auto-init Remote DMA,
* byte order=80x86, word-wide DMA xfers
* byte order=80x86, word-wide DMA xfers,
*/
outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_WTS);
outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_WTS|ED_DCR_LS);
} else {
/*
* Same as above, but byte-wide DMA xfers
*/
outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1);
outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_LS);
}
/*

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@ -12,7 +12,7 @@
* Currently supports the Western Digital/SMC 8003 and 8013 series
* and the 3Com 3c503
*
* $Id: if_ed.c,v 1.5 1993/08/03 01:52:57 glass Exp $
* $Id: if_ed.c,v 1.6 1993/08/26 00:27:05 cgd Exp $
*/
#include "ed.h"
@ -807,14 +807,14 @@ ed_init(unit)
if (sc->memwidth == 16) {
/*
* Set FIFO threshold to 8, No auto-init Remote DMA,
* byte order=80x86, word-wide DMA xfers
* byte order=80x86, word-wide DMA xfers,
*/
outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_WTS);
outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_WTS|ED_DCR_LS);
} else {
/*
* Same as above, but byte-wide DMA xfers
*/
outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1);
outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_LS);
}
/*