0.9 "official" patch 001:
(1) added support for ed1 in both generic kernels at: device ed1 at isa? port 0x250 net irq 9 iomem 0xd8000 vector edintr (2) brought if_ed.c up to DG's 1.19 rev.
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@ -1,7 +1,7 @@
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#
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# GENERICAHA -- Generic machine w/aha driver -- distribution floppy
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#
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# $Id: GENERICAHA,v 1.23 1993/08/07 08:03:41 cgd Exp $
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# $Id: GENERICAHA,v 1.24 1993/08/26 00:26:50 cgd Exp $
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#
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machine "i386"
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@ -64,6 +64,7 @@ device lpa0 at isa? port "IO_LPT1" tty
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device lpa1 at isa? port "IO_LPT2" tty
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device ed0 at isa? port 0x280 net irq 9 iomem 0xd0000 vector edintr
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device ed1 at isa? port 0x250 net irq 9 iomem 0xd8000 vector edintr
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#device we0 at isa? port 0x280 net irq 9 iomem 0xd0000 iosiz 8192 vector weintr
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#device ec0 at isa? port 0x250 net irq 9 iomem 0xd8000 iosiz 8192 vector ecintr
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device ne0 at isa? port 0x300 net irq 9 vector neintr
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@ -1,7 +1,7 @@
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#
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# GENERICAHBBT -- Generic machine w/ahb and bt drivers -- distribution floppy
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#
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# $Id: GENERICAHBBT,v 1.19 1993/08/07 08:03:46 cgd Exp $
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# $Id: GENERICAHBBT,v 1.20 1993/08/26 00:26:53 cgd Exp $
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#
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machine "i386"
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@ -73,6 +73,7 @@ device lpa0 at isa? port "IO_LPT1" tty
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device lpa1 at isa? port "IO_LPT2" tty
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device ed0 at isa? port 0x280 net irq 9 iomem 0xd0000 vector edintr
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device ed1 at isa? port 0x250 net irq 9 iomem 0xd8000 vector edintr
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#device we0 at isa? port 0x280 net irq 9 iomem 0xd0000 iosiz 8192 vector weintr
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#device ec0 at isa? port 0x250 net irq 9 iomem 0xd8000 iosiz 8192 vector ecintr
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device ne0 at isa? port 0x300 net irq 9 vector neintr
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@ -12,7 +12,7 @@
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* Currently supports the Western Digital/SMC 8003 and 8013 series
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* and the 3Com 3c503
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*
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* $Id: if_ed.c,v 1.5 1993/08/03 01:52:57 glass Exp $
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* $Id: if_ed.c,v 1.6 1993/08/26 00:27:05 cgd Exp $
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*/
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#include "ed.h"
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@ -807,14 +807,14 @@ ed_init(unit)
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if (sc->memwidth == 16) {
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/*
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* Set FIFO threshold to 8, No auto-init Remote DMA,
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* byte order=80x86, word-wide DMA xfers
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* byte order=80x86, word-wide DMA xfers,
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*/
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outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_WTS);
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outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_WTS|ED_DCR_LS);
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} else {
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/*
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* Same as above, but byte-wide DMA xfers
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*/
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outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1);
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outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_LS);
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}
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/*
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@ -12,7 +12,7 @@
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* Currently supports the Western Digital/SMC 8003 and 8013 series
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* and the 3Com 3c503
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*
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* $Id: if_ed.c,v 1.5 1993/08/03 01:52:57 glass Exp $
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* $Id: if_ed.c,v 1.6 1993/08/26 00:27:05 cgd Exp $
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*/
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#include "ed.h"
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@ -807,14 +807,14 @@ ed_init(unit)
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if (sc->memwidth == 16) {
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/*
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* Set FIFO threshold to 8, No auto-init Remote DMA,
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* byte order=80x86, word-wide DMA xfers
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* byte order=80x86, word-wide DMA xfers,
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*/
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outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_WTS);
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outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_WTS|ED_DCR_LS);
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} else {
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/*
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* Same as above, but byte-wide DMA xfers
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*/
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outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1);
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outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_LS);
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}
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/*
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