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Add register definitions for 5704 internal ASIC revision.

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Add cpp definitions for the DMA control register fields needed for
5703/5704 configuration on PCI-X.
Add softc copy of internal"local control" register clobbered by reset.
This commit is contained in:
jonathan 2003-01-17 00:21:37 +00:00
parent a95f2651b7
commit 21cd3a1948
1 changed files with 7 additions and 1 deletions
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8
sys/dev/pci/if_bgereg.h
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@ -1,4 +1,4 @@
/* $NetBSD: if_bgereg.h,v 1.4 2002/07/13 22:31:18 thorpej Exp $ */
/* $NetBSD: if_bgereg.h,v 1.5 2003/01/17 00:21:37 jonathan Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
* Copyright (c) 1997, 1998, 1999, 2001
@ -233,6 +233,7 @@
#define BGE_ASICREV_BCM5703_A0 0x10000000
#define BGE_ASICREV_BCM5703_A1 0x10010000
#define BGE_ASICREV_BCM5703_A2 0x10020000
#define BGE_ASICREV_BCM5704_A0 0x20000000
/* PCI DMA Read/Write Control register */
#define BGE_PCIDMARWCTL_MINDMA 0x000000FF
@ -240,11 +241,16 @@
#define BGE_PCIDMARWCTL_WRADDR_BNDRY 0x00003800
#define BGE_PCIDMARWCTL_ONEDMA_ATONCE 0x00004000
#define BGE_PCIDMARWCTL_RD_WAT 0x00070000
# define BGE_PCIDMARWCTL_RD_WAT_SHIFT 16
#define BGE_PCIDMARWCTL_WR_WAT 0x00380000
# define BGE_PCIDMARWCTL_WR_WAT_SHIFT 19
#define BGE_PCIDMARWCTL_USE_MRM 0x00400000
#define BGE_PCIDMARWCTL_ASRT_ALL_BE 0x00800000
#define BGE_PCIDMARWCTL_DFLT_PCI_RD_CMD 0x0F000000
# define BGE_PCIDMA_RWCTL_PCI_RD_CMD_SHIFT 24
#define BGE_PCIDMARWCTL_DFLT_PCI_WR_CMD 0xF0000000
# define BGE_PCIDMA_RWCTL_PCI_WR_CMD_SHIFT 28
#define BGE_PCI_READ_BNDRY_DISABLE 0x00000000
#define BGE_PCI_READ_BNDRY_16BYTES 0x00000100