Enable frobbing the 1000baseT control register on Gig-E PHYs,
used for hard-wiring master mode, and for advertising the 1000baseT media options during autonegotiation.
This commit is contained in:
thorpej
parent
737585d43c
commit
2128d9199a
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@ -1,7 +1,7 @@
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/* $NetBSD: mii_physubr.c,v 1.22 2001/05/31 16:02:29 thorpej Exp $ */
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/* $NetBSD: mii_physubr.c,v 1.23 2001/05/31 18:44:48 thorpej Exp $ */
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/*-
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* Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
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* Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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@ -58,17 +58,47 @@
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/*
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* Media to register setting conversion table. Order matters.
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* XXX 802.3 doesn't specify ANAR or ANLPAR bits for 1000base.
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*/
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const struct mii_media mii_media_table[] = {
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{ BMCR_ISO, ANAR_CSMA }, /* None */
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{ BMCR_S10, ANAR_CSMA|ANAR_10 }, /* 10baseT */
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{ BMCR_S10|BMCR_FDX, ANAR_CSMA|ANAR_10_FD }, /* 10baseT-FDX */
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{ BMCR_S100, ANAR_CSMA|ANAR_T4 }, /* 100baseT4 */
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{ BMCR_S100, ANAR_CSMA|ANAR_TX }, /* 100baseTX */
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{ BMCR_S100|BMCR_FDX, ANAR_CSMA|ANAR_TX_FD }, /* 100baseTX-FDX */
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{ BMCR_S1000, ANAR_CSMA }, /* 1000base */
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{ BMCR_S1000|BMCR_FDX, ANAR_CSMA }, /* 1000base-FDX */
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const struct mii_media mii_media_table[MII_NMEDIA] = {
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/* None */
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{ BMCR_ISO, ANAR_CSMA,
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0, },
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/* 10baseT */
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{ BMCR_S10, ANAR_CSMA|ANAR_10,
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0, },
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/* 10baseT-FDX */
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{ BMCR_S10|BMCR_FDX, ANAR_CSMA|ANAR_10_FD,
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0, },
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/* 100baseT4 */
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{ BMCR_S100, ANAR_CSMA|ANAR_T4,
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0, },
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/* 100baseTX */
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{ BMCR_S100, ANAR_CSMA|ANAR_TX,
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0, },
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/* 100baseTX-FDX */
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{ BMCR_S100|BMCR_FDX, ANAR_CSMA|ANAR_TX_FD,
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0, },
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/* 1000baseX */
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{ BMCR_S1000, ANAR_CSMA,
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0, },
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/* 1000baseX-FDX */
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{ BMCR_S1000|BMCR_FDX, ANAR_CSMA,
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0, },
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/* 1000baseT */
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{ BMCR_S1000, ANAR_CSMA,
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GTCR_ADV_1000THDX },
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/* 1000baseT-FDX */
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{ BMCR_S1000, ANAR_CSMA,
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GTCR_ADV_1000TFDX },
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};
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void mii_phy_auto_timeout __P((void *));
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@ -79,7 +109,7 @@ mii_phy_setmedia(sc)
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{
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struct mii_data *mii = sc->mii_pdata;
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struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
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int bmcr, anar;
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int bmcr, anar, gtcr;
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if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) {
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if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0)
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@ -98,12 +128,39 @@ mii_phy_setmedia(sc)
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anar = mii_media_table[ife->ifm_data].mm_anar;
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bmcr = mii_media_table[ife->ifm_data].mm_bmcr;
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gtcr = mii_media_table[ife->ifm_data].mm_gtcr;
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if (mii->mii_media.ifm_media & IFM_ETH_MASTER) {
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switch (IFM_SUBTYPE(ife->ifm_media)) {
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case IFM_1000_TX:
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gtcr |= GTCR_MAN_MS|GTCR_ADV_MS;
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break;
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default:
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panic("mii_phy_setmedia: MASTER on wrong media");
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}
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}
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if (ife->ifm_media & IFM_LOOP)
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bmcr |= BMCR_LOOP;
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PHY_WRITE(sc, MII_ANAR, anar);
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PHY_WRITE(sc, MII_BMCR, bmcr);
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if (sc->mii_flags & MIIF_HAVE_GTCR)
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PHY_WRITE(sc, MII_100T2CR, gtcr);
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}
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static int
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mii_phy_extcap_to_gtcr(struct mii_softc *sc)
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{
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int gtcr = 0;
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if (sc->mii_extcapabilities & EXTSR_1000TFDX)
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gtcr |= GTCR_ADV_1000TFDX;
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if (sc->mii_extcapabilities & EXTSR_1000THDX)
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gtcr |= GTCR_ADV_1000THDX;
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return (gtcr);
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}
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int
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@ -116,6 +173,8 @@ mii_phy_auto(sc, waitfor)
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if ((sc->mii_flags & MIIF_DOINGAUTO) == 0) {
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PHY_WRITE(sc, MII_ANAR,
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BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA);
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if (sc->mii_flags & MIIF_HAVE_GTCR)
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PHY_WRITE(sc, MII_100T2CR, mii_phy_extcap_to_gtcr(sc));
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PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
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}
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@ -378,25 +437,38 @@ mii_phy_add_media(sc)
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if (sc->mii_extcapabilities & EXTSR_1000XHDX) {
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sc->mii_anegticks = 10;
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0,
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sc->mii_inst), MII_MEDIA_1000);
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sc->mii_inst), MII_MEDIA_1000_X);
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PRINT("1000baseSX");
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}
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if (sc->mii_extcapabilities & EXTSR_1000XFDX) {
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sc->mii_anegticks = 10;
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX,
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sc->mii_inst), MII_MEDIA_1000_FDX);
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sc->mii_inst), MII_MEDIA_1000_X_FDX);
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PRINT("1000baseSX-FDX");
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}
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/*
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* 1000baseT media needs to be able to manipulate
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* master/slave mode. We set IFM_ETH_MASTER in
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* the "don't care mask" and filter it out when
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* the media is set.
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*
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* All 1000baseT PHYs have a 1000baseT control register.
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*/
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if (sc->mii_extcapabilities & EXTSR_1000THDX) {
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sc->mii_anegticks = 10;
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sc->mii_flags |= MIIF_HAVE_GTCR;
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mii->mii_media.ifm_mask |= IFM_ETH_MASTER;
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_TX, 0,
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sc->mii_inst), MII_MEDIA_1000);
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sc->mii_inst), MII_MEDIA_1000_T);
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PRINT("1000baseTX");
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}
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if (sc->mii_extcapabilities & EXTSR_1000TFDX) {
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sc->mii_anegticks = 10;
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sc->mii_flags |= MIIF_HAVE_GTCR;
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mii->mii_media.ifm_mask |= IFM_ETH_MASTER;
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_TX, IFM_FDX,
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sc->mii_inst), MII_MEDIA_1000_FDX);
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sc->mii_inst), MII_MEDIA_1000_T_FDX);
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PRINT("1000baseTX-FDX");
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}
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: miivar.h,v 1.25 2001/05/31 16:02:29 thorpej Exp $ */
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/* $NetBSD: miivar.h,v 1.26 2001/05/31 18:44:48 thorpej Exp $ */
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/*-
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* Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
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@ -146,6 +146,7 @@ typedef struct mii_softc mii_softc_t;
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#define MIIF_DOINGAUTO 0x0008 /* doing autonegotiation (mii_softc) */
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#define MIIF_AUTOTSLEEP 0x0010 /* use tsleep(), not callout() */
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#define MIIF_HAVEFIBER 0x0020 /* from parent: has fiber interface */
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#define MIIF_HAVE_GTCR 0x0040 /* has 100base-T2/1000base-T CR */
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/* XXX ununsed
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#define MIIF_INHERIT_MASK (MIIF_NOISOLATE|MIIF_NOLOOP|MIIF_AUTOTSLEEP)
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@ -178,6 +179,7 @@ typedef struct mii_attach_args mii_attach_args_t;
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struct mii_media {
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int mm_bmcr; /* BMCR settings for this media */
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int mm_anar; /* ANAR settings for this media */
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int mm_gtcr; /* 100base-T2 or 1000base-T CR */
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};
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#define MII_MEDIA_NONE 0
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@ -186,9 +188,11 @@ struct mii_media {
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#define MII_MEDIA_100_T4 3
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#define MII_MEDIA_100_TX 4
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#define MII_MEDIA_100_TX_FDX 5
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#define MII_MEDIA_1000 6
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#define MII_MEDIA_1000_FDX 7
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#define MII_NMEDIA 8
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#define MII_MEDIA_1000_X 6
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#define MII_MEDIA_1000_X_FDX 7
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#define MII_MEDIA_1000_T 8
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#define MII_MEDIA_1000_T_FDX 9
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#define MII_NMEDIA 10
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#ifdef _KERNEL
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#include "locators.h"
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