eSDHC has no DMA_BOUNDARY in BLOCK_SIZE register.
So clear multi segment DMA transfer support bit.
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parent
3ba84f5404
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@ -1,4 +1,4 @@
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/* $NetBSD: sdhc.c,v 1.53 2015/02/27 01:52:15 nonaka Exp $ */
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/* $NetBSD: sdhc.c,v 1.54 2015/02/27 15:53:09 nonaka Exp $ */
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/* $OpenBSD: sdhc.c,v 1.25 2009/01/13 19:44:20 grange Exp $ */
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/*
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@ -23,7 +23,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.53 2015/02/27 01:52:15 nonaka Exp $");
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__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.54 2015/02/27 15:53:09 nonaka Exp $");
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#ifdef _KERNEL_OPT
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#include "opt_sdmmc.h"
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@ -425,7 +425,9 @@ sdhc_host_found(struct sdhc_softc *sc, bus_space_tag_t iot,
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if (ISSET(caps, SDHC_HIGH_SPEED_SUPP))
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saa.saa_caps |= SMC_CAPS_SD_HIGHSPEED;
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if (ISSET(hp->flags, SHF_USE_DMA)) {
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saa.saa_caps |= SMC_CAPS_DMA | SMC_CAPS_MULTI_SEG_DMA;
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saa.saa_caps |= SMC_CAPS_DMA;
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if (!ISSET(hp->sc->sc_flags, SDHC_FLAG_ENHANCED))
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saa.saa_caps |= SMC_CAPS_MULTI_SEG_DMA;
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}
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if (ISSET(sc->sc_flags, SDHC_FLAG_SINGLE_ONLY))
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saa.saa_caps |= SMC_CAPS_SINGLE_ONLY;
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