-map 64-bit PCI BARs

-integrate some bits from upstream to support i965
from Yorick Hardy per PM
This commit is contained in:
drochner 2008-03-04 11:52:38 +00:00
parent 88566e4bc8
commit 1f41b0e499
5 changed files with 26 additions and 11 deletions

View File

@ -1,4 +1,4 @@
/* $NetBSD: drm_drv.c,v 1.8 2007/12/11 11:17:31 lukem Exp $ */
/* $NetBSD: drm_drv.c,v 1.9 2008/03/04 11:52:38 drochner Exp $ */
/* drm_drv.h -- Generic driver template -*- linux-c -*-
* Created: Thu Nov 23 03:10:50 2000 by gareth@valinux.com
@ -34,7 +34,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: drm_drv.c,v 1.8 2007/12/11 11:17:31 lukem Exp $");
__KERNEL_RCSID(0, "$NetBSD: drm_drv.c,v 1.9 2008/03/04 11:52:38 drochner Exp $");
/*
__FBSDID("$FreeBSD: src/sys/dev/drm/drm_drv.c,v 1.6 2006/09/07 23:04:47 anholt Exp $");
*/
@ -225,6 +225,9 @@ void drm_attach(struct device *kdev, struct pci_attach_args *pa,
}
if(dev->pci_map_data[unit].maptype == PCI_MAPREG_TYPE_MEM)
dev->pci_map_data[unit].flags |= BUS_SPACE_MAP_LINEAR;
if(dev->pci_map_data[unit].maptype
== (PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT))
dev->pci_map_data[unit].flags |= BUS_SPACE_MAP_LINEAR;
}
for(unit=0; unit<DRM_MAX_PCI_RESOURCE; unit++) {
dev->agp_map_data[unit].mapped = 0;

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@ -1,4 +1,4 @@
/* $NetBSD: drm_memory.c,v 1.6 2008/02/22 19:47:06 drochner Exp $ */
/* $NetBSD: drm_memory.c,v 1.7 2008/03/04 11:52:38 drochner Exp $ */
/* drm_memory.h -- Memory management wrappers for DRM -*- linux-c -*-
* Created: Thu Feb 4 14:00:34 1999 by faith@valinux.com
@ -34,7 +34,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: drm_memory.c,v 1.6 2008/02/22 19:47:06 drochner Exp $");
__KERNEL_RCSID(0, "$NetBSD: drm_memory.c,v 1.7 2008/03/04 11:52:38 drochner Exp $");
/*
__FBSDID("$FreeBSD: src/sys/dev/drm/drm_memory.c,v 1.2 2005/11/28 23:13:52 anholt Exp $");
*/
@ -93,8 +93,10 @@ void *drm_ioremap(drm_device_t *dev, drm_local_map_t *map)
int i, reg, reason;
for(i = 0; i<DRM_MAX_PCI_RESOURCE; i++) {
reg = PCI_MAPREG_START + i*4;
if (dev->pci_map_data[i].maptype == PCI_MAPREG_TYPE_MEM &&
dev->pci_map_data[i].base == map->offset &&
if ((dev->pci_map_data[i].maptype == PCI_MAPREG_TYPE_MEM ||
dev->pci_map_data[i].maptype ==
(PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT)) &&
dev->pci_map_data[i].base == map->offset &&
dev->pci_map_data[i].size >= map->size)
{
map->bst = dev->pa.pa_memt;

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@ -293,6 +293,7 @@
{0x8086, 0x2982, 0, "Intel i965G"}, \
{0x8086, 0x2992, 0, "Intel i965Q"}, \
{0x8086, 0x29A2, 0, "Intel i965G"}, \
{0x8086, 0x2A02, 0, "Intel i965PM"}, \
{0, 0, 0, NULL}
#define imagine_PCI_IDS \

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@ -1,4 +1,4 @@
/* $NetBSD: i915_dma.c,v 1.4 2007/12/15 00:39:30 perry Exp $ */
/* $NetBSD: i915_dma.c,v 1.5 2008/03/04 11:52:38 drochner Exp $ */
/* i915_dma.c -- DMA support for the I915 -*- linux-c -*-
*/
@ -29,7 +29,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: i915_dma.c,v 1.4 2007/12/15 00:39:30 perry Exp $");
__KERNEL_RCSID(0, "$NetBSD: i915_dma.c,v 1.5 2008/03/04 11:52:38 drochner Exp $");
/*
__FBSDID("$FreeBSD: src/sys/dev/drm/i915_dma.c,v 1.4 2006/09/07 23:04:47 anholt Exp $");
*/
@ -42,7 +42,8 @@ __FBSDID("$FreeBSD: src/sys/dev/drm/i915_dma.c,v 1.4 2006/09/07 23:04:47 anholt
#define IS_I965G(dev) (dev->pci_device == 0x2972 || \
dev->pci_device == 0x2982 || \
dev->pci_device == 0x2992 || \
dev->pci_device == 0x29A2)
dev->pci_device == 0x29A2 || \
dev->pci_device == 0x2A02)
/* Really want an OS-independent resettable timer. Would like to have
@ -513,9 +514,15 @@ static int i915_dispatch_batchbuffer(drm_device_t * dev,
if (dev_priv->use_mi_batchbuffer_start) {
BEGIN_LP_RING(2);
OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
OUT_RING(batch->start | MI_BATCH_NON_SECURE);
if (IS_I965G(dev)) {
OUT_RING(MI_BATCH_BUFFER_START | (2 << 6) | MI_BATCH_NON_SECURE_I965);
OUT_RING(batch->start);
} else {
OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
OUT_RING(batch->start | MI_BATCH_NON_SECURE);
}
ADVANCE_LP_RING();
} else {
BEGIN_LP_RING(4);
OUT_RING(MI_BATCH_BUFFER);

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@ -266,6 +266,8 @@ extern int i915_wait_ring(drm_device_t * dev, int n, const char *caller);
#define MI_BATCH_BUFFER_END (0xA<<23)
#define MI_BATCH_NON_SECURE (1)
#define MI_BATCH_NON_SECURE_I965 (1<<8)
#define MI_WAIT_FOR_EVENT ((0x3<<23))
#define MI_WAIT_FOR_PLANE_A_FLIP (1<<2)
#define MI_WAIT_FOR_PLANE_A_SCANLINES (1<<1)