Add fdt glue for ARM PrimeCell UART (PL011).
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@ -1,4 +1,4 @@
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# $NetBSD: files.fdt,v 1.6 2017/06/02 11:04:01 jmcneill Exp $
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# $NetBSD: files.fdt,v 1.7 2017/06/02 14:30:58 jmcneill Exp $
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device armfdt { }: bus_space_generic, fdtbus
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attach armfdt at root with arm_fdt
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@ -15,6 +15,9 @@ device gic: mpcorebus
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attach gic at fdt with gic_fdt
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file arch/arm/fdt/gic_fdt.c gic_fdt
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attach plcom at fdt with plcom_fdt
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file arch/arm/fdt/plcom_fdt.c plcom_fdt
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attach plmmc at fdt with plmmc_fdt
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file arch/arm/fdt/plmmc_fdt.c plmmc_fdt
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@ -0,0 +1,146 @@
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/* $NetBSD: plcom_fdt.c,v 1.1 2017/06/02 14:30:58 jmcneill Exp $ */
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/*-
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* Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: plcom_fdt.c,v 1.1 2017/06/02 14:30:58 jmcneill Exp $");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/device.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <dev/fdt/fdtvar.h>
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#include <evbarm/dev/plcomreg.h>
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#include <evbarm/dev/plcomvar.h>
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static int plcom_fdt_match(device_t, cfdata_t, void *);
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static void plcom_fdt_attach(device_t, device_t, void *);
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static const char * const compatible[] = { "arm,pl011", NULL };
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CFATTACH_DECL_NEW(plcom_fdt, sizeof(struct plcom_softc),
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plcom_fdt_match, plcom_fdt_attach, NULL, NULL);
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static int
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plcom_fdt_match(device_t parent, cfdata_t cf, void *aux)
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{
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struct fdt_attach_args * const faa = aux;
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return of_compatible(faa->faa_phandle, compatible) >= 0;
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}
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static void
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plcom_fdt_attach(device_t parent, device_t self, void *aux)
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{
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struct plcom_softc * const sc = device_private(self);
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struct fdt_attach_args * const faa = aux;
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const int phandle = faa->faa_phandle;
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struct clk *clk;
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bus_addr_t addr;
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bus_size_t size;
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void *ih;
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if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
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aprint_error(": missing 'reg' property\n");
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return;
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}
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sc->sc_dev = self;
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/* Enable clocks */
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for (int i = 0; (clk = fdtbus_clock_get_index(phandle, i)); i++) {
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if (clk_enable(clk) != 0) {
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aprint_error(": failed to enable clock #%d\n", i);
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return;
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}
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/* First clock is UARTCLK */
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if (i == 0)
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sc->sc_frequency = clk_get_rate(clk);
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}
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sc->sc_hwflags = PLCOM_HW_TXFIFO_DISABLE;
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sc->sc_swflags = 0;
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sc->sc_pi.pi_type = PLCOM_TYPE_PL011;
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sc->sc_pi.pi_flags = PLC_FLAG_32BIT_ACCESS;
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sc->sc_pi.pi_iot = faa->faa_bst;
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sc->sc_pi.pi_iobase = addr;
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if (bus_space_map(faa->faa_bst, addr, size, 0, &sc->sc_pi.pi_ioh)) {
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aprint_error(": couldn't map device\n");
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return;
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}
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plcom_attach_subr(sc);
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ih = fdtbus_intr_establish(phandle, 0, IPL_SERIAL, FDT_INTR_MPSAFE,
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plcomintr, sc);
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if (ih == NULL) {
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aprint_error_dev(self, "couldn't install interrupt handler\n");
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return;
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}
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}
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static int
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plcom_fdt_console_match(int phandle)
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{
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return of_match_compatible(phandle, compatible);
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}
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static void
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plcom_fdt_console_consinit(struct fdt_attach_args *faa, u_int uart_freq)
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{
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static struct plcom_instance pi;
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bus_addr_t addr;
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bus_size_t size;
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tcflag_t flags;
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int speed;
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if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0)
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return;
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pi.pi_type = PLCOM_TYPE_PL011;
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pi.pi_flags = PLC_FLAG_32BIT_ACCESS;
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pi.pi_iot = faa->faa_bst;
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pi.pi_iobase = addr;
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pi.pi_size = size;
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speed = fdtbus_get_stdout_speed();
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if (speed < 0)
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speed = 115200;
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flags = fdtbus_get_stdout_flags();
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plcomcnattach(&pi, speed, uart_freq, flags, -1);
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}
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static const struct fdt_console plcom_fdt_console = {
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.match = plcom_fdt_console_match,
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.consinit = plcom_fdt_console_consinit,
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};
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FDT_CONSOLE(plcom_fdt, &plcom_fdt_console);
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