From 1eb689a712f09226e47ae72ecba60daee690d744 Mon Sep 17 00:00:00 2001 From: thorpej Date: Mon, 26 Apr 1999 23:19:10 +0000 Subject: [PATCH] Make the VIA Rhine driver work on big-endian systems. From Izumi Tsutsui, PR #7305. --- sys/dev/pci/if_vr.c | 45 +++++++++++++++++++++++++++------------------ 1 file changed, 27 insertions(+), 18 deletions(-) diff --git a/sys/dev/pci/if_vr.c b/sys/dev/pci/if_vr.c index 484db642017d..4ab5beaf6182 100644 --- a/sys/dev/pci/if_vr.c +++ b/sys/dev/pci/if_vr.c @@ -1,4 +1,4 @@ -/* $NetBSD: if_vr.c,v 1.20 1999/04/24 22:09:56 thorpej Exp $ */ +/* $NetBSD: if_vr.c,v 1.21 1999/04/26 23:19:10 thorpej Exp $ */ /*- * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. @@ -144,6 +144,15 @@ #include +#if BYTE_ORDER == BIG_ENDIAN +#include +#define htopci(x) bswap32(x) +#define pcitoh(x) bswap32(x) +#else +#define htopci(x) (x) +#define pcitoh(x) (x) +#endif + #define VR_USEIOSPACE /* @@ -258,12 +267,12 @@ do { \ struct vr_desc *__d = VR_CDRX((sc), (i)); \ struct vr_descsoft *__ds = VR_DSRX((sc), (i)); \ \ - __d->vr_next = VR_CDRXADDR((sc), VR_NEXTRX((i))); \ - __d->vr_status = VR_RXSTAT_FIRSTFRAG | VR_RXSTAT_LASTFRAG | \ - VR_RXSTAT_OWN; \ - __d->vr_data = __ds->ds_dmamap->dm_segs[0].ds_addr; \ - __d->vr_ctl = VR_RXCTL_CHAIN | VR_RXCTL_RX_INTR | \ - ((MCLBYTES - 1) & VR_RXCTL_BUFLEN); \ + __d->vr_next = htopci(VR_CDRXADDR((sc), VR_NEXTRX((i)))); \ + __d->vr_status = htopci(VR_RXSTAT_FIRSTFRAG | \ + VR_RXSTAT_LASTFRAG | VR_RXSTAT_OWN); \ + __d->vr_data = htopci(__ds->ds_dmamap->dm_segs[0].ds_addr); \ + __d->vr_ctl = htopci(VR_RXCTL_CHAIN | VR_RXCTL_RX_INTR | \ + ((MCLBYTES - 1) & VR_RXCTL_BUFLEN)); \ VR_CDRXSYNC((sc), (i), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \ } while (0) @@ -711,7 +720,7 @@ vr_rxeof(sc) VR_CDRXSYNC(sc, i, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); - rxstat = d->vr_status; + rxstat = pcitoh(d->vr_status); if (rxstat & VR_RXSTAT_OWN) { /* @@ -768,7 +777,7 @@ vr_rxeof(sc) ds->ds_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD); /* No errors; receive the packet. */ - total_len = VR_RXBYTES(d->vr_status); + total_len = VR_RXBYTES(pcitoh(d->vr_status)); /* * XXX The VIA Rhine chip includes the CRC with every @@ -902,7 +911,7 @@ vr_txeof(sc) VR_CDTXSYNC(sc, i, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); - txstat = d->vr_status; + txstat = pcitoh(d->vr_status); if (txstat & VR_TXSTAT_OWN) break; @@ -1116,11 +1125,11 @@ vr_start(ifp) * Fill in the transmit descriptor. The Rhine * doesn't auto-pad, so we have to do this ourselves. */ - d->vr_data = ds->ds_dmamap->dm_segs[0].ds_addr; - d->vr_ctl = m0->m_pkthdr.len < VR_MIN_FRAMELEN ? - VR_MIN_FRAMELEN : m0->m_pkthdr.len; + d->vr_data = htopci(ds->ds_dmamap->dm_segs[0].ds_addr); + d->vr_ctl = htopci(m0->m_pkthdr.len < VR_MIN_FRAMELEN ? + VR_MIN_FRAMELEN : m0->m_pkthdr.len); d->vr_ctl |= - VR_TXCTL_TLINK|VR_TXCTL_FIRSTFRAG|VR_TXCTL_LASTFRAG; + htopci(VR_TXCTL_TLINK|VR_TXCTL_FIRSTFRAG|VR_TXCTL_LASTFRAG); /* * If this is the first descriptor we're enqueuing, @@ -1130,7 +1139,7 @@ vr_start(ifp) if (nexttx == firsttx) d->vr_status = 0; else - d->vr_status = VR_TXSTAT_OWN; + d->vr_status = htopci(VR_TXSTAT_OWN); VR_CDTXSYNC(sc, nexttx, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); @@ -1157,7 +1166,7 @@ vr_start(ifp) * Cause a transmit interrupt to happen on the * last packet we enqueued. */ - VR_CDTX(sc, sc->vr_txlast)->vr_ctl |= VR_TXCTL_FINT; + VR_CDTX(sc, sc->vr_txlast)->vr_ctl |= htopci(VR_TXCTL_FINT); VR_CDTXSYNC(sc, sc->vr_txlast, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); @@ -1165,7 +1174,7 @@ vr_start(ifp) * The entire packet chain is set up. Give the * first descriptor to the Rhine now. */ - VR_CDTX(sc, firsttx)->vr_status = VR_TXSTAT_OWN; + VR_CDTX(sc, firsttx)->vr_status = htopci(VR_TXSTAT_OWN); VR_CDTXSYNC(sc, firsttx, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); @@ -1209,7 +1218,7 @@ vr_init(xsc) for (i = 0; i < VR_NTXDESC; i++) { d = VR_CDTX(sc, i); memset(d, 0, sizeof(struct vr_desc)); - d->vr_next = VR_CDTXADDR(sc, VR_NEXTTX(i)); + d->vr_next = htopci(VR_CDTXADDR(sc, VR_NEXTTX(i))); VR_CDTXSYNC(sc, i, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); } sc->vr_txpending = 0;