From 1ea7c0386922613b140572fe180d78669b999708 Mon Sep 17 00:00:00 2001
From: martin <martin@NetBSD.org>
Date: Mon, 15 Jan 2018 10:06:49 +0000
Subject: [PATCH] Redo previous: apply the alignement to the whole struct
 fpstate - everything in there is properly aligned, and we need to have
 fs_queue double aligned as well.

---
 sys/arch/sparc/include/reg.h | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/sys/arch/sparc/include/reg.h b/sys/arch/sparc/include/reg.h
index d50160864e82..9f20b3cfeb17 100644
--- a/sys/arch/sparc/include/reg.h
+++ b/sys/arch/sparc/include/reg.h
@@ -1,4 +1,4 @@
-/*	$NetBSD: reg.h,v 1.10 2018/01/14 11:55:33 martin Exp $ */
+/*	$NetBSD: reg.h,v 1.11 2018/01/15 10:06:49 martin Exp $ */
 
 /*
  * Copyright (c) 1992, 1993
@@ -106,18 +106,19 @@ struct fp_qentry {
 struct fpreg {
 	u_int	fr_regs[32];		/* our view is 32 32-bit registers */
 	int	fr_fsr;			/* %fsr */
-}
-#ifdef _KERNEL
- __aligned(8)				/* asm code uses std instructions */
-#endif
-;
+};
+
 struct fpstate {
 	struct fpreg fs_reg;
 #define fs_regs fs_reg.fr_regs
 #define fs_fsr	fs_reg.fr_fsr
 	int	fs_qsize;		/* actual queue depth */
 	struct	fp_qentry fs_queue[FP_QSIZE];	/* queue contents */
-};
+}
+#ifdef _KERNEL
+ __aligned(8)				/* asm code uses std instructions */
+#endif
+;
 
 /*
  * The actual FP registers are made accessible (c.f. ptrace(2)) through