Clean up deleted files.
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/*
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* if_sunie.h
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*
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* sun's ie interface
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*/
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/*
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* programming notes:
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*
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* the ie chip operates in a 24 bit address space.
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*
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* most ie interfaces appear to be divided into two parts:
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* - generic 586 stuff
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* - board specific
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*
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* generic:
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* the generic stuff of the ie chip is all done with data structures
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* that live in the chip's memory address space. the chip expects
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* its main data structure (the sys conf ptr -- SCP) to be at a fixed
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* address in its 24 bit space: 0xfffff4
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*
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* the SCP points to another structure called the ISCP.
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* the ISCP points to another structure called the SCB.
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* the SCB has a status field, a linked list of "commands", and
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* a linked list of "receive buffers". these are data structures that
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* live in memory, not registers.
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*
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* board:
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* to get the chip to do anything, you first put a command in the
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* command data structure list. then you have to signal "attention"
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* to the chip to get it to look at the command. how you
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* signal attention depends on what board you have... on PC's
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* there is an i/o port number to do this, on sun's there is a
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* register bit you toggle.
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*
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* to get data from the chip you program it to interrupt...
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*
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*
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* sun issues:
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*
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* there are 3 kinds of sun "ie" interfaces:
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* 1 - a VME/multibus card
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* 2 - an on-board interface (sun3's, sun-4/100's, and sun-4/200's)
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* 3 - another VME board called the 3E
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*
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* the VME boards lives in vme16 space. only 16 and 8 bit accesses
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* are allowed, so functions that copy data must be aware of this.
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*
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* the chip is an intel chip. this means that the byte order
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* on all the "short"s in the chip's data structures is wrong.
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* so, constants described in the intel docs are swapped for the sun.
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* that means that any buffer pointers you give the chip must be
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* swapped to intel format. yuck.
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*
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* VME/multibus interface:
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* for the multibus interface the board ignores the top 4 bits
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* of the chip address. the multibus interface seems to have its
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* own MMU like page map (without protections or valid bits, etc).
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* there are 256 pages of physical memory on the board (each page
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* is 1024 bytes). there are 1024 slots in the page map. so,
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* a 1024 byte page takes up 10 bits of address for the offset,
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* and if there are 1024 slots in the page that is another 10 bits
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* of the address. that makes a 20 bit address, and as stated
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* earlier the board ignores the top 4 bits, so that accounts
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* for all 24 bits of address.
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*
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* note that the last entry of the page map maps the top of the
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* 24 bit address space and that the SCP is supposed to be at
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* 0xfffff4 (taking into account allignment). so,
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* for multibus, that entry in the page map has to be used for the SCP.
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*
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* the page map effects BOTH how the ie chip sees the
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* memory, and how the host sees it.
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*
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* the page map is part of the "register" area of the board
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*
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* on-board interface:
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*
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* <fill in useful info later>
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*
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*
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* VME3E interface:
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*
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* <fill in useful info later>
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*
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*/
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/*
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* PART 1: VME/multibus defs
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*/
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#define IEVME_PAGESIZE 1024 /* bytes */
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#define IEVME_PAGSHIFT 10 /* bits */
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#define IEVME_NPAGES 256 /* number of pages on chip */
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#define IEVME_MAPSZ 1024 /* number of entries in the map */
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/*
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* PTE for the page map
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*/
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#define IEVME_SBORDR 0x8000 /* sun byte order */
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#define IEVME_IBORDR 0x0000 /* intel byte ordr */
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#define IEVME_P2MEM 0x2000 /* memory is on P2 */
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#define IEVME_OBMEM 0x0000 /* memory is on board */
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#define IEVME_PGMASK 0x0fff /* gives the physical page frame number */
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struct ievme {
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u_short pgmap[IEVME_MAPSZ];
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u_short xxx[32]; /* prom */
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u_short status; /* see below for bits */
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u_short xxx2; /* filler */
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u_short pectrl; /* parity control (see below) */
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u_short peaddr; /* low 16 bits of address */
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};
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/*
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* status bits
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*/
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#define IEVME_RESET 0x8000 /* reset board */
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#define IEVME_ONAIR 0x4000 /* go out of loopback 'on-air' */
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#define IEVME_ATTEN 0x2000 /* attention */
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#define IEVME_IENAB 0x1000 /* interrupt enable */
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#define IEVME_PEINT 0x0800 /* parity error interrupt enable */
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#define IEVME_PERR 0x0200 /* parity error flag */
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#define IEVME_INT 0x0100 /* interrupt flag */
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#define IEVME_P2EN 0x0020 /* enable p2 bus */
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#define IEVME_256K 0x0010 /* 256kb rams */
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#define IEVME_HADDR 0x000f /* mask for bits 17-20 of address */
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/*
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* parity control
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*/
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#define IEVME_PARACK 0x0100 /* parity error ack */
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#define IEVME_PARSRC 0x0080 /* parity error source */
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#define IEVME_PAREND 0x0040 /* which end of the data got the error */
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#define IEVME_PARADR 0x000f /* mask to get bits 17-20 of parity address */
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/*
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* PART 2: the on-board interface
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*/
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struct ieob {
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u_char obctrl;
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};
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#define IEOB_NORSET 0x80 /* don't reset the board */
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#define IEOB_ONAIR 0x40 /* put us on the air */
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#define IEOB_ATTEN 0x20 /* attention! */
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#define IEOB_IENAB 0x10 /* interrupt enable */
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#define IEOB_XXXXX 0x08 /* free bit */
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#define IEOB_XCVRL2 0x04 /* level 2 transceiver? */
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#define IEOB_BUSERR 0x02 /* bus error */
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#define IEOB_INT 0x01 /* interrupt */
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/*
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* PART 3: the 3E board
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*/
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/*
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* not supported (yet?)
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*/
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