remove unused cache operations, we now use shared m68k/cacheops.c
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dbj
parent
856e0a920e
commit
1e812ee6cf
@ -1,4 +1,4 @@
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/* $NetBSD: locore.s,v 1.28 2000/11/26 11:47:26 jdolecek Exp $ */
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/* $NetBSD: locore.s,v 1.29 2001/04/05 04:23:56 dbj Exp $ */
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/*
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* Copyright (c) 1998 Darrin B. Jewell
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@ -1352,307 +1352,6 @@ Lsldone:
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rts
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#endif
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#if 0 /* @@@{ use m68k/cacheops.c */
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/*
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* Invalidate entire TLB.
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*/
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ENTRY(TBIA)
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_C_LABEL(_TBIA):
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#if defined(M68040)
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cmpl #MMU_68040,_C_LABEL(mmutype) | 68040?
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jne Lmotommu3 | no, skip
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.word 0xf518 | yes, pflusha
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rts
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Lmotommu3:
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#endif
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#if defined(M68K_MMU_MOTOROLA)
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tstl _C_LABEL(mmutype) | HP MMU?
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jeq Lhpmmu6 | yes, skip
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pflusha | flush entire TLB
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jpl Lmc68851a | 68851 implies no d-cache
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movl #DC_CLEAR,%d0
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movc %d0,%cacr | invalidate on-chip d-cache
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Lmc68851a:
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rts
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Lhpmmu6:
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#endif
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#if defined(M68K_MMU_HP)
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MMUADDR(%a0)
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movl %a0@(MMUTBINVAL),%sp@- | do not ask me, this
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addql #4,%sp | is how hpux does it
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#ifdef DEBUG
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tstl _ASM_LABEL(fullcflush)
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jne _C_LABEL(_DCIA) | XXX: invalidate entire cache
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#endif
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#endif
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rts
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/*
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* Invalidate any TLB entry for given VA (TB Invalidate Single)
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*/
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ENTRY(TBIS)
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#ifdef DEBUG
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tstl _ASM_LABEL(fulltflush) | being conservative?
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jne _C_LABEL(_TBIA) | yes, flush entire TLB
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#endif
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#if defined(M68040)
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cmpl #MMU_68040,_C_LABEL(mmutype) | 68040?
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jne Lmotommu4 | no, skip
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movl %sp@(4),%a0
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movc dfc,%d1
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moveq #1,%d0 | user space
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movc %d0,dfc
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.word 0xf508 | pflush %a0@
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moveq #5,%d0 | super space
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movc %d0,dfc
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.word 0xf508 | pflush %a0@
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movc %d1,dfc
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rts
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Lmotommu4:
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#endif
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#if defined(M68K_MMU_MOTOROLA)
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tstl _C_LABEL(mmutype) | HP MMU?
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jeq Lhpmmu5 | yes, skip
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movl %sp@(4),%a0 | get addr to flush
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jpl Lmc68851b | is 68851?
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pflush #0,#0,%a0@ | flush address from both sides
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movl #DC_CLEAR,%d0
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movc %d0,%cacr | invalidate on-chip data cache
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rts
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Lmc68851b:
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pflushs #0,#0,%a0@ | flush address from both sides
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rts
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Lhpmmu5:
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#endif
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#if defined(M68K_MMU_HP)
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movl %sp@(4),%d0 | VA to invalidate
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bclr #0,%d0 | ensure even
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movl %d0,%a0
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movw %sr,%d1 | go critical
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movw #PSL_HIGHIPL,%sr | while in purge space
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moveq #FC_PURGE,%d0 | change address space
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movc %d0,dfc | for destination
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moveq #0,%d0 | zero to invalidate?
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movsl %d0,%a0@ | hit it
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moveq #FC_USERD,%d0 | back to old
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movc %d0,dfc | address space
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movw %d1,%sr | restore IPL
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#endif
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rts
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/*
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* Invalidate supervisor side of TLB
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*/
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ENTRY(TBIAS)
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#ifdef DEBUG
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tstl _ASM_LABEL(fulltflush) | being conservative?
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jne _C_LABEL(_TBIA) | yes, flush everything
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#endif
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#if defined(M68040)
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cmpl #MMU_68040,_C_LABEL(mmutype) | 68040?
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jne Lmotommu5 | no, skip
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.word 0xf518 | yes, pflusha (for now) XXX
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rts
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Lmotommu5:
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#endif
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#if defined(M68K_MMU_MOTOROLA)
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tstl _C_LABEL(mmutype) | HP MMU?
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jeq Lhpmmu7 | yes, skip
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jpl Lmc68851c | 68851?
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pflush #4,#4 | flush supervisor TLB entries
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movl #DC_CLEAR,%d0
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movc %d0,%cacr | invalidate on-chip d-cache
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rts
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Lmc68851c:
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pflushs #4,#4 | flush supervisor TLB entries
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rts
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Lhpmmu7:
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#endif
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#if defined(M68K_MMU_HP)
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MMUADDR(%a0)
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movl #0x8000,%d0 | more
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movl %d0,%a0@(MMUTBINVAL) | HP magic
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#ifdef DEBUG
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tstl _ASM_LABEL(fullcflush)
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jne _C_LABEL(_DCIS) | XXX: invalidate entire sup. cache
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#endif
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#endif
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rts
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/*
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* Invalidate user side of TLB
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*/
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ENTRY(TBIAU)
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#ifdef DEBUG
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tstl _ASM_LABEL(fulltflush) | being conservative?
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jne _C_LABEL(_TBIA) | yes, flush everything
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#endif
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#if defined(M68040)
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cmpl #MMU_68040,_C_LABEL(mmutype) | 68040?
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jne Lmotommu6 | no, skip
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.word 0xf518 | yes, pflusha (for now) XXX
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rts
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Lmotommu6:
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#endif
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#if defined(M68K_MMU_MOTOROLA)
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tstl _C_LABEL(mmutype) | HP MMU?
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jeq Lhpmmu8 | yes, skip
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jpl Lmc68851d | 68851?
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pflush #0,#4 | flush user TLB entries
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movl #DC_CLEAR,%d0
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movc %d0,%cacr | invalidate on-chip d-cache
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rts
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Lmc68851d:
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pflushs #0,#4 | flush user TLB entries
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rts
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Lhpmmu8:
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#endif
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#if defined(M68K_MMU_HP)
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MMUADDR(%a0)
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moveq #0,%d0 | more
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movl %d0,%a0@(MMUTBINVAL) | HP magic
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#ifdef DEBUG
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tstl _ASM_LABEL(fullcflush)
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jne _C_LABEL(_DCIU) | XXX: invalidate entire user cache
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#endif
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#endif
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rts
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/*
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* Invalidate instruction cache
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*/
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ENTRY(ICIA)
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#if defined(M68040)
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ENTRY(ICPA)
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cmpl #MMU_68040,_C_LABEL(mmutype) | 68040
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jne Lmotommu7 | no, skip
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.word 0xf498 | cinva ic
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rts
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Lmotommu7:
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#endif
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movl #IC_CLEAR,%d0
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movc %d0,%cacr | invalidate i-cache
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rts
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/*
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* Invalidate data cache.
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* HP external cache allows for invalidation of user/supervisor portions.
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* NOTE: we do not flush 68030 on-chip cache as there are no aliasing
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* problems with DC_WA. The only cases we have to worry about are context
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* switch and TLB changes, both of which are handled "in-line" in resume
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* and TBI*.
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*/
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ENTRY(DCIA)
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__DCIA:
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#if defined(M68040)
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cmpl #MMU_68040,_C_LABEL(mmutype) | 68040
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jne Lmotommu8 | no, skip
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/* XXX implement */
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rts
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Lmotommu8:
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#endif
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#if defined(M68K_MMU_HP)
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tstl _C_LABEL(ectype) | got external VAC?
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jle Lnocache2 | no, all done
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MMUADDR(%a0)
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andl #~MMU_CEN,%a0@(MMUCMD) | disable cache in MMU control reg
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orl #MMU_CEN,%a0@(MMUCMD) | reenable cache in MMU control reg
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Lnocache2:
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#endif
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rts
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ENTRY(DCIS)
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_C_LABEL(_DCIS):
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#if defined(M68040)
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cmpl #MMU_68040,_C_LABEL(mmutype) | 68040
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jne Lmotommu9 | no, skip
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/* XXX implement */
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rts
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Lmotommu9:
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#endif
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#if defined(M68K_MMU_HP)
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tstl _C_LABEL(ectype) | got external VAC?
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jle Lnocache3 | no, all done
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MMUADDR(%a0)
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movl %a0@(MMUSSTP),%d0 | read the supervisor STP
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movl %d0,%a0@(MMUSSTP) | write it back
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Lnocache3:
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#endif
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rts
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ENTRY(DCIU)
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_C_LABEL(_DCIU):
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#if defined(M68040)
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cmpl #MMU_68040,_C_LABEL(mmutype) | 68040
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jne LmotommuA | no, skip
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/* XXX implement */
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rts
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LmotommuA:
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#endif
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#if defined(M68K_MMU_HP)
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tstl _C_LABEL(ectype) | got external VAC?
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jle Lnocache4 | no, all done
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MMUADDR(%a0)
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movl %a0@(MMUUSTP),%d0 | read the user STP
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movl %d0,%a0@(MMUUSTP) | write it back
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Lnocache4:
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#endif
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rts
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#if defined(M68040)
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ENTRY(ICPL)
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movl %sp@(4),%a0 | address
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.word 0xf488 | cinvl ic,%a0@
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rts
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ENTRY(ICPP)
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movl %sp@(4),%a0 | address
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.word 0xf490 | cinvp ic,%a0@
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rts
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ENTRY(DCPL)
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movl %sp@(4),%a0 | address
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.word 0xf448 | cinvl dc,%a0@
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rts
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ENTRY(DCPP)
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movl %sp@(4),%a0 | address
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.word 0xf450 | cinvp dc,%a0@
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rts
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ENTRY(DCPA)
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.word 0xf458 | cinva dc
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rts
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ENTRY(DCFL)
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movl %sp@(4),%a0 | address
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.word 0xf468 | cpushl dc,%a0@
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rts
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ENTRY(DCFP)
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movl %sp@(4),%a0 | address
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.word 0xf470 | cpushp dc,%a0@
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rts
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#endif
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ENTRY(PCIA)
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#if defined(M68040)
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ENTRY(DCFA)
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cmpl #MMU_68040,_C_LABEL(mmutype) | 68040
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jne LmotommuB | no, skip
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.word 0xf478 | cpusha dc
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rts
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LmotommuB:
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#endif
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#if defined(M68K_MMU_MOTOROLA)
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movl #DC_CLEAR,%d0
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movc %d0,%cacr | invalidate on-chip d-cache
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#if defined(ENABLE_HP_CODE)
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tstl _C_LABEL(ectype) | got external PAC?
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jge Lnocache6 | no, all done
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MMUADDR(%a0)
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andl #~MMU_CEN,%a0@(MMUCMD) | disable cache in MMU control reg
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orl #MMU_CEN,%a0@(MMUCMD) | reenable cache in MMU control reg
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Lnocache6:
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#endif
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#endif
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rts
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#endif /* }@@@ use m68k/cacheops.c */
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#if defined(ENABLE_HP_CODE)
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ENTRY(ecacheon)
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tstl _C_LABEL(ectype)
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