New files for the changed interrupt code. i8259.c deals with some of
the old ('legacy') i8259 code, intr.c now contains the bulk of
the interrupt establish/disestablish code.
This commit is contained in:
fvdl
parent
0caa98d6b8
commit
1db3b7489b
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@ -0,0 +1,247 @@
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/* $NetBSD: i8259.c,v 1.1 2002/11/22 15:05:23 fvdl Exp $ */
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/*
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* Copyright 2002 (c) Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Frank van der Linden for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed for the NetBSD Project by
|
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* Wasabi Systems, Inc.
|
||||
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
|
||||
* or promote products derived from this software without specific prior
|
||||
* written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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||||
* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 1991 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
|
||||
* are met:
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||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)isa.c 7.2 (Berkeley) 5/13/91
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/proc.h>
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#include <dev/isa/isareg.h>
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#include <machine/pio.h>
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#include <machine/cpufunc.h>
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#include <machine/cpu.h>
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#include <machine/pic.h>
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#include <machine/i8259.h>
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#if NMCA > 0
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#include <machine/mca_machdep.h> /* for MCA_system */
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#endif
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static void i8259_hwmask(struct pic *, int);
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static void i8259_hwunmask(struct pic *, int);
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static void i8259_setup(struct pic *, struct cpu_info *, int, int, int);
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static void i8259_reinit_irqs(void);
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unsigned i8259_imen;
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/*
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* Perhaps this should be made into a real device.
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*/
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struct pic i8259_pic = {
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{0, {NULL}, NULL, NULL, NULL, 0, "pic0", NULL, 0},
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PIC_I8259,
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__SIMPLELOCK_UNLOCKED,
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i8259_hwmask,
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i8259_hwunmask,
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i8259_setup,
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i8259_setup,
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i8259_stubs,
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i8259_stubs,
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};
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void
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i8259_default_setup(void)
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{
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#if NMCA > 0
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/* level-triggered interrupts on MCA PS/2s */
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if (MCA_system)
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outb(IO_ICU1, 0x19); /* reset; program device, four bytes */
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else
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#endif
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outb(IO_ICU1, 0x11); /* reset; program device, four bytes */
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outb(IO_ICU1+1, ICU_OFFSET); /* starting at this vector index */
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outb(IO_ICU1+1, 1 << IRQ_SLAVE); /* slave on line 2 */
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#ifdef AUTO_EOI_1
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outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */
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#else
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outb(IO_ICU1+1, 1); /* 8086 mode */
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#endif
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outb(IO_ICU1+1, 0xff); /* leave interrupts masked */
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outb(IO_ICU1, 0x68); /* special mask mode (if available) */
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outb(IO_ICU1, 0x0a); /* Read IRR by default. */
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#ifdef REORDER_IRQ
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outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */
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#endif
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#if NMCA > 0
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/* level-triggered interrupts on MCA PS/2s */
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if (MCA_system)
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outb(IO_ICU2, 0x19); /* reset; program device, four bytes */
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else
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#endif
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outb(IO_ICU2, 0x11); /* reset; program device, four bytes */
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outb(IO_ICU2+1, ICU_OFFSET+8); /* staring at this vector index */
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outb(IO_ICU2+1, IRQ_SLAVE);
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#ifdef AUTO_EOI_2
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outb(IO_ICU2+1, 2 | 1); /* auto EOI, 8086 mode */
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#else
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outb(IO_ICU2+1, 1); /* 8086 mode */
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#endif
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outb(IO_ICU2+1, 0xff); /* leave interrupts masked */
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outb(IO_ICU2, 0x68); /* special mask mode (if available) */
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outb(IO_ICU2, 0x0a); /* Read IRR by default. */
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}
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static void
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i8259_hwmask(struct pic *pic, int pin)
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{
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unsigned port;
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u_int8_t byte;
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i8259_imen |= (1 << pin);
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#ifdef PIC_MASKDELAY
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delay(10);
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#endif
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if (pin > 7) {
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port = IO_ICU2 + 1;
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byte = i8259_imen >> 8;
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} else {
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port = IO_ICU1 + 1;
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byte = i8259_imen & 0xff;
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}
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outb(port, byte);
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}
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static void
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i8259_hwunmask(struct pic *pic, int pin)
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{
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unsigned port;
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u_int8_t byte;
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disable_intr(); /* XXX */
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i8259_imen &= ~(1 << pin);
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#ifdef PIC_MASKDELAY
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delay(10);
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#endif
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if (pin > 7) {
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port = IO_ICU2 + 1;
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byte = i8259_imen >> 8;
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} else {
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port = IO_ICU1 + 1;
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byte = i8259_imen & 0xff;
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}
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outb(port, byte);
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enable_intr();
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}
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static void
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i8259_reinit_irqs(void)
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{
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int irqs, irq;
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struct cpu_info *ci = &cpu_info_primary;
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irqs = 0;
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for (irq = 0; irq < NUM_LEGACY_IRQS; irq++)
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if (ci->ci_isources[irq] != NULL)
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irqs |= 1 << irq;
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if (irqs >= 0x100) /* any IRQs >= 8 in use */
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irqs |= 1 << IRQ_SLAVE;
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i8259_imen = ~irqs;
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outb(IO_ICU1 + 1, i8259_imen);
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outb(IO_ICU2 + 1, i8259_imen >> 8);
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}
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static void
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i8259_setup(struct pic *pic, struct cpu_info *ci, int pin, int idtvec, int type)
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{
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if (CPU_IS_PRIMARY(ci))
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i8259_reinit_irqs();
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}
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void
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i8259_reinit(void)
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{
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i8259_default_setup();
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i8259_reinit_irqs();
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}
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unsigned
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i8259_setmask(unsigned mask)
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{
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unsigned old = i8259_imen;
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i8259_imen = mask;
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outb(IO_ICU1 + 1, i8259_imen);
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outb(IO_ICU2 + 1, i8259_imen >> 8);
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return old;
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}
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@ -0,0 +1,691 @@
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/* $NetBSD: intr.c,v 1.1 2002/11/22 15:05:24 fvdl Exp $ */
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/*
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* Copyright 2002 (c) Wasabi Systems, Inc.
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* All rights reserved.
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||||
*
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* Written by Frank van der Linden for Wasabi Systems, Inc.
|
||||
*
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||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed for the NetBSD Project by
|
||||
* Wasabi Systems, Inc.
|
||||
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
|
||||
* or promote products derived from this software without specific prior
|
||||
* written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
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||||
*/
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#include "opt_multiprocessor.h"
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#include <sys/cdefs.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/proc.h>
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#include <sys/errno.h>
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#include <machine/i8259.h>
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#include <machine/cpu.h>
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#include <machine/pio.h>
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#include "ioapic.h"
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#include "lapic.h"
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#if NIOAPIC > 0
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#include <machine/i82093var.h>
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#include <machine/mpbiosvar.h>
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#endif
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#include "mca.h"
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#if NMCA > 0
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#include <machine/mca_machdep.h> /* for MCA_system */
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#endif
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#if NLAPIC > 0
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#include <machine/i82489var.h>
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#endif
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struct pic softintr_pic = {
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{0, {0}, NULL, NULL, NULL, 0, "softintr_fakepic", NULL, 0},
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PIC_SOFT,
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__SIMPLELOCK_UNLOCKED,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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};
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/*
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* Fill in default interrupt table (in case of spurious interrupt
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* during configuration of kernel), setup interrupt control unit
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*/
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void
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intr_default_setup(void)
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{
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int i;
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/* icu vectors */
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for (i = 0; i < NUM_LEGACY_IRQS; i++) {
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idt_allocmap[ICU_OFFSET + i] = 1;
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setgate(&idt[ICU_OFFSET + i].gd,
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i8259_stubs[i].ist_entry, 0, SDT_SYS386IGT,
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SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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}
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/*
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* Eventually might want to check if it's actually there.
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*/
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i8259_default_setup();
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}
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/*
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* Handle a NMI, possibly a machine check.
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* return true to panic system, false to ignore.
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*/
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int
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i386_nmi(void)
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{
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log(LOG_CRIT, "NMI port 61 %x, port 70 %x\n", inb(0x61), inb(0x70));
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return(0);
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}
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/*
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* Caught a stray interrupt, notify
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*/
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void
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i386_strayintr(int irq)
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{
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static u_long strays;
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/*
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* Stray interrupts on irq 7 occur when an interrupt line is raised
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* and then lowered before the CPU acknowledges it. This generally
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* means either the device is screwed or something is cli'ing too
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* long and it's timing out.
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*/
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if (++strays <= 5)
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log(LOG_ERR, "stray interrupt %d%s\n", irq,
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strays >= 5 ? "; stopped logging" : "");
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}
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/*
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* Recalculate the interrupt masks from scratch.
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*/
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void
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intr_calculatemasks(struct cpu_info *ci)
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{
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int irq, level, unusedirqs, intrlevel[MAX_INTR_SOURCES];
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struct intrhand *q;
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/* First, figure out which levels each IRQ uses. */
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unusedirqs = 0xffffffff;
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for (irq = 0; irq < MAX_INTR_SOURCES; irq++) {
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int levels = 0;
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if (ci->ci_isources[irq] == NULL) {
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intrlevel[irq] = 0;
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continue;
|
||||
}
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for (q = ci->ci_isources[irq]->is_handlers; q; q = q->ih_next)
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levels |= 1 << q->ih_level;
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intrlevel[irq] = levels;
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if (levels)
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unusedirqs &= ~(1 << irq);
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}
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/* Then figure out which IRQs use each level. */
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||||
for (level = 0; level < NIPL; level++) {
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int irqs = 0;
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for (irq = 0; irq < MAX_INTR_SOURCES; irq++)
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if (intrlevel[irq] & (1 << level))
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irqs |= 1 << irq;
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ci->ci_imask[level] = irqs | unusedirqs;
|
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}
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|
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for (level = 0; level<(NIPL-1); level++)
|
||||
ci->ci_imask[level+1] |= ci->ci_imask[level];
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|
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for (irq = 0; irq < MAX_INTR_SOURCES; irq++) {
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int maxlevel = IPL_NONE;
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int minlevel = IPL_HIGH;
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|
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if (ci->ci_isources[irq] == NULL)
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continue;
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for (q = ci->ci_isources[irq]->is_handlers; q;
|
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q = q->ih_next) {
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if (q->ih_level < minlevel)
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minlevel = q->ih_level;
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if (q->ih_level > maxlevel)
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maxlevel = q->ih_level;
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}
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ci->ci_isources[irq]->is_maxlevel = maxlevel;
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ci->ci_isources[irq]->is_minlevel = minlevel;
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}
|
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|
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for (level = 0; level < NIPL; level++)
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ci->ci_iunmask[level] = ~ci->ci_imask[level];
|
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}
|
||||
|
||||
|
||||
/*
|
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* XXX if defined(MULTIPROCESSOR) && .. ?
|
||||
*/
|
||||
#if NIOAPIC > 0
|
||||
int
|
||||
intr_find_mpmapping(int bus, int pin, int *handle)
|
||||
{
|
||||
struct mp_intr_map *mip;
|
||||
|
||||
if (bus == -1 || mp_busses[bus].mb_intrs == NULL)
|
||||
return ENOENT;
|
||||
|
||||
for (mip = mp_busses[bus].mb_intrs; mip != NULL; mip=mip->next) {
|
||||
if (mip->bus_pin == pin) {
|
||||
*handle = mip->ioapic_ih;
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
return ENOENT;
|
||||
}
|
||||
#endif
|
||||
|
||||
int
|
||||
intr_allocate_slot_cpu(struct cpu_info *ci, struct pic *pic, int pin,
|
||||
int *index)
|
||||
{
|
||||
int start, slot, i;
|
||||
struct intrsource *isp;
|
||||
|
||||
start = CPU_IS_PRIMARY(ci) ? NUM_LEGACY_IRQS : 0;
|
||||
slot = -1;
|
||||
|
||||
simple_lock(&ci->ci_slock);
|
||||
for (i = start; i < MAX_INTR_SOURCES ; i++) {
|
||||
isp = ci->ci_isources[i];
|
||||
if (isp != NULL && isp->is_pic == pic && isp->is_pin == pin) {
|
||||
slot = i;
|
||||
break;
|
||||
}
|
||||
if (isp == NULL && slot == -1) {
|
||||
slot = i;
|
||||
continue;
|
||||
}
|
||||
}
|
||||
if (slot == -1) {
|
||||
simple_unlock(&ci->ci_slock);
|
||||
return EBUSY;
|
||||
}
|
||||
|
||||
isp = ci->ci_isources[slot];
|
||||
if (isp == NULL) {
|
||||
MALLOC(isp, struct intrsource *, sizeof (struct intrsource),
|
||||
M_DEVBUF, M_NOWAIT|M_ZERO);
|
||||
if (isp == NULL) {
|
||||
simple_unlock(&ci->ci_slock);
|
||||
return ENOMEM;
|
||||
}
|
||||
snprintf(isp->is_evname, sizeof (isp->is_evname),
|
||||
"pin %d", pin);
|
||||
evcnt_attach_dynamic(&isp->is_evcnt, EVCNT_TYPE_INTR, NULL,
|
||||
pic->pic_dev.dv_xname, isp->is_evname);
|
||||
ci->ci_isources[slot] = isp;
|
||||
}
|
||||
simple_unlock(&ci->ci_slock);
|
||||
|
||||
*index = slot;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* A simple round-robin allocator to assign interrupts to CPUs.
|
||||
*/
|
||||
int
|
||||
intr_allocate_slot(struct pic *pic, int legacy_irq, int pin, int level,
|
||||
struct cpu_info **cip, int *index, int *idt_slot)
|
||||
{
|
||||
CPU_INFO_ITERATOR cii;
|
||||
struct cpu_info *ci;
|
||||
struct intrsource *isp;
|
||||
int slot, idtvec, error;
|
||||
|
||||
/*
|
||||
* If a legacy IRQ is wanted, try to use a fixed slot pointing
|
||||
* at the primary CPU. In the case of IO APICs, multiple pins
|
||||
* may map to one legacy IRQ, but they should not be shared
|
||||
* in that case, so the first one gets the legacy slot, but
|
||||
* a subsequent allocation with a different pin will get
|
||||
* a different slot.
|
||||
*/
|
||||
if (legacy_irq != -1) {
|
||||
ci = &cpu_info_primary;
|
||||
slot = legacy_irq;
|
||||
isp = ci->ci_isources[slot];
|
||||
if (isp == NULL) {
|
||||
MALLOC(isp, struct intrsource *,
|
||||
sizeof (struct intrsource), M_DEVBUF,
|
||||
M_NOWAIT|M_ZERO);
|
||||
if (isp == NULL)
|
||||
return ENOMEM;
|
||||
snprintf(isp->is_evname, sizeof (isp->is_evname),
|
||||
"pin %d", pin);
|
||||
evcnt_attach_dynamic(&isp->is_evcnt, EVCNT_TYPE_INTR,
|
||||
NULL, pic->pic_dev.dv_xname, isp->is_evname);
|
||||
simple_lock(&ci->ci_slock);
|
||||
ci->ci_isources[slot] = isp;
|
||||
simple_unlock(&ci->ci_slock);
|
||||
} else {
|
||||
if (isp->is_pin != pin) {
|
||||
if (pic == &i8259_pic)
|
||||
return EINVAL;
|
||||
goto other;
|
||||
}
|
||||
}
|
||||
|
||||
if (pic == &i8259_pic)
|
||||
idtvec = ICU_OFFSET + legacy_irq;
|
||||
else {
|
||||
#ifdef IOAPIC_HWMASK
|
||||
if (level > isp->is_maxlevel) {
|
||||
#else
|
||||
if (isp->is_minlevel == 0 || level < isp->is_minlevel) {
|
||||
#endif
|
||||
idtvec = idt_vec_alloc(APIC_LEVEL(level),
|
||||
IDT_INTR_HIGH);
|
||||
if (idtvec == 0)
|
||||
return EBUSY;
|
||||
} else
|
||||
idtvec = isp->is_idtvec;
|
||||
}
|
||||
} else {
|
||||
other:
|
||||
/*
|
||||
* Otherwise, look for a free slot elsewhere. Do the primary
|
||||
* CPU first.
|
||||
*/
|
||||
ci = &cpu_info_primary;
|
||||
error = intr_allocate_slot_cpu(ci, pic, pin, &slot);
|
||||
if (error == 0)
|
||||
goto found;
|
||||
|
||||
/*
|
||||
* ..now try the others.
|
||||
*/
|
||||
for (CPU_INFO_FOREACH(cii, ci)) {
|
||||
if (CPU_IS_PRIMARY(ci))
|
||||
continue;
|
||||
error = intr_allocate_slot_cpu(ci, pic, pin, &slot);
|
||||
if (error == 0)
|
||||
goto found;
|
||||
}
|
||||
return EBUSY;
|
||||
found:
|
||||
idtvec = idt_vec_alloc(APIC_LEVEL(level), IDT_INTR_HIGH);
|
||||
if (idtvec == 0) {
|
||||
simple_lock(&ci->ci_slock);
|
||||
FREE(ci->ci_isources[slot], M_DEVBUF);
|
||||
ci->ci_isources[slot] = NULL;
|
||||
simple_unlock(&ci->ci_slock);
|
||||
return EBUSY;
|
||||
}
|
||||
}
|
||||
*idt_slot = idtvec;
|
||||
*index = slot;
|
||||
*cip = ci;
|
||||
return 0;
|
||||
}
|
||||
|
||||
void *
|
||||
intr_establish(int legacy_irq, struct pic *pic, int pin, int type, int level,
|
||||
int (*handler)(void *), void *arg)
|
||||
{
|
||||
struct intrhand **p, *q, *ih;
|
||||
struct cpu_info *ci;
|
||||
int slot, error, idt_vec;
|
||||
struct intrsource *source;
|
||||
struct intrstub *stubp;
|
||||
|
||||
#ifdef DIAGNOSTIC
|
||||
if (legacy_irq != -1 && (legacy_irq < 0 || legacy_irq > 15))
|
||||
panic("intr_establish: bad legacy IRQ value");
|
||||
|
||||
if (legacy_irq == -1 && pic == &i8259_pic)
|
||||
panic("intr_establish: non-legacy IRQ on i8259");
|
||||
#endif
|
||||
|
||||
error = intr_allocate_slot(pic, legacy_irq, pin, level, &ci, &slot,
|
||||
&idt_vec);
|
||||
if (error != 0) {
|
||||
printf("failed to allocate interrupt slot for PIC %s pin %d\n",
|
||||
pic->pic_dev.dv_xname, pin);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/* no point in sleeping unless someone can free memory. */
|
||||
ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK);
|
||||
if (ih == NULL) {
|
||||
printf("intr_establish: can't allocate malloc handler info\n");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
source = ci->ci_isources[slot];
|
||||
|
||||
if (source->is_handlers != NULL &&
|
||||
source->is_pic->pic_type != pic->pic_type) {
|
||||
free(ih, M_DEVBUF);
|
||||
printf("intr_establish: can't share intr source between "
|
||||
"different PIC types (legacy_irq %d pin %d slot %d)\n",
|
||||
legacy_irq, pin, slot);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
simple_lock(&ci->ci_slock);
|
||||
|
||||
source->is_pin = pin;
|
||||
source->is_pic = pic;
|
||||
|
||||
switch (source->is_type) {
|
||||
case IST_NONE:
|
||||
source->is_type = type;
|
||||
break;
|
||||
case IST_EDGE:
|
||||
case IST_LEVEL:
|
||||
if (source->is_type == type)
|
||||
break;
|
||||
case IST_PULSE:
|
||||
if (type != IST_NONE) {
|
||||
simple_unlock(&ci->ci_slock);
|
||||
printf("intr_establish: pic %s pin %d: can't share "
|
||||
"type %d with %d\n", pic->pic_name, pin,
|
||||
source->is_type, type);
|
||||
free(ih, M_DEVBUF);
|
||||
return NULL;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
simple_unlock(&ci->ci_slock);
|
||||
panic("intr_establish: bad intr type %d for pic %s pin %d\n",
|
||||
source->is_type, pic->pic_dev.dv_xname, pin);
|
||||
}
|
||||
|
||||
if (!cold)
|
||||
pic->pic_hwmask(pic, pin);
|
||||
|
||||
/*
|
||||
* Figure out where to put the handler.
|
||||
* This is O(N^2), but we want to preserve the order, and N is
|
||||
* generally small.
|
||||
*/
|
||||
for (p = &ci->ci_isources[slot]->is_handlers;
|
||||
(q = *p) != NULL && q->ih_level > level;
|
||||
p = &q->ih_next)
|
||||
;
|
||||
|
||||
ih->ih_fun = handler;
|
||||
ih->ih_arg = arg;
|
||||
ih->ih_next = *p;
|
||||
ih->ih_level = level;
|
||||
ih->ih_pin = pin;
|
||||
ih->ih_cpu = ci;
|
||||
ih->ih_slot = slot;
|
||||
*p = ih;
|
||||
|
||||
intr_calculatemasks(ci);
|
||||
|
||||
simple_unlock(&ci->ci_slock);
|
||||
|
||||
if (ci->ci_isources[slot]->is_resume == NULL ||
|
||||
source->is_idtvec != idt_vec) {
|
||||
if (source->is_idtvec != 0 && source->is_idtvec != idt_vec)
|
||||
idt_vec_free(source->is_idtvec);
|
||||
source->is_idtvec = idt_vec;
|
||||
stubp = type == IST_LEVEL ?
|
||||
&pic->pic_level_stubs[slot] : &pic->pic_edge_stubs[slot];
|
||||
ci->ci_isources[slot]->is_resume = stubp->ist_resume;
|
||||
ci->ci_isources[slot]->is_recurse = stubp->ist_recurse;
|
||||
setgate(&idt[idt_vec].gd, stubp->ist_entry, 0, SDT_SYS386IGT,
|
||||
SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
|
||||
}
|
||||
|
||||
pic->pic_addroute(pic, ci, pin, idt_vec, type);
|
||||
|
||||
if (!cold)
|
||||
pic->pic_hwunmask(pic, pin);
|
||||
|
||||
#ifdef INTRDEBUG
|
||||
printf("allocated pic %s type %s pin %d level %d to cpu%u slot %d idt entry %d\n",
|
||||
pic->pic_name, type == IST_EDGE ? "edge" : "level", pin, level,
|
||||
(unsigned)ci->ci_cpuid, slot, idt_vec);
|
||||
#endif
|
||||
|
||||
return (ih);
|
||||
}
|
||||
|
||||
/*
|
||||
* Deregister an interrupt handler.
|
||||
*/
|
||||
void
|
||||
intr_disestablish(struct intrhand *ih)
|
||||
{
|
||||
struct intrhand **p, *q;
|
||||
struct cpu_info *ci;
|
||||
struct pic *pic;
|
||||
struct intrsource *source;
|
||||
int idtvec;
|
||||
|
||||
ci = ih->ih_cpu;
|
||||
pic = ci->ci_isources[ih->ih_slot]->is_pic;
|
||||
source = ci->ci_isources[ih->ih_slot];
|
||||
idtvec = source->is_idtvec;
|
||||
|
||||
simple_lock(&ci->ci_slock);
|
||||
pic->pic_hwmask(pic, ih->ih_pin);
|
||||
i386_atomic_clearbits_l(&ci->ci_ipending, (1 << ih->ih_slot));
|
||||
|
||||
/*
|
||||
* Remove the handler from the chain.
|
||||
*/
|
||||
for (p = &source->is_handlers; (q = *p) != NULL && q != ih;
|
||||
p = &q->ih_next)
|
||||
;
|
||||
if (q == NULL) {
|
||||
simple_unlock(&ci->ci_slock);
|
||||
panic("intr_disestablish: handler not registered");
|
||||
}
|
||||
|
||||
*p = q->ih_next;
|
||||
|
||||
intr_calculatemasks(ci);
|
||||
pic->pic_delroute(pic, ci, ih->ih_pin, idtvec, source->is_type);
|
||||
pic->pic_hwunmask(pic, ih->ih_pin);
|
||||
|
||||
#ifdef INTRDEBUG
|
||||
printf("cpu%lu: remove slot %d (pic %s pin %d vec %d)\n",
|
||||
ci->ci_cpuid, ih->ih_slot, pic->pic_dev.dv_xname, ih->ih_pin,
|
||||
idtvec);
|
||||
#endif
|
||||
|
||||
if (source->is_handlers == NULL) {
|
||||
evcnt_detach(&source->is_evcnt);
|
||||
FREE(source, M_DEVBUF);
|
||||
ci->ci_isources[ih->ih_slot] = NULL;
|
||||
if (pic != &i8259_pic)
|
||||
idt_vec_free(idtvec);
|
||||
}
|
||||
|
||||
free(ih, M_DEVBUF);
|
||||
|
||||
simple_unlock(&ci->ci_slock);
|
||||
}
|
||||
|
||||
#define CONCAT(x,y) __CONCAT(x,y)
|
||||
|
||||
/*
|
||||
* Fake interrupt handler structures for the benefit of symmetry with
|
||||
* other interrupt sources, and the benefit of intr_calculatemasks()
|
||||
*/
|
||||
struct intrhand fake_softclock_intrhand;
|
||||
struct intrhand fake_softnet_intrhand;
|
||||
struct intrhand fake_softserial_intrhand;
|
||||
struct intrhand fake_timer_intrhand;
|
||||
struct intrhand fake_ipi_intrhand;
|
||||
|
||||
#if NLAPIC > 0
|
||||
static char *i386_ipi_names[I386_NIPI] = I386_IPI_NAMES;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Initialize all handlers that aren't dynamically allocated, and exist
|
||||
* for each CPU.
|
||||
*/
|
||||
void
|
||||
cpu_intr_init(struct cpu_info *ci)
|
||||
{
|
||||
struct intrsource *isp;
|
||||
#if NLAPIC > 0
|
||||
int i;
|
||||
#endif
|
||||
|
||||
MALLOC(isp, struct intrsource *, sizeof (struct intrsource), M_DEVBUF,
|
||||
M_WAITOK|M_ZERO);
|
||||
if (isp == NULL)
|
||||
panic("can't allocate fixed interrupt source");
|
||||
isp->is_recurse = Xsoftclock;
|
||||
isp->is_resume = Xsoftclock;
|
||||
fake_softclock_intrhand.ih_level = IPL_SOFTCLOCK;
|
||||
isp->is_handlers = &fake_softclock_intrhand;
|
||||
isp->is_pic = &softintr_pic;
|
||||
ci->ci_isources[SIR_CLOCK] = isp;
|
||||
evcnt_attach_dynamic(&isp->is_evcnt, EVCNT_TYPE_INTR, NULL,
|
||||
ci->ci_dev->dv_xname, "softclock");
|
||||
|
||||
MALLOC(isp, struct intrsource *, sizeof (struct intrsource), M_DEVBUF,
|
||||
M_WAITOK|M_ZERO);
|
||||
if (isp == NULL)
|
||||
panic("can't allocate fixed interrupt source");
|
||||
isp->is_recurse = Xsoftnet;
|
||||
isp->is_resume = Xsoftnet;
|
||||
fake_softnet_intrhand.ih_level = IPL_SOFTNET;
|
||||
isp->is_handlers = &fake_softnet_intrhand;
|
||||
isp->is_pic = &softintr_pic;
|
||||
ci->ci_isources[SIR_NET] = isp;
|
||||
evcnt_attach_dynamic(&isp->is_evcnt, EVCNT_TYPE_INTR, NULL,
|
||||
ci->ci_dev->dv_xname, "softnet");
|
||||
|
||||
MALLOC(isp, struct intrsource *, sizeof (struct intrsource), M_DEVBUF,
|
||||
M_WAITOK|M_ZERO);
|
||||
if (isp == NULL)
|
||||
panic("can't allocate fixed interrupt source");
|
||||
isp->is_recurse = Xsoftserial;
|
||||
isp->is_resume = Xsoftserial;
|
||||
fake_softserial_intrhand.ih_level = IPL_SOFTSERIAL;
|
||||
isp->is_handlers = &fake_softserial_intrhand;
|
||||
isp->is_pic = &softintr_pic;
|
||||
ci->ci_isources[SIR_SERIAL] = isp;
|
||||
evcnt_attach_dynamic(&isp->is_evcnt, EVCNT_TYPE_INTR, NULL,
|
||||
ci->ci_dev->dv_xname, "softserial");
|
||||
|
||||
#if NLAPIC > 0
|
||||
MALLOC(isp, struct intrsource *, sizeof (struct intrsource), M_DEVBUF,
|
||||
M_WAITOK|M_ZERO);
|
||||
if (isp == NULL)
|
||||
panic("can't allocate fixed interrupt source");
|
||||
isp->is_recurse = Xrecurse_lapic_ltimer;
|
||||
isp->is_resume = Xresume_lapic_ltimer;
|
||||
fake_timer_intrhand.ih_level = IPL_CLOCK;
|
||||
isp->is_handlers = &fake_timer_intrhand;
|
||||
isp->is_pic = &local_pic;
|
||||
ci->ci_isources[LIR_TIMER] = isp;
|
||||
evcnt_attach_dynamic(&isp->is_evcnt, EVCNT_TYPE_INTR, NULL,
|
||||
ci->ci_dev->dv_xname, "timer");
|
||||
|
||||
MALLOC(isp, struct intrsource *, sizeof (struct intrsource), M_DEVBUF,
|
||||
M_WAITOK|M_ZERO);
|
||||
if (isp == NULL)
|
||||
panic("can't allocate fixed interrupt source");
|
||||
isp->is_recurse = Xrecurse_lapic_ipi;
|
||||
isp->is_resume = Xresume_lapic_ipi;
|
||||
fake_ipi_intrhand.ih_level = IPL_IPI;
|
||||
isp->is_handlers = &fake_ipi_intrhand;
|
||||
isp->is_pic = &local_pic;
|
||||
ci->ci_isources[LIR_IPI] = isp;
|
||||
|
||||
for (i = 0; i < I386_NIPI; i++)
|
||||
evcnt_attach_dynamic(&ci->ci_ipi_events[i], EVCNT_TYPE_INTR,
|
||||
NULL, ci->ci_dev->dv_xname, i386_ipi_names[i]);
|
||||
#endif
|
||||
|
||||
intr_calculatemasks(ci);
|
||||
|
||||
}
|
||||
|
||||
#ifdef MULTIPROCESSOR
|
||||
void
|
||||
i386_intlock(void)
|
||||
{
|
||||
spinlockmgr(&kernel_lock, LK_EXCLUSIVE|LK_CANRECURSE, 0);
|
||||
}
|
||||
|
||||
void
|
||||
i386_intunlock(void)
|
||||
{
|
||||
spinlockmgr(&kernel_lock, LK_RELEASE, 0);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef INTRDEBUG
|
||||
void
|
||||
intr_printconfig(void)
|
||||
{
|
||||
int i;
|
||||
struct intrhand *ih;
|
||||
struct intrsource *isp;
|
||||
struct cpu_info *ci;
|
||||
CPU_INFO_ITERATOR cii;
|
||||
|
||||
for (CPU_INFO_FOREACH(cii, ci)) {
|
||||
printf("cpu%d: interrupt masks:\n", (unsigned)ci->ci_cpuid);
|
||||
for (i = 0; i < NIPL; i++)
|
||||
printf("IPL %d mask %lx unmask %lx\n", i,
|
||||
(u_long)ci->ci_imask[i], (u_long)ci->ci_iunmask[i]);
|
||||
simple_lock(&ci->ci_slock);
|
||||
for (i = 0; i < MAX_INTR_SOURCES; i++) {
|
||||
isp = ci->ci_isources[i];
|
||||
if (isp == NULL)
|
||||
continue;
|
||||
printf("cpu%u source %d is pin %d from pic %s maxlevel %d\n",
|
||||
(unsigned)ci->ci_cpuid, i, isp->is_pin,
|
||||
isp->is_pic->pic_name, isp->is_maxlevel);
|
||||
for (ih = isp->is_handlers; ih != NULL;
|
||||
ih = ih->ih_next)
|
||||
printf("\thandler %p level %d\n",
|
||||
ih->ih_fun, ih->ih_level);
|
||||
|
||||
}
|
||||
simple_unlock(&ci->ci_slock);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
Loading…
Reference in New Issue