Get the floating point byte and word orders correct for the arm32.
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@ -1,4 +1,4 @@
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/* $NetBSD: strtod.c,v 1.20 1995/12/28 08:52:51 thorpej Exp $ */
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/* $NetBSD: strtod.c,v 1.21 1996/02/16 21:19:29 mark Exp $ */
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/****************************************************************
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*
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@ -92,7 +92,7 @@
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*/
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#if defined(LIBC_SCCS) && !defined(lint)
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static char *rcsid = "$NetBSD: strtod.c,v 1.20 1995/12/28 08:52:51 thorpej Exp $";
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static char *rcsid = "$NetBSD: strtod.c,v 1.21 1996/02/16 21:19:29 mark Exp $";
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#endif /* LIBC_SCCS and not lint */
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#if defined(__m68k__) || defined(__sparc__) || defined(__i386__) || \
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@ -105,6 +105,15 @@ static char *rcsid = "$NetBSD: strtod.c,v 1.20 1995/12/28 08:52:51 thorpej Exp $
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#endif
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#endif
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#ifdef __arm32__
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/*
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* Although the CPU is little endian the FP has different
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* byte and word endianness. The byte order is still little endian
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* but the word order is big endian.
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*/
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#define IEEE_BIG_ENDIAN
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#endif
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#ifdef vax
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#define VAX
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#endif
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@ -226,7 +235,7 @@ IBM should be defined.
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* An alternative that might be better on some machines is
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* #define Storeinc(a,b,c) (*a++ = b << 16 | c & 0xffff)
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*/
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#if defined(IEEE_LITTLE_ENDIAN) + defined(VAX)
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#if defined(IEEE_LITTLE_ENDIAN) + defined(VAX) + defined(__arm32__)
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#define Storeinc(a,b,c) (((unsigned short *)a)[1] = (unsigned short)b, \
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((unsigned short *)a)[0] = (unsigned short)c, a++)
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#else
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