Check and clear the HT bit in strtc_clock_read(), not just strtc_clock_write()
otherwise we end up reading the date/time of the previous powerfail event.
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@ -1,4 +1,4 @@
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/* $NetBSD: m41st84.c,v 1.2 2004/01/20 19:12:54 briggs Exp $ */
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/* $NetBSD: m41st84.c,v 1.3 2004/11/24 14:46:18 scw Exp $ */
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/*
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/*
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* Copyright (c) 2003 Wasabi Systems, Inc.
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* Copyright (c) 2003 Wasabi Systems, Inc.
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@ -287,6 +287,30 @@ strtc_clock_read(struct strtc_softc *sc, struct clock_ymdhms *dt)
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return (0);
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return (0);
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}
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}
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/*
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* Check for the HT bit -- if set, then clock lost power & stopped
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* If that happened, then clear the bit so that the clock will have
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* a chance to run again.
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*/
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cmdbuf[0] = M41ST84_REG_AL_HOUR;
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if (iic_exec(sc->sc_tag, I2C_OP_READ, sc->sc_address,
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cmdbuf, 1, &cmdbuf[1], 1, I2C_F_POLL)) {
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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printf("%s: strtc_clock_read: failed to read HT\n",
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sc->sc_dev.dv_xname);
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return (0);
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}
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if (cmdbuf[1] & M41ST84_AL_HOUR_HT) {
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cmdbuf[1] &= ~M41ST84_AL_HOUR_HT;
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if (iic_exec(sc->sc_tag, I2C_OP_WRITE, sc->sc_address,
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cmdbuf, 1, &cmdbuf[1], 1, I2C_F_POLL)) {
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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printf("%s: strtc_clock_read: failed to reset HT\n",
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sc->sc_dev.dv_xname);
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return (0);
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}
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}
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/* Read each RTC register in order. */
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/* Read each RTC register in order. */
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for (i = M41ST84_REG_CSEC; i < M41ST84_REG_DATE_BYTES; i++) {
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for (i = M41ST84_REG_CSEC; i < M41ST84_REG_DATE_BYTES; i++) {
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cmdbuf[0] = i;
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cmdbuf[0] = i;
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