splsoftnet() should block softclock() too.
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c1acffff5c
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1c5551f260
@ -1,4 +1,4 @@
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/* $NetBSD: machdep.c,v 1.32 2000/03/25 10:14:13 nisimura Exp $ */
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/* $NetBSD: machdep.c,v 1.33 2000/04/03 11:44:19 soda Exp $ */
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/* $OpenBSD: machdep.c,v 1.36 1999/05/22 21:22:19 weingart Exp $ */
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/* $OpenBSD: machdep.c,v 1.36 1999/05/22 21:22:19 weingart Exp $ */
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/*
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/*
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@ -193,12 +193,12 @@ static int atoi __P((const char *, int));
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int safepri = MIPS3_PSL_LOWIPL;
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int safepri = MIPS3_PSL_LOWIPL;
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struct splvec splvec = { /* XXX will go XXX */
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struct splvec splvec = { /* XXX will go XXX */
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MIPS_SPLHIGH, /* splbio */
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MIPS_INT_MASK_SPLHIGH, /* splbio */
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MIPS_SPLHIGH, /* splnet */
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MIPS_INT_MASK_SPLHIGH, /* splnet */
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MIPS_SPLHIGH, /* spltty */
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MIPS_INT_MASK_SPLHIGH, /* spltty */
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MIPS_SPLHIGH, /* splimp */
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MIPS_INT_MASK_SPLHIGH, /* splimp */
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MIPS_SPLHIGH, /* splclock */
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MIPS_INT_MASK_SPLHIGH, /* splclock */
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MIPS_SPLHIGH, /* splstatclock */
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MIPS_INT_MASK_SPLHIGH, /* splstatclock */
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};
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};
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extern struct user *proc0paddr;
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extern struct user *proc0paddr;
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@ -266,12 +266,12 @@ mach_init(argc, argv, envv)
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/*
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/*
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* Set up interrupt handling and I/O addresses.
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* Set up interrupt handling and I/O addresses.
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*/
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*/
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splvec.splnet = MIPS_INTMASK_0_to_3;
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splvec.splnet = MIPS_INT_MASK_SPL3;
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splvec.splbio = MIPS_INTMASK_0_to_3;
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splvec.splbio = MIPS_INT_MASK_SPL3;
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splvec.splimp = MIPS_INTMASK_0_to_3;
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splvec.splimp = MIPS_INT_MASK_SPL3;
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splvec.spltty = MIPS_INTMASK_0_to_3;
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splvec.spltty = MIPS_INT_MASK_SPL3;
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splvec.splclock = MIPS_INTMASK_0_to_5;
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splvec.splclock = MIPS_INT_MASK_SPL5;
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splvec.splstatclock = MIPS_INTMASK_0_to_5;
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splvec.splstatclock = MIPS_INT_MASK_SPL5;
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break;
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break;
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case NEC_RD94:
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case NEC_RD94:
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@ -286,12 +286,12 @@ mach_init(argc, argv, envv)
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/*
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/*
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* Set up interrupt handling and I/O addresses.
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* Set up interrupt handling and I/O addresses.
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*/
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*/
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splvec.splnet = MIPS_INTMASK_0_to_2;
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splvec.splnet = MIPS_INT_MASK_SPL2;
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splvec.splbio = MIPS_INTMASK_0_to_2;
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splvec.splbio = MIPS_INT_MASK_SPL2;
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splvec.splimp = MIPS_INTMASK_0_to_2;
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splvec.splimp = MIPS_INT_MASK_SPL2;
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splvec.spltty = MIPS_INTMASK_0_to_2;
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splvec.spltty = MIPS_INT_MASK_SPL2;
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splvec.splclock = MIPS_INTMASK_0_to_5;
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splvec.splclock = MIPS_INT_MASK_SPL5;
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splvec.splstatclock = MIPS_INTMASK_0_to_5;
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splvec.splstatclock = MIPS_INT_MASK_SPL5;
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break;
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break;
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case DESKSTATION_RPC44:
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case DESKSTATION_RPC44:
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@ -1,4 +1,4 @@
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/* $NetBSD: intr.h,v 1.2 2000/01/23 21:01:56 soda Exp $ */
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/* $NetBSD: intr.h,v 1.3 2000/04/03 11:44:20 soda Exp $ */
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/*
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/*
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* Copyright (c) 1998 Jonathan Stone. All rights reserved.
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* Copyright (c) 1998 Jonathan Stone. All rights reserved.
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@ -33,32 +33,32 @@
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#ifndef _ARC_INTR_H_
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#ifndef _ARC_INTR_H_
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#define _ARC_INTR_H_
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#define _ARC_INTR_H_
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#define IPL_NONE 0 /* disable only this interrupt */
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#define IPL_NONE 0 /* disable only this interrupt */
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#define IPL_BIO 1 /* disable block I/O interrupts */
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#define IPL_BIO 1 /* disable block I/O interrupts */
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#define IPL_NET 2 /* disable network interrupts */
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#define IPL_NET 2 /* disable network interrupts */
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#define IPL_TTY 3 /* disable terminal interrupts */
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#define IPL_TTY 3 /* disable terminal interrupts */
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#define IPL_IMP 4 /* memory allocation */
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#define IPL_IMP 4 /* memory allocation */
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#define IPL_CLOCK 5 /* disable clock interrupts */
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#define IPL_CLOCK 5 /* disable clock interrupts */
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#define IPL_STATCLOCK 6 /* disable profiling interrupts */
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#define IPL_STATCLOCK 6 /* disable profiling interrupts */
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#if 0 /* XXX */
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#if 0 /* XXX */
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#define IPL_SERIAL 7 /* disable serial hardware interrupts */
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#define IPL_SERIAL 7 /* disable serial hardware interrupts */
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#endif
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#endif
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#define IPL_HIGH 8 /* disable all interrupts */
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#define IPL_HIGH 8 /* disable all interrupts */
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#define NIPL 9
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#define NIPL 9
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/* Interrupt sharing types. */
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/* Interrupt sharing types. */
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#define IST_NONE 0 /* none */
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#define IST_NONE 0 /* none */
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#define IST_PULSE 1 /* pulsed */
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#define IST_PULSE 1 /* pulsed */
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#define IST_EDGE 2 /* edge-triggered */
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#define IST_EDGE 2 /* edge-triggered */
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#define IST_LEVEL 3 /* level-triggered */
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#define IST_LEVEL 3 /* level-triggered */
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/* Soft interrupt masks. */
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/* Soft interrupt masks. */
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/* XXX - revisit here */
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/* XXX - revisit here */
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#define SIR_CLOCK 31
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#define SIR_CLOCK 31
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#define SIR_NET 30
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#define SIR_NET 30
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#define SIR_CLOCKMASK ((1 << SIR_CLOCK))
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#define SIR_CLOCKMASK ((1 << SIR_CLOCK))
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#define SIR_NETMASK ((1 << SIR_NET) | SIR_CLOCKMASK)
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#define SIR_NETMASK ((1 << SIR_NET) | SIR_CLOCKMASK)
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#define SIR_ALLMASK (SIR_CLOCKMASK | SIR_NETMASK)
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#define SIR_ALLMASK (SIR_CLOCKMASK | SIR_NETMASK)
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#ifdef _KERNEL
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#ifdef _KERNEL
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#ifndef _LOCORE
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#ifndef _LOCORE
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@ -76,9 +76,21 @@ extern void _clrsoftintr __P((int));
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#define setsoftclock() _setsoftintr(MIPS_SOFT_INT_MASK_0)
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#define setsoftclock() _setsoftintr(MIPS_SOFT_INT_MASK_0)
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#define setsoftnet() _setsoftintr(MIPS_SOFT_INT_MASK_1)
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#define setsoftnet() _setsoftintr(MIPS_SOFT_INT_MASK_1)
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#define clearsoftclock() _clrsoftintr(MIPS_SOFT_INT_MASK_0)
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#define clearsoftclock() _clrsoftintr(MIPS_SOFT_INT_MASK_0)
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#define clearsoftnet() _clrsoftintr(MIPS_SOFT_INT_MASK_1)
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#define clearsoftnet() _clrsoftintr(MIPS_SOFT_INT_MASK_1)
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/*
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* nesting interrupt masks.
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*/
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#define MIPS_INT_MASK_SPL_SOFT0 MIPS_SOFT_INT_MASK_0
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#define MIPS_INT_MASK_SPL_SOFT1 (MIPS_SOFT_INT_MASK_1|MIPS_INT_MASK_SPL_SOFT0)
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#define MIPS_INT_MASK_SPL0 (MIPS_INT_MASK_0|MIPS_INT_MASK_SPL_SOFT1)
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#define MIPS_INT_MASK_SPL1 (MIPS_INT_MASK_1|MIPS_INT_MASK_SPL0)
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#define MIPS_INT_MASK_SPL2 (MIPS_INT_MASK_2|MIPS_INT_MASK_SPL1)
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#define MIPS_INT_MASK_SPL3 (MIPS_INT_MASK_3|MIPS_INT_MASK_SPL2)
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#define MIPS_INT_MASK_SPL4 (MIPS_INT_MASK_4|MIPS_INT_MASK_SPL3)
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#define MIPS_INT_MASK_SPL5 (MIPS_INT_MASK_5|MIPS_INT_MASK_SPL4)
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#define MIPS_INT_MASK_SPLHIGH MIPS_INT_MASK_SPL5
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#define splhigh() _splraise(MIPS_INT_MASK)
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#define spl0() (void)_spllower(0)
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#define spl0() (void)_spllower(0)
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#define splx(s) (void)_splset(s)
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#define splx(s) (void)_splset(s)
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#define splbio() (_splraise(splvec.splbio))
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#define splbio() (_splraise(splvec.splbio))
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@ -88,11 +100,13 @@ extern void _clrsoftintr __P((int));
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#define splpmap() (_splraise(splvec.splimp))
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#define splpmap() (_splraise(splvec.splimp))
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#define splclock() (_splraise(splvec.splclock))
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#define splclock() (_splraise(splvec.splclock))
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#define splstatclock() (_splraise(splvec.splstatclock))
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#define splstatclock() (_splraise(splvec.splstatclock))
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#define spllowersoftclock() _spllower(MIPS_SOFT_INT_MASK_0)
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#define splhigh() _splraise(MIPS_INT_MASK_SPLHIGH)
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#define splsoftclock() _splraise(MIPS_SOFT_INT_MASK_0)
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#define splsoftnet() _splraise(MIPS_SOFT_INT_MASK_1)
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#define spllpt() spltty() /* lpt driver */
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#define splsoftclock() _splraise(MIPS_INT_MASK_SPL_SOFT0)
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#define splsoftnet() _splraise(MIPS_INT_MASK_SPL_SOFT1)
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#define spllowersoftclock() _spllower(MIPS_INT_MASK_SPL_SOFT0)
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#define spllpt() spltty() /* lpt driver */
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struct splvec {
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struct splvec {
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int splbio;
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int splbio;
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@ -104,17 +118,6 @@ struct splvec {
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};
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};
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extern struct splvec splvec;
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extern struct splvec splvec;
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/* Conventionals ... */
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#define MIPS_SPLHIGH (MIPS_INT_MASK)
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#define MIPS_SOFT_INT_MASK (MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
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#define MIPS_INTMASK_0 (MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK)
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#define MIPS_INTMASK_0_to_1 (MIPS_INT_MASK_1|MIPS_INTMASK_0)
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#define MIPS_INTMASK_0_to_2 (MIPS_INT_MASK_2|MIPS_INTMASK_0_to_1)
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#define MIPS_INTMASK_0_to_3 (MIPS_INT_MASK_3|MIPS_INTMASK_0_to_2)
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#define MIPS_INTMASK_0_to_4 (MIPS_INT_MASK_4|MIPS_INTMASK_0_to_3)
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#define MIPS_INTMASK_0_to_5 (MIPS_INT_MASK_5|MIPS_INTMASK_0_to_4)
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/*
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/*
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* Index into intrcnt[], which is defined in locore
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* Index into intrcnt[], which is defined in locore
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*/
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*/
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/* $NetBSD: intr.h,v 1.3 2000/03/31 14:51:52 soren Exp $ */
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/* $NetBSD: intr.h,v 1.4 2000/04/03 11:44:21 soda Exp $ */
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#include <mips/cpuregs.h>
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#include <mips/cpuregs.h>
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#include <mips/intr.h>
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#include <mips/intr.h>
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@ -50,7 +50,7 @@ extern void _clrsoftintr(int);
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#define splimp() splclock()
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#define splimp() splclock()
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#define splstatclock() splclock()
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#define splstatclock() splclock()
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#define splsoftclock() _splraise(MIPS_SOFT_INT_MASK_0)
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#define splsoftclock() _splraise(MIPS_SOFT_INT_MASK_0)
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#define splsoftnet() _splraise(MIPS_SOFT_INT_MASK_1)
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#define splsoftnet() _splraise(MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
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#define spllowersoftclock() _spllower(MIPS_SOFT_INT_MASK_0)
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#define spllowersoftclock() _spllower(MIPS_SOFT_INT_MASK_0)
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extern unsigned int intrcnt[];
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extern unsigned int intrcnt[];
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/* $NetBSD: intr.h,v 1.3 2000/04/03 03:37:25 sato Exp $ */
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/* $NetBSD: intr.h,v 1.4 2000/04/03 11:44:21 soda Exp $ */
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/*
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/*
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* Copyright (c) 1998 Jonathan Stone. All rights reserved.
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* Copyright (c) 1998 Jonathan Stone. All rights reserved.
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@ -82,7 +82,7 @@ void _clrsoftintr __P((int));
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#define splstatclock() (_splraise(splvec.splstatclock))
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#define splstatclock() (_splraise(splvec.splstatclock))
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#define spllowersoftclock() _spllower(MIPS_SOFT_INT_MASK_0)
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#define spllowersoftclock() _spllower(MIPS_SOFT_INT_MASK_0)
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#define splsoftclock() _splraise(MIPS_SOFT_INT_MASK_0)
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#define splsoftclock() _splraise(MIPS_SOFT_INT_MASK_0)
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#define splsoftnet() _splraise(MIPS_SOFT_INT_MASK_1)
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#define splsoftnet() _splraise(MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
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struct splvec {
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struct splvec {
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int splbio;
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int splbio;
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/* $NetBSD: intr.h,v 1.13 2000/03/10 01:31:22 nisimura Exp $ */
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/* $NetBSD: intr.h,v 1.14 2000/04/03 11:44:22 soda Exp $ */
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/*
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/*
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* Copyright (c) 1998 Jonathan Stone. All rights reserved.
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* Copyright (c) 1998 Jonathan Stone. All rights reserved.
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@ -74,7 +74,7 @@ void _clrsoftintr __P((int));
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#define splstatclock() (_splraise(splvec.splstatclock))
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#define splstatclock() (_splraise(splvec.splstatclock))
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#define spllowersoftclock() _spllower(MIPS_SOFT_INT_MASK_0)
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#define spllowersoftclock() _spllower(MIPS_SOFT_INT_MASK_0)
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#define splsoftclock() _splraise(MIPS_SOFT_INT_MASK_0)
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#define splsoftclock() _splraise(MIPS_SOFT_INT_MASK_0)
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#define splsoftnet() _splraise(MIPS_SOFT_INT_MASK_1)
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#define splsoftnet() _splraise(MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
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struct splvec {
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struct splvec {
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int splbio;
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int splbio;
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