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Remove the old egcs compiler.

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This commit is contained in:
thorpej 2002-09-16 16:53:47 +00:00
parent 2699791533
commit 1bdb20e71b
812 changed files with 0 additions and 479661 deletions
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305
gnu/dist/gcc/config/m88k/dgux.h vendored
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@ -1,305 +0,0 @@
/* Definitions of target machine for GNU compiler.
Motorola m88100 running DG/UX.
Copyright (C) 1988, 92, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
Contributed by Michael Tiemann (tiemann@mcc.com)
Currently maintained by (gcc@dg-rtp.dg.com)
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* You're not seeing double! To transition to dwarf debugging, both are
supported. The option -msvr4 specifies elf. With these combinations,
-g means dwarf. */
/* DWARF_DEBUGGING_INFO defined in svr4.h. */
#define SDB_DEBUGGING_INFO
#define PREFERRED_DEBUGGING_TYPE \
(TARGET_SVR4 ? DWARF_DEBUG : SDB_DEBUG)
#ifndef VERSION_INFO2
#define VERSION_INFO2 "$Revision: 1.1.1.6 $"
#endif
#ifndef NO_BUGS
#define AS_BUG_IMMEDIATE_LABEL
/* The DG/UX 4.30 assembler doesn't accept the symbol `fcr63'. */
#define AS_BUG_FLDCR
#endif
#include "svr4.h"
#include "m88k/m88k.h"
/* Augment TARGET_SWITCHES with the MXDB options. */
#define MASK_STANDARD 0x40000000 /* Retain standard information */
#define MASK_NOLEGEND 0x20000000 /* Discard legend information */
#define MASK_EXTERNAL_LEGEND 0x10000000 /* Make external legends */
#define TARGET_STANDARD (target_flags & MASK_STANDARD)
#define TARGET_NOLEGEND (target_flags & MASK_NOLEGEND)
#define TARGET_EXTERNAL_LEGEND (target_flags & MASK_EXTERNAL_LEGEND)
#undef SUBTARGET_SWITCHES
#define SUBTARGET_SWITCHES \
{ "standard", MASK_STANDARD }, \
{ "legend", -MASK_NOLEGEND }, \
{ "no-legend", MASK_NOLEGEND }, \
{ "external-legend", MASK_EXTERNAL_LEGEND }, \
/* the following is used only in the *_SPEC's */ \
{ "keep-coff", 0 },
/* Default switches */
#undef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_CHECK_ZERO_DIV | \
MASK_OCS_DEBUG_INFO | \
MASK_OCS_FRAME_POSITION | \
MASK_STANDARD | \
MASK_SVR4)
#undef CPU_DEFAULT
#define CPU_DEFAULT MASK_88000
/* Macros to be automatically defined. __svr4__ is our extension.
__CLASSIFY_TYPE__ is used in the <varargs.h> and <stdarg.h> header
files with DG/UX revision 5.40 and later. This allows GNU CC to
operate without installing the header files. */
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-Dm88000 -Dm88k -Dunix -DDGUX -D__CLASSIFY_TYPE__=2\
-D__svr4__ -Asystem(unix) -Acpu(m88k) -Amachine(m88k)"
/* If -m88100 is in effect, add -Dm88100; similarly for -m88110.
Here, the CPU_DEFAULT is assumed to be -m88000. If not -ansi,
-traditional, or restricting include files to one specific source
target, specify full DG/UX features. */
#undef CPP_SPEC
#define CPP_SPEC "%(cpp_cpu) %{msvr3:-D_M88KBCS_TARGET} %{!msvr3:-D_DGUX_TARGET}"
/* Assembler support (-V, silicon filter, legends for mxdb). */
#undef ASM_SPEC
#define ASM_SPEC "%{pipe:%{!.s: - }\
%{!msvr3:%{!m88110:-KV3 }%{m88110:-KV04.00 }}}\
%(asm_cpu)"
/* Override svr4.h. */
#undef ASM_FINAL_SPEC
#undef STARTFILE_SPEC
/* Linker and library spec's.
-msvr4 is the default if -msvr3 is not specified.
-static, -shared, -symbolic, -h* and -z* access AT&T V.4 link options.
-svr4 instructs gcc to place /usr/lib/values-X[cat].o on the link line.
-msvr3 indicates linking done in a COFF environment and the link
script is added to the link line. In all environments, the first
and last objects are crtbegin.o (or bcscrtbegin.o) and crtend.o.
When the -G link option is used (-shared and -symbolic) a final
link is not being done. */
#undef ENDFILE_SPEC
#define ENDFILE_SPEC "crtend.o%s"
#undef LIB_SPEC
#define LIB_SPEC "%{!msvr3:%{!shared:-lstaticdgc}} %{!shared:%{!symbolic:-lc}}"
#undef LINK_SPEC
#define LINK_SPEC "%{z*} %{h*} %{v:-V} \
%{static:-dn -Bstatic} \
%{shared:-G -dy} \
%{symbolic:-Bsymbolic -G -dy} \
%{pg:-L/usr/lib/libp}%{p:-L/usr/lib/libp}"
#undef STARTFILE_SPEC
#define STARTFILE_SPEC "%(startfile_default)"
/* This macro defines names of additional specifications to put in the specs
that can be used in various specifications like CC1_SPEC. Its definition
is an initializer with a subgrouping for each command option.
Each subgrouping contains a string constant, that defines the
specification name, and a string constant that used by the GNU CC driver
program.
Do not define this macro if it does not need to do anything. */
#define EXTRA_SPECS \
{ "cpp_cpu", CPP_CPU_SPEC }, \
{ "asm_cpu", ASM_CPU_SPEC }, \
{ "startfile_default", STARTFILE_DEFAULT_SPEC }, \
{ "startfile_crtbegin", STARTFILE_CRTBEGIN_SPEC }
/* Keep this left justified, no white space is allowed between
the arguments to the -Wc option */
#define ASM_CPU_SPEC "\
%{v:-V}\
%{g:\
%{mno-legend:-Wc,off}\
%{!mno-legend:-Wc,-fix-bb,-s\"%i\"\
%{traditional:,-lc}\
%{!traditional:,-lansi-c}\
%{mstandard:,-keep-std}\
%{mexternal-legend:,-external}\
%{mocs-frame-position:,-ocs}}}"
#define CPP_CPU_SPEC "\
%{!m88000:%{!m88100:%{m88110:-D__m88110__}}} \
%{!m88000:%{!m88110:%{m88100:-D__m88100__}}} \
%{!ansi:%{!traditional:-D__OPEN_NAMESPACE__}}"
#define STARTFILE_DEFAULT_SPEC "\
%{!shared:%{!symbolic:%{pg:gcrt0.o%s} \
%{!pg:%{p:/lib/mcrt0.o}%{!p:/lib/crt0.o}} \
%(startfile_crtbegin) \
%{svr4:%{ansi:/lib/values-Xc.o} \
%{!ansi:%{traditional:/lib/values-Xt.o} \
%{!traditional:/usr/lib/values-Xa.o}}}}}"
#define STARTFILE_CRTBEGIN_SPEC "\
%{msvr3:m88kdgux.ld%s bcscrtbegin.o%s} \
%{!msvr3:crtbegin.o%s}"
#undef GPLUSPLUS_INCLUDE_DIR
#define GPLUSPLUS_INCLUDE_DIR "/usr/opt/g++/lib/g++-include"
/* Fast DG/UX version of profiler that does not require lots of
registers to be stored. */
#undef FUNCTION_PROFILER
#define FUNCTION_PROFILER(FILE, LABELNO) \
output_function_profiler (FILE, LABELNO, "gcc.mcount", 0)
/* Output the legend info for mxdb when debugging except if standard
debugging information only is explicitly requested. */
#undef ASM_FIRST_LINE
#define ASM_FIRST_LINE(FILE) \
do { \
if (TARGET_SVR4) \
{ \
if (TARGET_88110) \
fprintf (FILE, "\t%s\t \"%s\"\n", VERSION_ASM_OP, "04.00"); \
else \
fprintf (FILE, "\t%s\t \"%s\"\n", VERSION_ASM_OP, "03.00"); \
} \
if (write_symbols != NO_DEBUG && !TARGET_NOLEGEND) \
{ \
fprintf (FILE, ";legend_info -fix-bb -h\"gcc-%s\" -s\"%s\"", \
VERSION_STRING, main_input_filename); \
fputs (flag_traditional ? " -lc" : " -lansi-c", FILE); \
if (TARGET_STANDARD) \
fputs (" -keep-std", FILE); \
if (TARGET_EXTERNAL_LEGEND) \
fputs (" -external", FILE); \
if (TARGET_OCS_FRAME_POSITION) \
fputs (" -ocs", FILE); \
fputc ('\n', FILE); \
} \
} while (0)
/* Override svr4.h. */
#undef PTRDIFF_TYPE
#undef WCHAR_TYPE
#undef WCHAR_TYPE_SIZE
/* Override svr4.h and m88k.h except when compiling crtstuff.c. These must
be constant strings when compiling crtstuff.c. Otherwise, respect the
-mversion-STRING option used. */
#undef INIT_SECTION_PREAMBLE
#undef INIT_SECTION_ASM_OP
#undef FINI_SECTION_ASM_OP
#undef CTORS_SECTION_ASM_OP
#undef DTORS_SECTION_ASM_OP
#if defined (CRT_BEGIN) || defined (CRT_END) || defined (L__main)
/* routines to invoke global constructors and destructors are always COFF
to enable linking mixed COFF and ELF objects */
#define FINI_SECTION_ASM_OP ("section .fini,\"x\"")
#ifndef BCS
#define INIT_SECTION_PREAMBLE asm ("\taddu\tr31,r31,0x20")
#endif
#undef INIT_SECTION_ASM_OP
#define INIT_SECTION_ASM_OP ("section\t .init,\"x\"")
#undef CTORS_SECTION_ASM_OP
#define CTORS_SECTION_ASM_OP ("section\t .ctors,\"d\"")
#undef DTORS_SECTION_ASM_OP
#define DTORS_SECTION_ASM_OP ("section\t .dtors,\"d\"")
#undef OBJECT_FORMAT_ELF
#else
#undef INIT_SECTION_ASM_OP
#define INIT_SECTION_ASM_OP (TARGET_SVR4 \
? "section\t .init,\"xa\"" \
: "section\t .init,\"x\"")
#undef CTORS_SECTION_ASM_OP
#define CTORS_SECTION_ASM_OP (TARGET_SVR4 \
? "section\t .ctors,\"aw\"" \
: "section\t .ctors,\"d\"")
#undef DTORS_SECTION_ASM_OP
#define DTORS_SECTION_ASM_OP (TARGET_SVR4 \
? "section\t .dtors,\"aw\"" \
: "section\t .dtors,\"d\"")
#endif /* crtstuff.c */
/* The lists of global object constructors and global destructors are always
placed in the .ctors/.dtors sections. This requires the use of a link
script if the COFF linker is used, but otherwise COFF and ELF objects
can be intermixed. A COFF object will pad the section to 16 bytes with
zeros; and ELF object will not contain padding. We deal with this by
putting a -1 marker at the begin and end of the list and ignoring zero
entries. */
/* Mark the end of the .ctors/.dtors sections with a -1. */
#define CTOR_LIST_BEGIN \
asm (CTORS_SECTION_ASM_OP); \
func_ptr __CTOR_LIST__[1] = { (func_ptr) (-1) }
#define CTOR_LIST_END \
asm (CTORS_SECTION_ASM_OP); \
func_ptr __CTOR_END__[1] = { (func_ptr) (-1) }
#define DTOR_LIST_BEGIN \
asm (DTORS_SECTION_ASM_OP); \
func_ptr __DTOR_LIST__[1] = { (func_ptr) (-1) }
#define DTOR_LIST_END \
asm (DTORS_SECTION_ASM_OP); \
func_ptr __DTOR_END__[1] = { (func_ptr) (-1) }
/* Walk the list ignoring NULL entries till we hit the terminating -1. */
#define DO_GLOBAL_CTORS_BODY \
do { \
int i; \
for (i=1;(int)(__CTOR_LIST__[i]) != -1; i++) \
if (((int *)__CTOR_LIST__)[i] != 0) \
__CTOR_LIST__[i] (); \
} while (0)
/* Walk the list looking for the terminating -1 that marks the end.
Go backward and ignore any NULL entries. */
#define DO_GLOBAL_DTORS_BODY \
do { \
int i; \
for (i=1;(int)(__DTOR_LIST__[i]) != -1; i++); \
for (i-=1;(int)(__DTOR_LIST__[i]) != -1; i--) \
if (((int *)__DTOR_LIST__)[i] != 0) \
__DTOR_LIST__[i] (); \
} while (0)
/* The maximum alignment which the object file format can support.
page alignment would seem to be enough */
#undef MAX_OFILE_ALIGNMENT
#define MAX_OFILE_ALIGNMENT 0x1000
/* Must use data section for relocatable constants when pic. */
#undef SELECT_RTX_SECTION
#define SELECT_RTX_SECTION(MODE,RTX) \
{ \
if (flag_pic && symbolic_operand (RTX)) \
data_section (); \
else \
const_section (); \
}

48
gnu/dist/gcc/config/m88k/dgux.ld vendored
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@ -1,48 +0,0 @@
/* m88kdgux.ld - COFF linker directives for G++ on an AViiON
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA.
On The AViiON we start the output .text section somewhere after the
first 64kb (0x10000) of logical address space so that the first
64kb can be mapped out, thus catching references through null
pointers. We actually start at 0x10200 (for efficiency). Ideally,
we want the page offset of a given word of the .text (output)
section to be the same as its page offset in the actual (output)
linked core file so that paging of the .text section is efficient.
In order to do this we allow for up to 0x200 bytes of header stuff
in the output (linked) object file.
For .data, the OCS says that regions with different "protections"
(i.e. read/write, read-only) should not share any 4 megabyte chunk
of the logical address space, so we start the .data segment at the
first (lowest) 4 MB boundary past the end of the .text segment.
For some reason, you can't start right at the 4 MB boundary. You
have to start at some distance past that. The distance must be
equal to the distance from the start of the last 64 KB segment in
the (output) .text segment to the actual end of the (output) .text
segment. */
SECTIONS {
.text 0x10200 BLOCK(0x200) :
{ *(.init) *(.initp) *(.finip) *(.text) *(.tdesc) }
GROUP BIND (((((ADDR(.text) + SIZEOF(.text) - 1) / 0x400000) + 1) * 0x400000) + ((ADDR(.text) + SIZEOF (.text)) % 0x10000)) :
{ .data : { *(.data) *(.ctors) *(.dtors) }
.bss : {} }
}

62
gnu/dist/gcc/config/m88k/dguxbcs.h vendored
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/* Definitions of target machine for GNU compiler.
Motorola m88100 running DG/UX.
Copyright (C) 1988, 92, 93, 94, 95, 1996 Free Software Foundation, Inc.
Contributed by Michael Tiemann (tiemann@mcc.com)
Currently maintained by (gcc@dg-rtp.dg.com)
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "m88k/dgux.h"
/* dgux.h builds an elf gcc which compiles elf objects by default.
dguxbcs.h builds a bcs gcc which compiles bcs objects by default.
The default can be overridden in either case with -msvr3 and -msvr4 */
/* Default switches */
#undef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_CHECK_ZERO_DIV | \
MASK_OCS_DEBUG_INFO | \
MASK_OCS_FRAME_POSITION | \
MASK_SVR3)
/* Assembler support (-V, silicon filter, legends for mxdb). */
#undef ASM_SPEC
#define ASM_SPEC "%{pipe:%{!.s: - }\
%{msvr4:%{!m88110:-KV3 }%{m88110:-KV04.00 }}}\
%(asm_cpu)"
/* If -m88100 is in effect, add -Dm88100; similarly for -m88110.
Here, the CPU_DEFAULT is assumed to be -m88000. If not -ansi,
-traditional, or restricting include files to one specific source
target, specify full DG/UX features. */
#undef CPP_SPEC
#define CPP_SPEC "%(cpp_cpu)
%{!msvr4:-D_M88KBCS_TARGET} %{msvr4:-D_DGUX_TARGET}"
/* Linker and library spec's.
-msvr3 is the default if -msvr4 is not specified. */
#undef LIB_SPEC
#define LIB_SPEC "%{msvr4:%{!shared:-lstaticdgc}} %{!shared:%{!symbolic:-lc}}"
#undef STARTFILE_SPEC
#define STARTFILE_SPEC "%(startfile_default)"
#undef STARTFILE_CRTBEGIN_SPEC
#define STARTFILE_CRTBEGIN_SPEC "\
%{!msvr4:m88kdgux.ld%s bcscrtbegin.o%s} \
%{msvr4:crtbegin.o%s}"

43
gnu/dist/gcc/config/m88k/dolph.h vendored
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@ -1,43 +0,0 @@
/* Definitions of target machine for GNU compiler.
Motorola m88100 running the Dolphin UNIX System V/88 Release 3.2,
Version 3.8/7.83 and 3.6/5.86
Copyright (C) 1992, 1993, 1997 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "m88k/sysv3.h"
#define SDB_ALLOW_FORWARD_REFERENCES
#define SDB_ALLOW_UNKNOWN_REFERENCES
/* Override m88k/sysv3.h */
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-Dm88000 -Dm88k -DOCS88 -DDOLPHIN -Dunix -DsysV88 -D__CLASSIFY_TYPE__=2 -Asystem(unix) -Asystem(svr3) -Acpu(m88k) -Amachine(m88k)"
/*
If you want to detect dereferencing of NULL pointers, uncomment the
following two lines. Alternatively, edit the appropriate specs file.
#undef LINK_SPEC
#define LINK_SPEC "gcc.ld%s"
*/
#undef CPU_DEFAULT
#define CPU_DEFAULT MASK_88000

40
gnu/dist/gcc/config/m88k/dolphin.ld vendored
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@ -1,40 +0,0 @@
/* COFF linker directives for the Dolphin Triton88 for GNU compiler.
Copyright (C) 1993 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* This file does the following:
- Sets VIRTUAL addr of .text to 0x400200
Sets FILE addr of .text to 0x200 (BLOCK directive)
- Depending on size of .text section rounds up to next
4 MG boundary, adds (size of .text and vaddr of .text) mod 64K
This is to handle sections larger than 4 MG. */
SECTIONS {
.text 0x400200 BLOCK (0x200):
{ *(.init) *(.text) *(.rodata) *(.tdesc) *(.fini)}
GROUP BIND( (((SIZEOF(.text)+ADDR(.text)) / 0x400000 * 0x400000) + 0x400000) +
((SIZEOF(.text) + ADDR(.text)) % 0x10000) ) :
{
.data : { }
.bss : { }
}
}

58
gnu/dist/gcc/config/m88k/luna.h vendored
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@ -1,58 +0,0 @@
/* Definitions of target machine for GNU compiler.
Motorola m88100 running Omron Luna/88k.
Copyright (C) 1991, 1997 Free Software Foundation, Inc.
Contributed by Jeffrey Friedl (jfriedl@omron.co.jp)
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* The Omron Luna/88k is MACH and uses BSD a.out, not COFF or ELF. */
#ifndef MACH
#define MACH
#endif
#define DBX_DEBUGGING_INFO
#define DEFAULT_GDB_EXTENSIONS 0
#include "aoutos.h"
#include "m88k/m88k.h"
/* Identify the compiler. */
#undef VERSION_INFO1
#define VERSION_INFO1 "Omron Luna/88k, "
/* Macros to be automatically defined. */
#undef CPP_PREDEFINES
#define CPP_PREDEFINES \
"-DMACH -Dm88k -Dunix -Dluna -Dluna88k -D__CLASSIFY_TYPE__=2 -Asystem(unix) -Asystem(mach) -Acpu(m88k) -Amachine(m88k)"
/* If -m88000 is in effect, add -Dmc88000; similarly for -m88100 and -m88110.
However, reproduce the effect of -Dmc88100 previously in CPP_PREDEFINES.
Here, the CPU_DEFAULT is assumed to be -m88100. */
#undef CPP_SPEC
#define CPP_SPEC "%{m88000:-D__mc88000__} \
%{!m88000:%{m88100:%{m88110:-D__mc88000__}}} \
%{!m88000:%{!m88100:%{m88110:-D__mc88110__}}} \
%{!m88000:%{!m88110:%{!ansi:%{traditional:-Dmc88100}} \
-D__mc88100__ -D__mc88100}}"
/* Specify extra dir to search for include files. */
#undef SYSTEM_INCLUDE_DIR
#define SYSTEM_INCLUDE_DIR "/usr/mach/include"
/* For the Omron Luna/88k, a float function returns a double in traditional
mode (and a float in ansi mode). */
#undef TRADITIONAL_RETURN_FLOAT

32
gnu/dist/gcc/config/m88k/m88k-aout.h vendored
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@ -1,32 +0,0 @@
/* Definitions for "naked" Motorola 88k using a.out object format files
and stabs debugging info.
Copyright (C) 1994 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#undef SDB_DEBUGGING_INFO
#define DBX_DEBUGGING_INFO
#include "m88k/m88k.h"
#include "aoutos.h"
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-Dm88000 -Dm88k -Acpu(m88k) -Amachine(m88k)"
/* end of m88k-aout.h */

34
gnu/dist/gcc/config/m88k/m88k-coff.h vendored
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/* Definitions for "naked" Motorola 88k using coff object format files
and coff debugging info.
Copyright (C) 1994, 1996 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "m88k/m88k.h"
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-Dm88000 -Dm88k -Acpu(m88k) -Amachine(m88k)"
#define SDB_DEBUGGING_INFO
/* Output DBX (stabs) debugging information if using -gstabs. */
#include "dbxcoff.h"
/* end of m88k-coff.h */

306
gnu/dist/gcc/config/m88k/m88k-move.sh vendored
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@ -1,306 +0,0 @@
#!/bin/sh
#
# If your shell doesn't support functions (true for some BSD users),
# you might try using GNU's bash.
#
#ident "@(#) m88k-move.sh 1-Sep-92"
#
# This file provided by Data General, February 1990.
#
# This script generates the necessary movstr library functions
# for the m88100. These functions are called from the expansion
# of movstrsi. There are eight modules created by this script,
# each with multiple entry points. One module, moveSI64n
# implements a word aligned loop; the other modules, moveXINx
# implement a straight line copy of N bytes in mode XI.
#
# By analysis of the best memcpy function, it can be determined
# what appear to be certain magic numbers. For example, a
# memcpy of 13 bytes, where the pointers are determined at run
# time to be word aligned takes 28 cycles. A call to
# __movstrQI13x13 also takes 28 cycles. The break even point
# for a HImode copy is 38 bytes. Just to be on the safe side,
# these are bumped to 16 and 48 respectively.
#
# The smaller, odd-remainder modules are provided to help
# mitigate the overhead of copying the last bytes.
#
# Changes to these functions should not be taken lightly if you
# want to be able to link programs built with older movstr
# parameters.
#
#.Revision History
#
# 1-Sep-92 Stan Cox Added moveDI96x, moveDI41x through moveDI47x.
# 2-Jan-92 Tom Wood Renamed files to comply with SVR3 14 char limit.
# 26-Oct-90 Tom Wood Delete movstr.h; moved to out-m88k.c.
# 17-Oct-90 Tom Wood Files are named *.asm rather than *.s.
# 11-Sep-90 Jeffrey Friedl
# On my BSD 4.3 awk and my GNU-awk, only the
# first character of an argument to -F is passed
# through, so I can't get this to work.
# 5-Sep-90 Ray Essick/Tom Wood
# Added a -no-tdesc option.
# 27-Aug-90 Vince Guarna/Tom Wood
# Version 3 assembler syntax (-abi).
# 16-Aug-90 Ron Guilmette
# Avoid problems on a Sparc. The common
# denominator among shells seems to be '...\'
# rather than '...\\'.
# 15-Aug-90 Ron Guilmette
# Avoid awk syntax errors on a Sun by not using
# the `!' operator.
# 22-Feb-90 Tom Wood Created.
# 20-Jun-90 Tom Wood Emit file directives.
#
#.End]=--------------------------------------------------------------*/
usage() {
echo "usage: $0 [ -abi ] [ -no-tdesc ]" 1>&2
exit 1
}
awk_flag="-F:";
awk_begin="BEGIN { "
ps=""; us="_"; tf="x"; la="@L"; fb="8"; nt="";
do_file() {
echo " file $1";
}
while [ $# -gt 0 ] ; do
case $1 in
-no-tdesc) awk_begin="$awk_begin no_tdesc=1;"
nt=";";;
-abi) awk_begin="$awk_begin abi=1;"
ps="#"; us=""; tf="a"; la=".L"; fb="16";
do_file() {
echo ' version "03.00"';
echo " file $1";
};;
*) usage;;
esac
shift
done
rm -f move?I*[xn].s move?I*[xn].asm
#.Implementation_continued[=-----------------------------------------------
#
# This generates the word aligned loop. The loop is entered
# from the callable entry points ___movstrSI64nN, where at
# least N bytes will be copied. r2 is the destination pointer
# offset by 4, r3 is the source pointer offset by 4, r6 is the
# loop count. Thus, the total bytes moved is 64 * r6 + N. The
# first value is preloaded into r4 or r5 (r4 if N/4 is odd;
# r5 if N/4 is even). Upon returning, r2 and r3 have been
# updated and may be used for the remainder bytes to move.
#
# The code for this loop is generated by the awk program
# following. Edit *it*, not what it generates!
#
#.End]=------------------------------------------------------------------*/
gen_movstrN() {
awk $awk_flag "$awk_begin"'
if (abi) {
ps="#"; us=""; tf="a"; la=".L"; fb=16;
} else {
ps=""; us="_"; tf="x"; la="@L"; fb=8;
}
}
NR == 1 && NF == 4 {
mode = $1; suffix = $2; align = $3; count = $4;
ld = align; st = 0;
printf "; The following was calculated using awk.\n";
printf "\ttext\n";
printf "\talign\t%d\n", fb;
printf "%sloop%s%d:\n", la, mode, count * align;
printf "\taddu\t%sr3,%sr3,%d\n", ps, ps, count * align;
printf "\taddu\t%sr2,%sr2,%d\n", ps, ps, count * align;
printf "\tsubu\t%sr6,%sr6,1\n", ps, ps;
for (r = count + 1; r >= 1; r--) {
evenp = r % 2;
name = sprintf("__%smovstr%s%dn%d", us, mode, count * align, r * align);
if (r > 1) {
printf "\tglobal\t%s\n", name;
printf "%s:\n", name;
}
if (r > 2) {
printf "\tld%s\t%sr%d,%sr3,%d\n", suffix, ps, 4 + evenp, ps, ld;
printf "\tst%s\t%sr%d,%sr2,%d\n", suffix, ps, 5 - evenp, ps, st;
} else if (r == 2) {
printf "\tld%s\t%sr%d,%sr3,%d\n", suffix, ps, 4 + evenp, ps, ld;
printf "\tbcnd.n\t%sgt0,%sr6,%sloop%s%d\n", ps, ps, la, mode, count * align;
printf "\tst%s\t%sr%d,%sr2,%d\n", suffix, ps, 5 - evenp, ps, st;
printf "\tjmp.n\t%sr1\n", ps;
} else {
printf "\tst%s\t%sr%d,%sr2,%d\n", suffix, ps, 5 - evenp, ps, st;
}
ld += align; st += align;
}
if (!no_tdesc) {
printf "%send%s%d:\n", la, mode, count * align;
printf "\tsection\t.tdesc,\"%s\"\n", tf;
printf "\tword\t0x42,1,%sloop%s%d", la, mode, count * align;
printf ",%send%s%d\n", la, mode, count * align;
printf "\tword\t0x0100001f,0,1,0\n";
printf "\ttext\n";
}
printf "; End of awk generated code.\n";
exit;
}'
}
(do_file '"movstrSI64n.s"';
echo 'SI::4:16' | gen_movstrN) > moveSI64n.asm
#.Implementation_continued[=-----------------------------------------------
#
# This generates the even-remainder, straight-line modules.
# The code is entered from the callable entry points
# ___movstrXINxM, where exactly M bytes will be copied in XI
# mode. r2 is the destination pointer, r3 is the source
# pointer, neither being offset. The first value is preloaded
# into r4 or r5 (r4 if M-N/B is even; r5 if M-N/B is odd, where
# B is the mode size of XI). Upon returning, r2 and r3 have not
# been changed.
#
# The code for these cases is generated by the awk program
# following. Edit *it*, not what it generates!
#
#.End]=------------------------------------------------------------------*/
gen_movstrX0() {
awk $awk_flag "$awk_begin"'
if (abi) {
ps="#"; us=""; tf="a"; la=".L"; fb=16;
} else {
ps=""; us="_"; tf="x"; la="@L"; fb=8;
}
}
NR == 1 && NF == 4 {
mode = $1; suffix = $2; align = $3; bytes = $4;
ld = align; st = 0; count = bytes / align;
reg[0] = 4; if (align == 8) reg[1] = 6; else reg[1] = 5;
printf "; The following was calculated using awk.\n";
printf "\ttext\n";
printf "\talign\t%d\n", fb;
for (r = count; r >= 1; r--) {
evenp = r % 2;
name = sprintf("__%smovstr%s%dx%d", us, mode, count * align, r * align);
if (r > 1) {
printf "\tglobal\t%s\n", name;
printf "%s:\n", name;
}
if (r == 1)
printf "\tjmp.n\t%sr1\n", ps;
else
printf "\tld%s\t%sr%d,%sr3,%d\n", suffix, ps, reg[evenp], ps, ld;
printf "\tst%s\t%sr%d,%sr2,%d\n", suffix, ps, reg[1-evenp], ps, st;
ld += align; st += align;
}
if (!no_tdesc) {
printf "%send%s%dx:\n", la, mode, count * align;
printf "\tsection\t.tdesc,\"%s\"\n", tf;
printf "\tword\t0x42,1,__%smovstr%s%dx%d", us, mode, count * align, count * align;
printf ",%send%s%dx\n", la, mode, count * align;
printf "\tword\t0x0100001f,0,1,0\n";
printf "\ttext\n";
}
printf "; End of awk generated code.\n"
exit;
}'
}
(do_file '"movstrQI16x.s"';
echo 'QI:.b:1:16' | gen_movstrX0) > moveQI16x.asm
(do_file '"movstrHI48x.s"';
echo 'HI:.h:2:48' | gen_movstrX0) > moveHI48x.asm
(do_file '"movstrSI96x.s"';
echo 'SI::4:96' | gen_movstrX0) > moveSI96x.asm
(do_file '"movstrDI96x.s"';
echo 'DI:.d:8:96' | gen_movstrX0) > moveDI96x.asm
#.Implementation_continued[=-----------------------------------------------
#
# This generates the odd-remainder, straight-line modules. The
# interface is the same as that for the even-remainder modules.
#
#.End]=------------------------------------------------------------------*/
gen_movstrXr() {
awk $awk_flag "$awk_begin"'
if (abi) {
ps="#"; us=""; tf="a"; la=".L"; fb=16;
} else {
ps=""; us="_"; tf="x"; la="@L"; fb=8;
}
}
NR == 1 && NF == 4 {
mode = $1; rem = $2; most = $3; count = $4;
suffix[1] = ".b"; suffix[2] = ".h"; suffix[4] = ""; suffix[8] = ".d";
prev = align = most;
ld = align; st = 0; total = count - rem - most;
evenp = int(total/align) % 2;
reg[0] = 4; if (align == 8) reg[1] = 6; else reg[1] = 5;
printf "; The following was calculated using awk.\n";
printf "\ttext\n";
printf "\talign\t%d\n", fb;
for (bytes = total; bytes >= 0; bytes -= align) {
if (bytes < align) {
if (bytes >= 4) align = 4;
else if (bytes >= 2) align = 2;
else align = 1;
}
name = sprintf("__%smovstr%s%dx%d", us, mode, total + most, bytes + most);
if (bytes > most) {
printf "\tglobal\t%s\n", name;
printf "%s:\n", name;
}
if (bytes == 0)
printf "\tjmp.n\t%sr1\n", ps;
else
printf "\tld%s\t%sr%d,%sr3,%d\n", suffix[align], ps, reg[evenp], ps, ld;
printf "\tst%s\t%sr%d,%sr2,%d\n", suffix[prev], ps, reg[1-evenp], ps, st;
ld += align; st += prev; prev = align;
evenp = 1 - evenp;
}
if (!no_tdesc) {
printf "%send%s%dx:\n", la, mode, total + most;
printf "\tsection\t.tdesc,\"%s\"\n", tf;
printf "\tword\t0x42,1,__%smovstr%s%dx%d", us, mode, total + most, total + most;
printf ",%send%s%dx\n", la, mode, total + most;
printf "\tword\t0x0100001f,0,1,0\n";
printf "\ttext\n";
}
printf "; End of awk generated code.\n"
exit;
}'
}
(do_file '"movstrDI47x.s"';
echo 'DI:1:8:48' | gen_movstrXr) > moveDI47x.asm
(do_file '"movstrDI46x.s"';
echo 'DI:2:8:48' | gen_movstrXr) > moveDI46x.asm
(do_file '"movstrDI45x.s"';
echo 'DI:3:8:48' | gen_movstrXr) > moveDI45x.asm
(do_file '"movstrDI44x.s"';
echo 'DI:4:8:48' | gen_movstrXr) > moveDI44x.asm
(do_file '"movstrDI43x.s"';
echo 'DI:5:8:48' | gen_movstrXr) > moveDI43x.asm
(do_file '"movstrDI42x.s"';
echo 'DI:6:8:48' | gen_movstrXr) > moveDI42x.asm
(do_file '"movstrDI41x.s"';
echo 'DI:7:8:48' | gen_movstrXr) > moveDI41x.asm
(do_file '"movstrSI47x.s"';
echo 'SI:1:4:48' | gen_movstrXr) > moveSI47x.asm
(do_file '"movstrSI46x.s"';
echo 'SI:2:4:48' | gen_movstrXr) > moveSI46x.asm
(do_file '"movstrSI45x.s"';
echo 'SI:3:4:48' | gen_movstrXr) > moveSI45x.asm
(do_file '"movstrHI15x.s"';
echo 'HI:1:2:16' | gen_movstrXr) > moveHI15x.asm

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gnu/dist/gcc/config/m88k/m88k.c vendored
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gnu/dist/gcc/config/m88k/m88k.h vendored
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4023
gnu/dist/gcc/config/m88k/m88k.md vendored
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/* Definitions of target machine for GNU compiler.
Motorola m88100 running the AT&T/Unisoft/Motorola V.3 reference port.
Copyright (C) 1990, 1991, 1997 Free Software Foundation, Inc.
Contributed by Ray Essick (ressick@mot.com)
Enhanced by Tom Wood (Tom_Wood@NeXT.com)
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "m88k/m88k.h"
/* Default switches */
#undef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_CHECK_ZERO_DIV | \
MASK_OCS_DEBUG_INFO | \
MASK_OCS_FRAME_POSITION)
/* Macros to be automatically defined. */
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-Dm88000 -Dm88k -Dunix -DsysV88 -D__CLASSIFY_TYPE__=2 -Asystem(unix) -Asystem(svr3) -Acpu(m88k) -Amachine(m88k)"
/* Override svr3.h to link with ?crt0.o instead of ?crt1.o and ?crtn.o.
From arul@sdsu.edu. */
#undef STARTFILE_SPEC
#define STARTFILE_SPEC \
"%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt0.o%s}} crtbegin.o%s"
/* Profiled libraries live in a different directory but keep the same
names other than that. arul@sdsu.edu says -lg is always needed. */
#undef LIB_SPEC
#define LIB_SPEC "%{p:-L/lib/libp}%{pg:%{!p:-L/lib/libp}} -lg -lc crtend.o%s"
/* Hot version of the profiler that uses r10 to pass the address of
the counter. the _gcc_mcount routine knows not to screw with
the parameter registers.
DG/UX does this; i wrote a gnu-c/88k specific version and put it
in libgcc2.c -- RBE; this macro knows about the leading underscore
convention. */
#undef FUNCTION_PROFILER
#define FUNCTION_PROFILER(FILE, LABELNO) \
output_function_profiler (FILE, LABELNO, "_gcc_mcount", 0)
/* Various other changes that we want to have in place without
too many changes to the m88k.h file. */
#undef USE_LIBG
#define USE_LIBG
/* Define a few machine-specific details of the implementation of
constructors. */
/* Although the .init section is used, it is not automatically invoked. */
#define INVOKE__main
/* State that atexit exists so __do_global_ctors will register
__do_global_dtors. */
#define HAVE_ATEXIT
#define CTOR_LIST_BEGIN \
asm (INIT_SECTION_ASM_OP); \
asm ("\tsubu\t r31,r31,16"); /* (STACK_BOUNDARY / BITS_PER_UNIT) == 16 */ \
asm ("\tst\t r0,r31,32"); /* REG_PARM_STACK_SPACE (0) == 32 */
#define CTOR_LIST_END
/* ASM_OUTPUT_CONSTRUCTOR outputs code into the .init section to push the
address of the constructor. This becomes the body of __do_global_ctors
in crtstuff.c. r13 is a temporary register. */
#undef ASM_OUTPUT_CONSTRUCTOR
#define ASM_OUTPUT_CONSTRUCTOR(FILE,NAME) \
do { \
init_section (); \
fprintf (FILE, "\tor.u\t r13,r0,hi16("); \
assemble_name (FILE, NAME); \
fprintf (FILE, ")\n\tor\t r13,r13,lo16("); \
assemble_name (FILE, NAME); \
fprintf (FILE, ")\n\tsubu\t r31,r31,%d\n\tst\t r13,r31,%d\n", \
STACK_BOUNDARY / BITS_PER_UNIT, REG_PARM_STACK_SPACE (0)); \
} while (0)
#undef DO_GLOBAL_CTORS_BODY
#define DO_GLOBAL_CTORS_BODY \
do { \
func_ptr *__CTOR_LIST__ = __builtin_alloca (1), *p; \
for (p = __CTOR_LIST__ + 4; *p; p += 4) \
(*p) (); \
} while (0)
#define DTOR_LIST_BEGIN \
asm (FINI_SECTION_ASM_OP); \
func_ptr __DTOR_LIST__[4] = { (func_ptr) (-1), (func_ptr) (-1), \
(func_ptr) (-1), (func_ptr) (-1) }
#define DTOR_LIST_END \
asm (FINI_SECTION_ASM_OP); \
func_ptr __DTOR_END__[4] = { (func_ptr) 0, (func_ptr) 0, \
(func_ptr) 0, (func_ptr) 0 }
/* A C statement (sans semicolon) to output an element in the table of
global destructors. The table is constructed in the .fini section
so that an explicit linker script is not required. The complication
is that this section is padded with NOP instructions and to either
8 or 16 byte alignment depending on the specific system. A clever
way to avoid trouble is to output a block of 16 bytes where the
extra words are known values (-1). */
#undef ASM_OUTPUT_DESTRUCTOR
#define ASM_OUTPUT_DESTRUCTOR(FILE,NAME) \
do { \
register int i; \
fini_section (); \
fprintf (FILE, "\t%s\t ", ASM_LONG); \
assemble_name (FILE,NAME); \
fprintf (FILE, "\n"); \
for (i = 1; i < 4; i++) \
fprintf (FILE, "\t%s\t -1\n", ASM_LONG); \
} while (0)
/* Walk the list looking for the terminating zero and ignoring all values of
-1. */
#undef DO_GLOBAL_DTORS_BODY
#define DO_GLOBAL_DTORS_BODY \
do { \
int i; \
for (i = 0; __DTOR_LIST__[i] != 0; i++) \
if (((int *)__DTOR_LIST__)[i] != -1) \
__DTOR_LIST__[i] (); \
} while (0)
#undef INITIALIZE_TRAMPOLINE
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 40)), FNADDR); \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 36)), CXT); \
emit_call_insn (gen_call (gen_rtx (MEM, SImode, \
gen_rtx (SYMBOL_REF, Pmode, \
"__enable_execute_stack")), \
const0_rtx)); \
}

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gnu/dist/gcc/config/m88k/sysv4.h vendored
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@ -1,85 +0,0 @@
/* Definitions of target machine for GNU compiler.
Motorola 88100 in an 88open ABI environment.
Copyright (C) 1990, 1991 Free Software Foundation, Inc.
Written by Ron Guilmette (rfg@netcom.com).
Contributed to FSF by Network Computing Devices.
Other contributions by Vince Guarna (vguarna@urbana.mcd.mot.com),
Ray Essick (essick@i88.isc.com), Wilson Tien (wtien@urbana.mcd.mot.com),
and Tom Wood (Tom_Wood@NeXT.com)
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* DWARF_DEBUGGING_INFO defined in svr4.h. */
#ifndef NO_BUGS
#define AS_BUG_DOT_LABELS
#define AS_BUG_POUND_TYPE
#endif
#include "svr4.h"
#include "m88k/m88k.h"
/* Identify the compiler. */
#undef VERSION_INFO1
#define VERSION_INFO1 "88open ABI, "
/* Default switches */
#undef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_CHECK_ZERO_DIV | \
MASK_OCS_DEBUG_INFO | \
MASK_SVR4)
/* Cpp spec. These pre-assertions are needed for SVR4 as they occur
often in the system header files. __svr4__ is our extension. */
#undef CPP_PREDEFINES
#define CPP_PREDEFINES \
"-Dm88000 -Dm88k -Dunix -D__svr4__ -Amachine(m88k) -Acpu(m88k) -Asystem(unix) -Asystem(svr4)"
/* For the AT&T SVR4 port, the function is _mcount. */
#undef FUNCTION_PROFILER
#define FUNCTION_PROFILER(FILE, LABELNO) \
output_function_profiler (FILE, LABELNO, "_mcount", 1)
/* Override svr4.h and m88k.h. */
#undef INIT_SECTION_ASM_OP
#define INIT_SECTION_ASM_OP "section\t.init,\"xa\",#progbits"
#undef FINI_SECTION_ASM_OP
#define FINI_SECTION_ASM_OP "section\t.fini,\"xa\",#progbits"
/* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
Note that we want to give these sections the SHF_WRITE attribute
because these sections will actually contain data (i.e. tables of
addresses of functions in the current root executable or shared library
file) and, in the case of a shared library, the relocatable addresses
will have to be properly resolved/relocated (and then written into) by
the dynamic linker when it actually attaches the given shared library
to the executing process. (Note that on SVR4, you may wish to use the
`-z text' option to the ELF linker, when building a shared library, as
an additional check that you are doing everything right. But if you do
use the `-z text' option when building a shared library, you will get
errors unless the .ctors and .dtors sections are marked as writable
via the SHF_WRITE attribute.) */
#undef CTORS_SECTION_ASM_OP
#define CTORS_SECTION_ASM_OP "section\t.ctors,\"aw\""
#undef DTORS_SECTION_ASM_OP
#define DTORS_SECTION_ASM_OP "section\t.dtors,\"aw\""

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@ -1,12 +0,0 @@
# Specify how to create the *.asm files
MOVE_ASM = moveHI15x.asm moveQI16x.asm moveSI46x.asm moveSI64n.asm \
moveHI48x.asm moveSI45x.asm moveSI47x.asm moveSI96x.asm \
moveDI96x.asm
$(MOVE_ASM): $(srcdir)/config/m88k/m88k-move.sh
$(srcdir)/config/m88k/m88k-move.sh
LIB2FUNCS_EXTRA = $(MOVE_ASM)
LIBGCC1 = libgcc1.null
CROSS_LIBGCC1 = libgcc1.null

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@ -1,26 +0,0 @@
# Specify how to create the *.asm files
MOVE_ASM = moveHI15x.asm moveQI16x.asm moveSI46x.asm moveSI64n.asm \
moveHI48x.asm moveSI45x.asm moveSI47x.asm moveSI96x.asm \
moveDI96x.asm
$(MOVE_ASM): $(srcdir)/config/m88k/m88k-move.sh
$(srcdir)/config/m88k/m88k-move.sh
LIB2FUNCS_EXTRA = $(MOVE_ASM)
LIBGCC1 = libgcc1.null
CROSS_LIBGCC1 = libgcc1.null
# In a coff environment, a link script is required for ctors and dtors.
m88kdgux.ld: $(srcdir)/config/m88k/dgux.ld
rm -f m88kdgux.ld; cp $(srcdir)/config/m88k/dgux.ld ./m88kdgux.ld
# A bcs crtbegin.o is needed since bcs does not
# increment the stack pointer in the init section as elf does
bcscrtbegin.o: crtstuff.c $(GCC_PASSES) $(CONFIG_H) gbl-ctors.h
$(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) -DCRT_BEGIN -DBCS \
-finhibit-size-directive -fno-inline-functions \
-g0 -c $(srcdir)/crtstuff.c -o bcscrtbegin.o
# Build libgcc.a, crtbegin.o, and crtend.o as bcs objects
GCC_FOR_TARGET = PATH=/usr/sde/m88kbcs/usr/bin/:/usr/bin TARGET_BINARY_INTERFACE=m88kbcs ./xgcc -B./ -msvr3 -D_M88KBCS_TARGET -mno-ocs-debug-info

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@ -1,17 +0,0 @@
# Specify how to create the *.asm files
MOVE_ASM = moveHI15x.asm moveQI16x.asm moveSI46x.asm moveSI64n.asm \
moveHI48x.asm moveSI45x.asm moveSI47x.asm moveSI96x.asm \
moveDI96x.asm
$(MOVE_ASM): $(srcdir)/config/m88k/m88k-move.sh
$(srcdir)/config/m88k/m88k-move.sh
LIB2FUNCS_EXTRA = $(MOVE_ASM)
LIBGCC1 = libgcc1.null
CROSS_LIBGCC1 = libgcc1.null
T_CPPFLAGS = -DUSE_GAS
# In a coff environment, a link script is required.
m88kdgux.ld: $(srcdir)/config/m88k/dgux.ld
rm -f m88kdgux.ld; cp $(srcdir)/config/m88k/dgux.ld ./m88kdgux.ld

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@ -1,28 +0,0 @@
# Specify how to create the *.asm files
MOVE_ASM = moveHI15x.asm moveQI16x.asm moveSI46x.asm moveSI64n.asm \
moveHI48x.asm moveSI45x.asm moveSI47x.asm moveSI96x.asm \
moveDI96x.asm
$(MOVE_ASM): $(srcdir)/config/m88k/m88k-move.sh
$(srcdir)/config/m88k/m88k-move.sh
LIB2FUNCS_EXTRA = $(MOVE_ASM)
LIBGCC1 = libgcc1.null
CROSS_LIBGCC1 = libgcc1.null
# In a coff environment, a link script is required for ctors and dtors.
m88kdgux.ld: $(srcdir)/config/m88k/dgux.ld
rm -f m88kdgux.ld; cp $(srcdir)/config/m88k/dgux.ld ./m88kdgux.ld
# A bcs crtbegin.o is needed since bcs does not
# increment the stack pointer in the init section as elf does
bcscrtbegin.o: crtstuff.c $(GCC_PASSES) $(CONFIG_H) gbl-ctors.h
$(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) -DCRT_BEGIN -DBCS \
-finhibit-size-directive -fno-inline-functions \
-g0 -c $(srcdir)/crtstuff.c -o bcscrtbegin.o
# Build libgcc.a, crtbegin.o, and crtend.o as bcs objects
GCC_FOR_TARGET = PATH=/usr/sde/m88kbcs/usr/bin/:/usr/bin TARGET_BINARY_INTERFACE=m88kbcs ./xgcc -B./ -msvr3 -D_M88KBCS_TARGET -mno-ocs-debug-info
T_CFLAGS = -O -D_M88KBCS_TARGET

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@ -1,12 +0,0 @@
# Specify how to create the *.asm files
MOVE_ASM = moveHI15x.asm moveQI16x.asm moveSI46x.asm moveSI64n.asm \
moveHI48x.asm moveSI45x.asm moveSI47x.asm moveSI96x.asm \
moveDI96x.asm
$(MOVE_ASM): $(srcdir)/config/m88k/m88k-move.sh
$(srcdir)/config/m88k/m88k-move.sh -no-tdesc
LIB2FUNCS_EXTRA = $(MOVE_ASM)
LIBGCC1 = libgcc1.null
CROSS_LIBGCC1 = libgcc1.null

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@ -1,13 +0,0 @@
# Specify how to create the *.asm files
MOVE_ASM = moveHI15x.asm moveQI16x.asm moveSI46x.asm moveSI64n.asm \
moveHI48x.asm moveSI45x.asm moveSI47x.asm moveSI96x.asm \
moveDI96x.asm
$(MOVE_ASM): $(srcdir)/config/m88k/m88k-move.sh
bash $(srcdir)/config/m88k/m88k-move.sh -no-tdesc
LIB2FUNCS_EXTRA = $(MOVE_ASM)
LIBGCC1 = libgcc1.null
CROSS_LIBGCC1 = libgcc1.null
T_CPPFLAGS = -DUSE_GAS

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@ -1,12 +0,0 @@
# Specify how to create the *.asm files
MOVE_ASM = moveHI15x.asm moveQI16x.asm moveSI46x.asm moveSI64n.asm \
moveHI48x.asm moveSI45x.asm moveSI47x.asm moveSI96x.asm \
moveDI96x.asm
$(MOVE_ASM): $(srcdir)/config/m88k/m88k-move.sh
$(srcdir)/config/m88k/m88k-move.sh
LIB2FUNCS_EXTRA = $(MOVE_ASM)
LIBGCC1 = libgcc1.null
CROSS_LIBGCC1 = libgcc1.null

18
gnu/dist/gcc/config/m88k/t-m88k-gas vendored
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@ -1,18 +0,0 @@
# Specify how to create the *.asm files
MOVE_ASM = moveHI15x.asm moveQI16x.asm moveSI46x.asm moveSI64n.asm \
moveHI48x.asm moveSI45x.asm moveSI47x.asm moveSI96x.asm \
moveDI96x.asm
$(MOVE_ASM): $(srcdir)/config/m88k/m88k-move.sh
$(srcdir)/config/m88k/m88k-move.sh
LIB2FUNCS_EXTRA = $(MOVE_ASM)
LIBGCC1 = libgcc1.null
CROSS_LIBGCC1 = libgcc1.null
T_CPPFLAGS = -DUSE_GAS
# For svr4 we build crtbegin.o and crtend.o which serve to add begin and
# end labels to the .ctors and .dtors section when we link using gcc.
EXTRA_PARTS=crtbegin.o crtend.o

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@ -1,22 +0,0 @@
# Specify how to create the *.asm files
MOVE_ASM = moveHI15x.asm moveQI16x.asm moveSI46x.asm moveSI64n.asm \
moveHI48x.asm moveSI45x.asm moveSI47x.asm moveSI96x.asm \
moveDI96x.asm
# Use the -abi option for version 03.00 syntax.
$(MOVE_ASM): $(srcdir)/config/m88k/m88k-move.sh
$(srcdir)/config/m88k/m88k-move.sh -abi
LIB2FUNCS_EXTRA = $(MOVE_ASM)
LIBGCC1 = libgcc1.null
CROSS_LIBGCC1 = libgcc1.null
# We need to use -fPIC when we are using gcc to compile the routines in
# crtstuff.c. This is only really needed when we are going to use gcc/g++
# to produce a shared library, but since we don't know ahead of time when
# we will be doing that, we just always use -fPIC when compiling the
# routines in crtstuff.c.
CRTSTUFF_T_CFLAGS=-fPIC

50
gnu/dist/gcc/config/m88k/tekXD88.h vendored
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@ -1,50 +0,0 @@
/* Tektronix XD88 UTekV 3.2e (svr3 derived from UniSoft System V/88)
Copyright (C) 1993 Free Software Foundation, Inc.
Contributed by Kaveh R. Ghazi (ghazi@caip.rutgers.edu) 2/22/93.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA.
*/
#include "m88k/sysv3.h"
/* Don't output structure tag names when it causes a forward reference.
Symptom:
Error messages like
as: "/usr/tmp/cca22733.s": cannot reduce symbol table, unused symbols remain
when compiling some programs.
example program (C++): struct bad { bad(); }; bad::bad() {}
This problem seems to have gone away, perhaps with release 3.6 of the O/S
from Dolphin. */
/* #undef SDB_ALLOW_FORWARD_REFERENCES */
/* I don't know if this SDB thing is needed or not --KRG */
/* Use T_ARG as T_VOID. T_VOID is not defined in <syms.h> as it should be. */
#define T_VOID T_ARG
/* The bundled ld program needs link editor directives which normally
reside in /lib/default.ld. We'll pass our own copy during the link
phase because additional information about extra sections must be added
so that gcc generated files will link properly.
--KRG.
*/
#undef LINK_SPEC
#define LINK_SPEC "gcc.ld%s"

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gnu/dist/gcc/config/m88k/tekXD88.ld vendored
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@ -1,39 +0,0 @@
/* gcc.ld - COFF linker directives for the Tektronix XD88.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA.
This file does the following:
- Sets VIRTUAL addr of .text to 0x10200
Sets FILE addr of .text to 0x200 (BLOCK directive)
- Depending on size of .text section rounds up to next
4 MG boundary, adds (size of .text and vaddr of .text) mod 64K
This is to handle sections larger than 4 MG.
*/
SECTIONS {
.text 0x10200 BLOCK (0x200):
{ *(.init) *(.text) *(.rodata) *(.tdesc) *(.fini)}
GROUP BIND( ((SIZEOF(.text) / 0x400000 * 0x400000) + 0x400000) +
((SIZEOF(.text) + ADDR(.text)) % 0x10000) ) :
{
.data : { }
.bss : { }
}
}

6
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@ -1,6 +0,0 @@
CC = gcc
BISONFLAGS = -l
USER_H = $(EXTRA_HEADERS) $(LANG_EXTRA_HEADERS)
STMP_FIXPROTO =
X_CFLAGS = -O -mstandard -mlegend

4
gnu/dist/gcc/config/m88k/x-dguxbcs vendored
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@ -1,4 +0,0 @@
CC = gcc
BISONFLAGS = -l
USER_H = $(EXTRA_HEADERS) $(LANG_EXTRA_HEADERS)
STMP_FIXPROTO =

19
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@ -1,19 +0,0 @@
# Use link editor directives to make NULL pointers point to
# invalid addresses.
EXTRA_PARTS=crtbegin.o crtend.o gcc.ld
gcc.ld: $(srcdir)/config/m88k/dolphin.ld
rm -f gcc.ld; cp $(srcdir)/config/m88k/dolphin.ld gcc.ld
# Green Hills C on Dolphin UNIX System V/88 Release 3.2 Version 3.6/5.86 does
# not provide alloca. It does not harm to have it defined on version 3.8.alfa
# even though it's not needed there.
ALLOCA=alloca.o
# Under DolphinOS 3.8.alfa, /bin/cc defines __GNUC__, but not __m88k__,
# causing gdstarg.h to fail. Defining __m88k__ does probably not hurt on
# DolphinOS 3.6.
X_CFLAGS =-D__m88k__

7
gnu/dist/gcc/config/m88k/x-sysv3 vendored
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@ -1,7 +0,0 @@
# this is m88k/x-sysv3
# native compiler does not provide alloca
ALLOCA = alloca.o
# end m88k/x-sysv3

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@ -1,10 +0,0 @@
# Problems in early version of the assembler have been fixed (-DNO_BUGS).
# There are peculiar problems with the include files that require __STDC__
# to be defined as 0. This results in sigset_t being defined which otherwise
# results in a problem when <wait.h> includes <siginfo.h>.
X_CFLAGS = -DNO_BUGS -D__STDC__=0
# The CI5 compiler does not provide alloca.
ALLOCA = alloca.o

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@ -1,12 +0,0 @@
# Install the custom Tektronix XD88 link editor directives file.
EXTRA_PARTS=crtbegin.o crtend.o gcc.ld
gcc.ld: $(srcdir)/config/m88k/tekXD88.ld
rm -f gcc.ld; cp $(srcdir)/config/m88k/tekXD88.ld ./gcc.ld
# Green Hills C on the Tektronix XD88 does not provide alloca.
ALLOCA=alloca.o
# rc is cleaner, but the ar program sometimes crashes.
# This is a workaround.
AR_FLAGS=qc

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@ -1,61 +0,0 @@
/* Configuration for GNU compiler.
Motorola m88100 in an 88open OCS/BCS environment.
Copyright (C) 1988, 89, 90, 91, 93, 1997 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* #defines that need visibility everywhere. */
#define FALSE 0
#define TRUE 1
/* This describes the machine the compiler is hosted on. */
#define HOST_BITS_PER_CHAR 8
#define HOST_BITS_PER_SHORT 16
#define HOST_BITS_PER_INT 32
#define HOST_BITS_PER_LONG 32
#define HOST_BITS_PER_LONGLONG 64
#define HOST_WORDS_BIG_ENDIAN
/* Arguments to use with `exit'. */
#define SUCCESS_EXIT_CODE 0
#define FATAL_EXIT_CODE 33
/* The 88open BCS (and ABI) environment doesn't support BSD features
(vfork, getrusage), so use USG. The Omron Luna/88k is BSD though. */
#ifndef luna88k
#ifndef USG
#define USG
#endif
#define NO_SYS_SIGLIST
#endif
/* If not compiled with GNU C, use the C alloca */
#ifndef __GNUC__
#define USE_C_ALLOCA
#endif
/* For DG/UX, the best size is different. */
#ifdef __DGUX__
#define OBSTACK_CHUNK_SIZE (8192-16)
#endif
/* target machine dependencies.
tm.h is a symbolic link to the actual target specific file. */
#include "tm.h"

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@ -1,32 +0,0 @@
/* Configuration for GNU C-compiler.
Motorola m88100 running the AT&T/Unisoft/Motorola V.3 reference port.
Copyright (C) 1990, 1998 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#define R_OK 4
#define W_OK 2
#define X_OK 1
#define F_OK 0
/* for the emacs version of alloca */
#define STACK_DIRECTION -1
/* We need POSIX/XOPEN symbols; otherwise make check will fail. */
#define ADD_MISSING_POSIX 1
#define ADD_MISSING_XOPEN 1

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gnu/dist/gcc/config/mips/abi64.h vendored
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/* Definitions of target machine for GNU compiler. 64 bit ABI support.
Copyright (C) 1994, 1995, 1996, 1998 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* Macros to implement the 64 bit ABI. This file is meant to be included
after mips.h. */
#undef SUBTARGET_TARGET_OPTIONS
#define SUBTARGET_TARGET_OPTIONS\
{ "abi=", &mips_abi_string },
#undef STACK_BOUNDARY
#define STACK_BOUNDARY \
((mips_abi == ABI_32 || mips_abi == ABI_EABI) ? 64 : 128)
#undef MIPS_STACK_ALIGN
#define MIPS_STACK_ALIGN(LOC) \
((mips_abi == ABI_32 || mips_abi == ABI_EABI) \
? ((LOC) + 7) & ~7 \
: ((LOC) + 15) & ~15)
#undef GP_ARG_LAST
#define GP_ARG_LAST (mips_abi == ABI_32 ? GP_REG_FIRST + 7 : GP_REG_FIRST + 11)
#undef FP_ARG_LAST
#define FP_ARG_LAST (mips_abi == ABI_32 ? FP_REG_FIRST + 15 : FP_REG_FIRST + 19)
#undef SUBTARGET_CONDITIONAL_REGISTER_USAGE
#define SUBTARGET_CONDITIONAL_REGISTER_USAGE \
{ \
/* fp20-23 are now caller saved. */ \
if (mips_abi == ABI_64) \
{ \
int regno; \
for (regno = FP_REG_FIRST + 20; regno < FP_REG_FIRST + 24; regno++) \
call_used_regs[regno] = 1; \
} \
/* odd registers from fp21 to fp31 are now caller saved. */ \
if (mips_abi == ABI_N32) \
{ \
int regno; \
for (regno = FP_REG_FIRST + 21; regno <= FP_REG_FIRST + 31; regno+=2) \
call_used_regs[regno] = 1; \
} \
}
#undef MAX_ARGS_IN_REGISTERS
#define MAX_ARGS_IN_REGISTERS (mips_abi == ABI_32 ? 4 : 8)
#undef REG_PARM_STACK_SPACE
#define REG_PARM_STACK_SPACE(FNDECL) \
(mips_abi == ABI_32 \
? (MAX_ARGS_IN_REGISTERS*UNITS_PER_WORD) - FIRST_PARM_OFFSET (FNDECL) \
: 0)
#define FUNCTION_ARG_PADDING(MODE, TYPE) \
(! BYTES_BIG_ENDIAN \
? upward \
: (((MODE) == BLKmode \
? ((TYPE) && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST \
&& int_size_in_bytes (TYPE) < (PARM_BOUNDARY / BITS_PER_UNIT))\
: (GET_MODE_BITSIZE (MODE) < PARM_BOUNDARY \
&& (mips_abi == ABI_32 || mips_abi == ABI_EABI \
|| GET_MODE_CLASS (MODE) == MODE_INT))) \
? downward : upward))
#undef RETURN_IN_MEMORY
#define RETURN_IN_MEMORY(TYPE) \
(mips_abi == ABI_32 \
? TYPE_MODE (TYPE) == BLKmode \
: (int_size_in_bytes (TYPE) \
> (mips_abi == ABI_EABI ? 2 * UNITS_PER_WORD : 16)))
extern struct rtx_def *mips_function_value ();
#undef FUNCTION_VALUE
#define FUNCTION_VALUE(VALTYPE, FUNC) mips_function_value (VALTYPE, FUNC)
/* For varargs, we must save the current argument, because it is the fake
argument va_alist, and will need to be converted to the real argument.
For stdarg, we do not need to save the current argument, because it
is a real argument. */
#define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
{ int mips_off = (! current_function_varargs) && (! (CUM).last_arg_fp); \
int mips_fp_off = (! current_function_varargs) && ((CUM).last_arg_fp); \
if ((mips_abi != ABI_32 \
&& (CUM).arg_words < MAX_ARGS_IN_REGISTERS - mips_off) \
|| (mips_abi == ABI_EABI \
&& ! TARGET_SOFT_FLOAT \
&& (CUM).fp_arg_words < MAX_ARGS_IN_REGISTERS - mips_fp_off)) \
{ \
int mips_save_gp_regs = \
MAX_ARGS_IN_REGISTERS - (CUM).arg_words - mips_off; \
int mips_save_fp_regs = \
(mips_abi != ABI_EABI ? 0 \
: MAX_ARGS_IN_REGISTERS - (CUM).fp_arg_words - mips_fp_off); \
\
if (mips_save_gp_regs < 0) \
mips_save_gp_regs = 0; \
if (mips_save_fp_regs < 0) \
mips_save_fp_regs = 0; \
PRETEND_SIZE = ((mips_save_gp_regs * UNITS_PER_WORD) \
+ (mips_save_fp_regs * UNITS_PER_FPREG)); \
\
if (! (NO_RTL)) \
{ \
if ((CUM).arg_words < MAX_ARGS_IN_REGISTERS - mips_off) \
{ \
rtx ptr, mem; \
if (mips_abi != ABI_EABI) \
ptr = virtual_incoming_args_rtx; \
else \
ptr = plus_constant (virtual_incoming_args_rtx, \
- (mips_save_gp_regs \
* UNITS_PER_WORD)); \
mem = gen_rtx (MEM, BLKmode, ptr); \
/* va_arg is an array access in this case, which causes \
it to get MEM_IN_STRUCT_P set. We must set it here \
so that the insn scheduler won't assume that these \
stores can't possibly overlap with the va_arg loads. */ \
if (mips_abi != ABI_EABI && BYTES_BIG_ENDIAN) \
MEM_IN_STRUCT_P (mem) = 1; \
move_block_from_reg \
((CUM).arg_words + GP_ARG_FIRST + mips_off, \
mem, \
mips_save_gp_regs, \
mips_save_gp_regs * UNITS_PER_WORD); \
} \
if (mips_abi == ABI_EABI \
&& ! TARGET_SOFT_FLOAT \
&& (CUM).fp_arg_words < MAX_ARGS_IN_REGISTERS - mips_fp_off) \
{ \
enum machine_mode mode = TARGET_SINGLE_FLOAT ? SFmode : DFmode; \
int size = GET_MODE_SIZE (mode); \
int off; \
int i; \
/* We can't use move_block_from_reg, because it will use \
the wrong mode. */ \
off = - (mips_save_gp_regs * UNITS_PER_WORD); \
if (! TARGET_SINGLE_FLOAT) \
off &= ~ 7; \
if (! TARGET_FLOAT64 || TARGET_SINGLE_FLOAT) \
off -= (mips_save_fp_regs / 2) * size; \
else \
off -= mips_save_fp_regs * size; \
for (i = 0; i < mips_save_fp_regs; i++) \
{ \
rtx tem = \
gen_rtx (MEM, mode, \
plus_constant (virtual_incoming_args_rtx, \
off)); \
emit_move_insn (tem, \
gen_rtx (REG, mode, \
((CUM).fp_arg_words \
+ FP_ARG_FIRST \
+ i \
+ mips_fp_off))); \
off += size; \
if (! TARGET_FLOAT64 || TARGET_SINGLE_FLOAT) \
++i; \
} \
} \
} \
} \
}
#define STRICT_ARGUMENT_NAMING (mips_abi != ABI_32)
/* A C expression that indicates when an argument must be passed by
reference. If nonzero for an argument, a copy of that argument is
made in memory and a pointer to the argument is passed instead of the
argument itself. The pointer is passed in whatever way is appropriate
for passing a pointer to that type. */
#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
(mips_abi == ABI_EABI \
&& function_arg_pass_by_reference (&CUM, MODE, TYPE, NAMED))
/* A C expression that indicates when it is the called function's
responsibility to make a copy of arguments passed by invisible
reference. Normally, the caller makes a copy and passes the
address of the copy to the routine being called. When
FUNCTION_ARG_CALLEE_COPIES is defined and is nonzero, the caller
does not make a copy. Instead, it passes a pointer to the "live"
value. The called function must not modify this value. If it can
be determined that the value won't be modified, it need not make a
copy; otherwise a copy must be made.
??? The MIPS EABI says that the caller should copy in ``K&R mode.''
I don't know how to detect that here, since flag_traditional is not
a back end flag. */
#define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \
(mips_abi == ABI_EABI && (NAMED) \
&& FUNCTION_ARG_PASS_BY_REFERENCE (CUM, MODE, TYPE, NAMED))
/* Define LONG_MAX correctly for all users. We need to handle 32 bit EABI,
64 bit EABI, N32, and N64 as possible defaults. The checks performed here
are the same as the checks in override_options in mips.c that determines
whether MASK_LONG64 will be set.
This does not handle inappropriate options or ununusal option
combinations. */
#undef LONG_MAX_SPEC
#if ((MIPS_ABI_DEFAULT == ABI_64) || ((MIPS_ABI_DEFAULT == ABI_EABI) && ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_64BIT)))
#define LONG_MAX_SPEC \
"%{!mabi=n32:%{!mno-long64:%{!mgp32:-D__LONG_MAX__=9223372036854775807L}}}"
#else
#define LONG_MAX_SPEC \
"%{mabi=64:-D__LONG_MAX__=9223372036854775807L} \
%{mlong64:-D__LONG_MAX__=9223372036854775807L} \
%{mgp64:-D__LONG_MAX__=9223372036854775807L}"
#endif
/* ??? Unimplemented stuff follows. */
/* ??? Add support for 16 byte/128 bit long doubles here when
mips_abi != ABI32. */
/* ??? Make main return zero if user did not specify return value. */
/* ??? Add support for .interfaces section, so as to get linker warnings
when stdarg functions called without prototype in scope? */
/* ??? Could optimize structure passing by putting the right register rtx
into the field decl, so that if we use the field, we can take the value from
a register instead of from memory. */

34
gnu/dist/gcc/config/mips/cross64.h vendored
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@ -1,34 +0,0 @@
/* Configuration for an Irix 5 host and Irix 6 target using SGI's cross64
package. */
#define STANDARD_INCLUDE_DIR "/usr/cross64/usr/include"
#undef MD_EXEC_PREFIX
#define MD_EXEC_PREFIX "/usr/cross64/usr/bin/"
#undef MD_STARTFILE_PREFIX
#define MD_STARTFILE_PREFIX "/usr/cross64/usr/lib/lib64/"
/* Must add TOOLROOT to the environment, or else the assembler will not
work. */
#define INIT_ENVIRONMENT \
"TOOLROOT=/usr/cross64"
#undef STARTFILE_SPEC
#define STARTFILE_SPEC \
"%{mips1:%{pg:gcrt1.o%s}%{!pg:%{p:mcrt1.o%s libprof1.a%s}%{!p:crt1.o%s}}} \
%{mips2:%{pg:gcrt1.o%s}%{!pg:%{p:mcrt1.o%s libprof1.a%s}%{!p:crt1.o%s}}} \
%{!mips1:%{!mips2:%{pg:/usr/cross64/usr/lib64/mips4/gcrt1.o} \
%{!pg:%{p:/usr/cross64/usr/lib64/mips4/mcrt1.o \
/usr/cross64/usr/lib64/mips4/libprof1.a} \
%{!p:/usr/cross64/usr/lib64/mips4/crt1.o}}}}"
#undef ENDFILE_SPEC
#define ENDFILE_SPEC \
"%{mips1:crtn.o%s}%{mips2:crtn.o%s}%{!mips1:%{!mips2:/usr/cross64/usr/lib64/mips4/crtn.o}}"
#undef LINK_SPEC
#define LINK_SPEC "\
-64 -_SYSTYPE_SVR4 %{G*} %{EB} %{EL} %{mips1} %{mips2} %{mips3} %{mips4} \
%{bestGnum} %{shared} %{non_shared} \
%{call_shared} %{no_archive} %{exact_version} \
%{!shared: %{!non_shared: %{!call_shared: -call_shared -no_unresolved}}} \
%{!mips1:%{!mips2:-L/usr/cross64/usr/lib64/mips4 -L/usr/cross64/usr/lib64}}"

35
gnu/dist/gcc/config/mips/ecoff.h vendored
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@ -1,35 +0,0 @@
/* Definitions of target machine for GNU compiler. MIPS version with
GOFAST floating point library.
Copyright (C) 1994, 1998 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* US Software GOFAST library support. */
#define INIT_SUBTARGET_OPTABS INIT_GOFAST_OPTABS
#include "mips/mips.h"
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-Dmips -DMIPSEB -DR3000 -D_mips -D_MIPSEB -D_R3000"
/* Use memcpy, et. al., rather than bcopy. */
#define TARGET_MEM_FUNCTIONS
/* Don't assume anything about startfiles. The linker script will load the
appropriate startfiles. */
#define STARTFILE_SPEC ""

30
gnu/dist/gcc/config/mips/ecoffl.h vendored
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@ -1,30 +0,0 @@
/* Definitions of target machine for GNU compiler. Little endian MIPS
version with GOFAST floating point library.
Copyright (C) 1994, 1998 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* This is a little endian version of ecoff.h. */
#define TARGET_ENDIAN_DEFAULT 0
#include "gofast.h"
#include "mips/ecoff.h"
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-Dmips -DMIPSEL -DR3000 -D_mips -D_MIPSEL -D_R3000"

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gnu/dist/gcc/config/mips/elf.h vendored
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@ -1,171 +0,0 @@
/* Definitions of target machine for GNU compiler. MIPS R3000 version with
GOFAST floating point library.
Copyright (C) 1994, 1997 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* Use ELF. */
#define OBJECT_FORMAT_ELF
/* Until we figure out what MIPS ELF targets normally use, just do
stabs in ELF. */
#ifndef PREFERRED_DEBUGGING_TYPE
#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
#endif
/* Mostly like ECOFF. */
#include "gofast.h"
#include "mips/ecoff.h"
/* We need to use .esize and .etype instead of .size and .type to
avoid conflicting with ELF directives. */
#undef PUT_SDB_SIZE
#define PUT_SDB_SIZE(a) \
do { \
extern FILE *asm_out_text_file; \
fprintf (asm_out_text_file, "\t.esize\t%d;", (a)); \
} while (0)
#undef PUT_SDB_TYPE
#define PUT_SDB_TYPE(a) \
do { \
extern FILE *asm_out_text_file; \
fprintf (asm_out_text_file, "\t.etype\t0x%x;", (a)); \
} while (0)
/* Biggest alignment supported by the object file format of this
machine. Use this macro to limit the alignment which can be
specified using the `__attribute__ ((aligned (N)))' construct. If
not defined, the default value is `BIGGEST_ALIGNMENT'. */
#define MAX_OFILE_ALIGNMENT (32768*8)
/* A C statement to output something to the assembler file to switch to section
NAME for object DECL which is either a FUNCTION_DECL, a VAR_DECL or
NULL_TREE. Some target formats do not support arbitrary sections. Do not
define this macro in such cases. */
#define ASM_OUTPUT_SECTION_NAME(F, DECL, NAME, RELOC) \
do { \
extern FILE *asm_out_text_file; \
if ((DECL) && TREE_CODE (DECL) == FUNCTION_DECL) \
fprintf (asm_out_text_file, "\t.section %s,\"ax\",@progbits\n", (NAME)); \
else if ((DECL) && DECL_READONLY_SECTION (DECL, RELOC)) \
fprintf (F, "\t.section %s,\"a\",@progbits\n", (NAME)); \
else \
fprintf (F, "\t.section %s,\"aw\",@progbits\n", (NAME)); \
} while (0)
/* The following macro defines the format used to output the second
operand of the .type assembler directive. Different svr4 assemblers
expect various different forms for this operand. The one given here
is just a default. You may need to override it in your machine-
specific tm.h file (depending upon the particulars of your assembler). */
#define TYPE_OPERAND_FMT "@%s"
/* Define the strings used for the special svr4 .type and .size directives.
These strings generally do not vary from one system running svr4 to
another, but if a given system (e.g. m88k running svr) needs to use
different pseudo-op names for these, they may be overridden in the
file which includes this one. */
#undef TYPE_ASM_OP
#undef SIZE_ASM_OP
#define TYPE_ASM_OP ".type"
#define SIZE_ASM_OP ".size"
/* These macros generate the special .type and .size directives which
are used to set the corresponding fields of the linker symbol table
entries in an ELF object file under SVR4. These macros also output
the starting labels for the relevant functions/objects. */
/* Write the extra assembler code needed to declare an object properly. */
#undef ASM_DECLARE_OBJECT_NAME
#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
do { \
fprintf (FILE, "\t%s\t ", TYPE_ASM_OP); \
assemble_name (FILE, NAME); \
putc (',', FILE); \
fprintf (FILE, TYPE_OPERAND_FMT, "object"); \
putc ('\n', FILE); \
size_directive_output = 0; \
if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \
{ \
size_directive_output = 1; \
fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
assemble_name (FILE, NAME); \
fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL))); \
} \
mips_declare_object (FILE, NAME, "", ":\n", 0); \
} while (0)
/* Output the size directive for a decl in rest_of_decl_compilation
in the case where we did not do so before the initializer.
Once we find the error_mark_node, we know that the value of
size_directive_output was set
by ASM_DECLARE_OBJECT_NAME when it was run for the same decl. */
#undef ASM_FINISH_DECLARE_OBJECT
#define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
do { \
char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
&& ! AT_END && TOP_LEVEL \
&& DECL_INITIAL (DECL) == error_mark_node \
&& !size_directive_output) \
{ \
size_directive_output = 1; \
fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
assemble_name (FILE, name); \
fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL))); \
} \
} while (0)
#define ASM_OUTPUT_DEF(FILE,LABEL1,LABEL2) \
do { fputc ( '\t', FILE); \
assemble_name (FILE, LABEL1); \
fputs ( " = ", FILE); \
assemble_name (FILE, LABEL2); \
fputc ( '\n', FILE); \
} while (0)
/* Note about .weak vs. .weakext
The mips native assemblers support .weakext, but not .weak.
mips-elf gas supports .weak, but not .weakext.
mips-elf gas has been changed to support both .weak and .weakext,
but until that support is generally available, the 'if' below
should serve. */
#define ASM_WEAKEN_LABEL(FILE,NAME) ASM_OUTPUT_WEAK_ALIAS(FILE,NAME,0)
#define ASM_OUTPUT_WEAK_ALIAS(FILE,NAME,VALUE) \
do { \
if (TARGET_GAS) \
fputs ("\t.weak\t", FILE); \
else \
fputs ("\t.weakext\t", FILE); \
assemble_name (FILE, NAME); \
if (VALUE) \
{ \
fputc (' ', FILE); \
assemble_name (FILE, VALUE); \
} \
fputc ('\n', FILE); \
} while (0)

197
gnu/dist/gcc/config/mips/elf64.h vendored
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@ -1,197 +0,0 @@
/* Definitions of target machine for GNU compiler. MIPS R4000 version with
GOFAST floating point library.
Copyright (C) 1994, 1995, 1996, 1997 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#define OBJECT_FORMAT_ELF
/* Default to -mips3. */
#define TARGET_DEFAULT MASK_FLOAT64|MASK_64BIT
#define MIPS_ISA_DEFAULT 3
/* Until we figure out what MIPS ELF targets normally use, just do
stabs in ELF. */
#ifndef PREFERRED_DEBUGGING_TYPE
#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
#endif
/* US Software GOFAST library support. */
#include "gofast.h"
#define INIT_SUBTARGET_OPTABS INIT_GOFAST_OPTABS
#include "mips/mips.h"
/* This must be done after mips.h, because mips.h defines
TARGET_ENDIAN_DEFAULT. */
#undef MULTILIB_DEFAULTS
#if TARGET_ENDIAN_DEFAULT == 0
#define MULTILIB_DEFAULTS { "EL", "mips3" }
#else
#define MULTILIB_DEFAULTS { "EB", "mips3" }
#endif
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-Dmips -DMIPSEB -DR4000 -D_mips -D_MIPSEB -D_R4000"
/* I would rather put this in CPP_PREDEFINES, but the gcc driver
doesn't handle -U options in CPP_PREDEFINES. */
#undef SUBTARGET_CPP_SPEC
#define SUBTARGET_CPP_SPEC "\
%{!mips1:%{!mips2:-U__mips -D__mips=3 -D__mips64}}"
/* Use memcpy, et. al., rather than bcopy. */
#define TARGET_MEM_FUNCTIONS
/* Biggest alignment supported by the object file format of this
machine. Use this macro to limit the alignment which can be
specified using the `__attribute__ ((aligned (N)))' construct. If
not defined, the default value is `BIGGEST_ALIGNMENT'. */
#define MAX_OFILE_ALIGNMENT (32768*8)
/* We need to use .esize and .etype instead of .size and .type to
avoid conflicting with ELF directives. */
#undef PUT_SDB_SIZE
#define PUT_SDB_SIZE(a) \
do { \
extern FILE *asm_out_text_file; \
fprintf (asm_out_text_file, "\t.esize\t%d;", (a)); \
} while (0)
#undef PUT_SDB_TYPE
#define PUT_SDB_TYPE(a) \
do { \
extern FILE *asm_out_text_file; \
fprintf (asm_out_text_file, "\t.etype\t0x%x;", (a)); \
} while (0)
/* A C statement to output something to the assembler file to switch to section
NAME for object DECL which is either a FUNCTION_DECL, a VAR_DECL or
NULL_TREE. Some target formats do not support arbitrary sections. Do not
define this macro in such cases. */
#define ASM_OUTPUT_SECTION_NAME(F, DECL, NAME, RELOC) \
do { \
extern FILE *asm_out_text_file; \
if ((DECL) && TREE_CODE (DECL) == FUNCTION_DECL) \
fprintf (asm_out_text_file, "\t.section %s,\"ax\",@progbits\n", (NAME)); \
else if ((DECL) && DECL_READONLY_SECTION (DECL, RELOC)) \
fprintf (F, "\t.section %s,\"a\",@progbits\n", (NAME)); \
else \
fprintf (F, "\t.section %s,\"aw\",@progbits\n", (NAME)); \
} while (0)
/* The following macro defines the format used to output the second
operand of the .type assembler directive. Different svr4 assemblers
expect various different forms for this operand. The one given here
is just a default. You may need to override it in your machine-
specific tm.h file (depending upon the particulars of your assembler). */
#define TYPE_OPERAND_FMT "@%s"
/* Define the strings used for the special svr4 .type and .size directives.
These strings generally do not vary from one system running svr4 to
another, but if a given system (e.g. m88k running svr) needs to use
different pseudo-op names for these, they may be overridden in the
file which includes this one. */
#undef TYPE_ASM_OP
#undef SIZE_ASM_OP
#define TYPE_ASM_OP ".type"
#define SIZE_ASM_OP ".size"
/* These macros generate the special .type and .size directives which
are used to set the corresponding fields of the linker symbol table
entries in an ELF object file under SVR4. These macros also output
the starting labels for the relevant functions/objects. */
/* Write the extra assembler code needed to declare an object properly. */
#undef ASM_DECLARE_OBJECT_NAME
#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
do { \
fprintf (FILE, "\t%s\t ", TYPE_ASM_OP); \
assemble_name (FILE, NAME); \
putc (',', FILE); \
fprintf (FILE, TYPE_OPERAND_FMT, "object"); \
putc ('\n', FILE); \
size_directive_output = 0; \
if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \
{ \
size_directive_output = 1; \
fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
assemble_name (FILE, NAME); \
fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL))); \
} \
mips_declare_object (FILE, NAME, "", ":\n", 0); \
} while (0)
/* Output the size directive for a decl in rest_of_decl_compilation
in the case where we did not do so before the initializer.
Once we find the error_mark_node, we know that the value of
size_directive_output was set
by ASM_DECLARE_OBJECT_NAME when it was run for the same decl. */
#undef ASM_FINISH_DECLARE_OBJECT
#define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
do { \
char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
&& ! AT_END && TOP_LEVEL \
&& DECL_INITIAL (DECL) == error_mark_node \
&& !size_directive_output) \
{ \
size_directive_output = 1; \
fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
assemble_name (FILE, name); \
fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL))); \
} \
} while (0)
#define ASM_OUTPUT_DEF(FILE,LABEL1,LABEL2) \
do { fputc ( '\t', FILE); \
assemble_name (FILE, LABEL1); \
fputs ( " = ", FILE); \
assemble_name (FILE, LABEL2); \
fputc ( '\n', FILE); \
} while (0)
/* Note about .weak vs. .weakext
The mips native assemblers support .weakext, but not .weak.
mips-elf gas supports .weak, but not .weakext.
mips-elf gas has been changed to support both .weak and .weakext,
but until that support is generally available, the 'if' below
should serve. */
#define ASM_WEAKEN_LABEL(FILE,NAME) ASM_OUTPUT_WEAK_ALIAS(FILE,NAME,0)
#define ASM_OUTPUT_WEAK_ALIAS(FILE,NAME,VALUE) \
do { \
if (TARGET_GAS) \
fputs ("\t.weak\t", FILE); \
else \
fputs ("\t.weakext\t", FILE); \
assemble_name (FILE, NAME); \
if (VALUE) \
{ \
fputc (' ', FILE); \
assemble_name (FILE, VALUE); \
} \
fputc ('\n', FILE); \
} while (0)

29
gnu/dist/gcc/config/mips/elfl.h vendored
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@ -1,29 +0,0 @@
/* Definitions of target machine for GNU compiler. Little endian MIPS
R3000 version with GOFAST floating point library.
Copyright (C) 1994 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* This is a little endian version of elf.h. */
#define TARGET_ENDIAN_DEFAULT 0
#include "mips/elf.h"
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-Dmips -DMIPSEL -DR3000 -D_mips -D_MIPSEL -D_R3000"

29
gnu/dist/gcc/config/mips/elfl64.h vendored
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/* Definitions of target machine for GNU compiler. Little endian MIPS
R4000 version with GOFAST floating point library.
Copyright (C) 1994 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* This is a little endian version of elf64.h. */
#define TARGET_ENDIAN_DEFAULT 0
#include "mips/elf64.h"
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-Dmips -DMIPSEL -DR4000 -D_mips -D_MIPSEL -D_R4000"

24
gnu/dist/gcc/config/mips/elflorion.h vendored
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@ -1,24 +0,0 @@
/* Definitions of target machine for GNU compiler. MIPS ORION version with
GOFAST floating point library.
Copyright (C) 1994 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#define MIPS_CPU_STRING_DEFAULT "orion"
#include "mips/elfl64.h"

22
gnu/dist/gcc/config/mips/elforion.h vendored
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@ -1,22 +0,0 @@
/* Definitions of target machine for GNU compiler. MIPS ORION version with
GOFAST floating point library.
Copyright (C) 1994, 1998 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#define MIPS_CPU_STRING_DEFAULT "orion"

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gnu/dist/gcc/config/mips/mips.h vendored
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10012
gnu/dist/gcc/config/mips/mips.md vendored
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gnu/dist/gcc/config/mips/mips16.S vendored
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/* mips16 floating point support code
Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
Contributed by Cygnus Support
This file is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the
Free Software Foundation; either version 2, or (at your option) any
later version.
In addition to the permissions in the GNU General Public License, the
Free Software Foundation gives you unlimited permission to link the
compiled version of this file with other programs, and to distribute
those programs without any restriction coming from the use of this
file. (The General Public License restrictions do apply in other
respects; for example, they cover modification of the file, and
distribution when not linked into another program.)
This file is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* As a special exception, if you link this library with other files,
some of which are compiled with GCC, to produce an executable,
this library does not by itself cause the resulting executable
to be covered by the GNU General Public License.
This exception does not however invalidate any other reasons why
the executable file might be covered by the GNU General Public License. */
/* This file contains mips16 floating point support functions. These
functions are called by mips16 code to handle floating point when
-msoft-float is not used. They accept the arguments and return
values using the soft-float calling convention, but do the actual
operation using the hard floating point instructions. */
/* This file contains 32 bit assembly code. */
.set nomips16
/* Start a function. */
#define STARTFN(NAME) .globl NAME; .ent NAME; NAME:
/* Finish a function. */
#define ENDFN(NAME) .end NAME
/* Single precision math. */
/* This macro defines a function which loads two single precision
values, performs an operation, and returns the single precision
result. */
#define SFOP(NAME, OPCODE) \
STARTFN (NAME); \
.set noreorder; \
mtc1 $4,$f0; \
mtc1 $5,$f2; \
nop; \
OPCODE $f0,$f0,$f2; \
mfc1 $2,$f0; \
j $31; \
nop; \
.set reorder; \
ENDFN (NAME)
#ifdef L_m16addsf3
SFOP(__mips16_addsf3, add.s)
#endif
#ifdef L_m16subsf3
SFOP(__mips16_subsf3, sub.s)
#endif
#ifdef L_m16mulsf3
SFOP(__mips16_mulsf3, mul.s)
#endif
#ifdef L_m16divsf3
SFOP(__mips16_divsf3, div.s)
#endif
#define SFOP2(NAME, OPCODE) \
STARTFN (NAME); \
.set noreorder; \
mtc1 $4,$f0; \
nop; \
OPCODE $f0,$f0; \
mfc1 $2,$f0; \
j $31; \
nop; \
.set reorder; \
ENDFN (NAME)
#ifdef L_m16negsf2
SFOP2(__mips16_negsf2, neg.s)
#endif
#ifdef L_m16abssf2
SFOP2(__mips16_abssf2, abs.s)
#endif
/* Single precision comparisons. */
/* This macro defines a function which loads two single precision
values, performs a floating point comparison, and returns the
specified values according to whether the comparison is true or
false. */
#define SFCMP(NAME, OPCODE, TRUE, FALSE) \
STARTFN (NAME); \
mtc1 $4,$f0; \
mtc1 $5,$f2; \
OPCODE $f0,$f2; \
li $2,TRUE; \
bc1t 1f; \
li $2,FALSE; \
1:; \
j $31; \
ENDFN (NAME)
/* This macro is like SFCMP, but it reverses the comparison. */
#define SFREVCMP(NAME, OPCODE, TRUE, FALSE) \
STARTFN (NAME); \
mtc1 $4,$f0; \
mtc1 $5,$f2; \
OPCODE $f2,$f0; \
li $2,TRUE; \
bc1t 1f; \
li $2,FALSE; \
1:; \
j $31; \
ENDFN (NAME)
#ifdef L_m16eqsf2
SFCMP(__mips16_eqsf2, c.eq.s, 0, 1)
#endif
#ifdef L_m16nesf2
SFCMP(__mips16_nesf2, c.eq.s, 0, 1)
#endif
#ifdef L_m16gtsf2
SFREVCMP(__mips16_gtsf2, c.lt.s, 1, 0)
#endif
#ifdef L_m16gesf2
SFREVCMP(__mips16_gesf2, c.le.s, 0, -1)
#endif
#ifdef L_m16lesf2
SFCMP(__mips16_lesf2, c.le.s, 0, 1)
#endif
#ifdef L_m16ltsf2
SFCMP(__mips16_ltsf2, c.lt.s, -1, 0)
#endif
/* Single precision conversions. */
#ifdef L_m16fltsisf
STARTFN (__mips16_floatsisf)
.set noreorder
mtc1 $4,$f0
nop
cvt.s.w $f0,$f0
mfc1 $2,$f0
j $31
nop
.set reorder
ENDFN (__mips16_floatsisf)
#endif
#ifdef L_m16fixsfsi
STARTFN (__mips16_fixsfsi)
.set noreorder
mtc1 $4,$f0
nop
trunc.w.s $f0,$f0,$4
mfc1 $2,$f0
j $31
nop
.set reorder
ENDFN (__mips16_fixsfsi)
#endif
#if !defined(__mips_single_float) && !defined(__SINGLE_FLOAT)
/* The double precision operations. We need to use different code
based on the preprocessor symbol __mips64, because the way in which
double precision values will change. Without __mips64, the value
is passed in two 32 bit registers. With __mips64, the value is
passed in a single 64 bit register. */
/* Load the first double precision operand. */
#if defined(__mips64)
#define LDDBL1 dmtc1 $4,$f12
#elif defined(__mipsfp64)
#define LDDBL1 sw $4,0($29); sw $5,4($29); l.d $f12,0($29)
#elif defined(__MIPSEB__)
#define LDDBL1 mtc1 $4,$f13; mtc1 $5,$f12
#else
#define LDDBL1 mtc1 $4,$f12; mtc1 $5,$f13
#endif
/* Load the second double precision operand. */
#if defined(__mips64)
/* XXX this should be $6 for Algo arg passing model */
#define LDDBL2 dmtc1 $5,$f14
#elif defined(__mipsfp64)
#define LDDBL2 sw $6,8($29); sw $7,12($29); l.d $f14,8($29)
#elif defined(__MIPSEB__)
#define LDDBL2 mtc1 $6,$f15; mtc1 $7,$f14
#else
#define LDDBL2 mtc1 $6,$f14; mtc1 $7,$f15
#endif
/* Move the double precision return value to the right place. */
#if defined(__mips64)
#define RETDBL dmfc1 $2,$f0
#elif defined(__mipsfp64)
#define RETDBL s.d $f0,0($29); lw $2,0($29); lw $3,4($29)
#elif defined(__MIPSEB__)
#define RETDBL mfc1 $2,$f1; mfc1 $3,$f0
#else
#define RETDBL mfc1 $2,$f0; mfc1 $3,$f1
#endif
/* Double precision math. */
/* This macro defines a function which loads two double precision
values, performs an operation, and returns the double precision
result. */
#define DFOP(NAME, OPCODE) \
STARTFN (NAME); \
.set noreorder; \
LDDBL1; \
LDDBL2; \
nop; \
OPCODE $f0,$f12,$f14; \
RETDBL; \
j $31; \
nop; \
.set reorder; \
ENDFN (NAME)
#ifdef L_m16adddf3
DFOP(__mips16_adddf3, add.d)
#endif
#ifdef L_m16subdf3
DFOP(__mips16_subdf3, sub.d)
#endif
#ifdef L_m16muldf3
DFOP(__mips16_muldf3, mul.d)
#endif
#ifdef L_m16divdf3
DFOP(__mips16_divdf3, div.d)
#endif
#define DFOP2(NAME, OPCODE) \
STARTFN (NAME); \
.set noreorder; \
LDDBL1; \
nop; \
OPCODE $f0,$f12; \
RETDBL; \
j $31; \
nop; \
.set reorder; \
ENDFN (NAME)
#ifdef L_m16negdf2
DFOP2(__mips16_negdf2, neg.d)
#endif
#ifdef L_m16absdf2
DFOP2(__mips16_absdf2, abs.d)
#endif
/* Conversions between single and double precision. */
#ifdef L_m16extsfdf2
STARTFN (__mips16_extendsfdf2)
.set noreorder
mtc1 $4,$f12
nop
cvt.d.s $f0,$f12
RETDBL
j $31
nop
.set reorder
ENDFN (__mips16_extendsfdf2)
#endif
#ifdef L_m16trdfsf2
STARTFN (__mips16_truncdfsf2)
.set noreorder
LDDBL1
nop
cvt.s.d $f0,$f12
mfc1 $2,$f0
j $31
nop
.set reorder
ENDFN (__mips16_truncdfsf2)
#endif
/* Double precision comparisons. */
/* This macro defines a function which loads two double precision
values, performs a floating point comparison, and returns the
specified values according to whether the comparison is true or
false. */
#define DFCMP(NAME, OPCODE, TRUE, FALSE) \
STARTFN (NAME); \
LDDBL1; \
LDDBL2; \
OPCODE $f12,$f14; \
li $2,TRUE; \
bc1t 1f; \
li $2,FALSE; \
1:; \
j $31; \
ENDFN (NAME)
/* This macro is like DFCMP, but it reverses the comparison. */
#define DFREVCMP(NAME, OPCODE, TRUE, FALSE) \
STARTFN (NAME); \
LDDBL1; \
LDDBL2; \
OPCODE $f12,$f14; \
li $2,TRUE; \
bc1t 1f; \
li $2,FALSE; \
1:; \
j $31; \
ENDFN (NAME)
#ifdef L_m16eqdf2
DFCMP(__mips16_eqdf2, c.eq.d, 0, 1)
#endif
#ifdef L_m16nedf2
DFCMP(__mips16_nedf2, c.eq.d, 0, 1)
#endif
#ifdef L_m16gtdf2
DFREVCMP(__mips16_gtdf2, c.lt.d, 1, 0)
#endif
#ifdef L_m16gedf2
DFREVCMP(__mips16_gedf2, c.le.d, 0, -1)
#endif
#ifdef L_m16ledf2
DFCMP(__mips16_ledf2, c.le.d, 0, 1)
#endif
#ifdef L_m16ltdf2
DFCMP(__mips16_ltdf2, c.lt.d, -1, 0)
#endif
/* Double precision conversions. */
#ifdef L_m16fltsidf
STARTFN (__mips16_floatsidf)
.set noreorder
mtc1 $4,$f12
nop
cvt.d.w $f0,$f12
RETDBL
j $31
nop
.set reorder
ENDFN (__mips16_floatsidf)
#endif
#ifdef L_m16fixdfsi
STARTFN (__mips16_fixdfsi)
.set noreorder
LDDBL1
nop
trunc.w.d $f0,$f12,$4
mfc1 $2,$f0
j $31
nop
.set reorder
ENDFN (__mips16_fixdfsi)
#endif
#endif /* !__mips_single_float */
/* These functions are used to return floating point values from
mips16 functions which do not use -mentry. In this case we can
put mtc1 in a jump delay slot, because we know that the next
instruction will not refer to a floating point register. */
#ifdef L_m16retsf
STARTFN (__mips16_ret_sf)
.set noreorder
j $31
mtc1 $2,$f0
.set reorder
ENDFN (__mips16_ret_sf)
#endif
#if !defined(__mips_single_float) && !defined(__SINGLE_FLOAT)
#ifdef L_m16retdf
STARTFN (__mips16_ret_df)
.set noreorder
#if defined(__mips64)
j $31
dmtc1 $2,$f0
#elif defined(__mipsfp64)
sw $2,0($29)
sw $3,4($29)
l.d $f0,0($29)
#elif defined(__MIPSEB__)
mtc1 $2,$f1
j $31
mtc1 $3,$f0
#else
mtc1 $2,$f0
j $31
mtc1 $3,$f1
#endif
.set reorder
ENDFN (__mips16_ret_df)
#endif
#endif /* !__mips_single_float */
/* These functions are used by 16 bit code when calling via a function
pointer. They must copy the floating point arguments from the gp
regs into the fp regs. The function to call will be in $2. The
exact set of floating point arguments to copy is encoded in the
function name; the final number is an fp_code, as described in
mips.h in the comment about CUMULATIVE_ARGS. */
#ifdef L_m16stub1
/* (float) */
STARTFN (__mips16_call_stub_1)
.set noreorder
mtc1 $4,$f12
j $2
nop
.set reorder
ENDFN (__mips16_call_stub_1)
#endif
#ifdef L_m16stub5
/* (float, float) */
STARTFN (__mips16_call_stub_5)
.set noreorder
mtc1 $4,$f12
mtc1 $5,$f14
j $2
nop
.set reorder
ENDFN (__mips16_call_stub_5)
#endif
#if !defined(__mips_single_float) && !defined(__SINGLE_FLOAT)
#ifdef L_m16stub2
/* (double) */
STARTFN (__mips16_call_stub_2)
.set noreorder
LDDBL1
j $2
nop
.set reorder
ENDFN (__mips16_call_stub_2)
#endif
#ifdef L_m16stub6
/* (double, float) */
STARTFN (__mips16_call_stub_6)
.set noreorder
LDDBL1
mtc1 $6,$f14
j $2
nop
.set reorder
ENDFN (__mips16_call_stub_6)
#endif
#ifdef L_m16stub9
/* (float, double) */
STARTFN (__mips16_call_stub_9)
.set noreorder
mtc1 $4,$f12
LDDBL2
j $2
nop
.set reorder
ENDFN (__mips16_call_stub_9)
#endif
#ifdef L_m16stub10
/* (double, double) */
STARTFN (__mips16_call_stub_10)
.set noreorder
LDDBL1
LDDBL2
j $2
nop
.set reorder
ENDFN (__mips16_call_stub_10)
#endif
#endif /* !__mips_single_float */
/* Now we have the same set of functions, except that this time the
function being called returns an SFmode value. The calling
function will arrange to preserve $18, so these functions are free
to use it to hold the return address.
Note that we do not know whether the function we are calling is 16
bit or 32 bit. However, it does not matter, because 16 bit
functions always return floating point values in both the gp and
the fp regs. It would be possible to check whether the function
being called is 16 bits, in which case the copy is unnecessary;
however, it's faster to always do the copy. */
#ifdef L_m16stubsf0
/* () */
STARTFN (__mips16_call_stub_sf_0)
.set noreorder
move $18,$31
jal $2
nop
mfc1 $2,$f0
j $18
nop
.set reorder
ENDFN (__mips16_call_stub_sf_0)
#endif
#ifdef L_m16stubsf1
/* (float) */
STARTFN (__mips16_call_stub_sf_1)
.set noreorder
mtc1 $4,$f12
move $18,$31
jal $2
nop
mfc1 $2,$f0
j $18
nop
.set reorder
ENDFN (__mips16_call_stub_sf_1)
#endif
#ifdef L_m16stubsf5
/* (float, float) */
STARTFN (__mips16_call_stub_sf_5)
.set noreorder
mtc1 $4,$f12
mtc1 $5,$f14
move $18,$31
jal $2
nop
mfc1 $2,$f0
j $18
nop
.set reorder
ENDFN (__mips16_call_stub_sf_5)
#endif
#if !defined(__mips_single_float) && !defined(__SINGLE_FLOAT)
#ifdef L_m16stubsf2
/* (double) */
STARTFN (__mips16_call_stub_sf_2)
.set noreorder
LDDBL1
move $18,$31
jal $2
nop
mfc1 $2,$f0
j $18
nop
.set reorder
ENDFN (__mips16_call_stub_sf_2)
#endif
#ifdef L_m16stubsf6
/* (double, float) */
STARTFN (__mips16_call_stub_sf_6)
.set noreorder
LDDBL1
mtc1 $6,$f14
move $18,$31
jal $2
nop
mfc1 $2,$f0
j $18
nop
.set reorder
ENDFN (__mips16_call_stub_sf_6)
#endif
#ifdef L_m16stubsf9
/* (float, double) */
STARTFN (__mips16_call_stub_sf_9)
.set noreorder
mtc1 $4,$f12
LDDBL2
move $18,$31
jal $2
nop
mfc1 $2,$f0
j $18
nop
.set reorder
ENDFN (__mips16_call_stub_sf_9)
#endif
#ifdef L_m16stubsf10
/* (double, double) */
STARTFN (__mips16_call_stub_sf_10)
.set noreorder
LDDBL1
LDDBL2
move $18,$31
jal $2
nop
mfc1 $2,$f0
j $18
nop
.set reorder
ENDFN (__mips16_call_stub_sf_10)
#endif
/* Now we have the same set of functions again, except that this time
the function being called returns an DFmode value. */
#ifdef L_m16stubdf0
/* () */
STARTFN (__mips16_call_stub_df_0)
.set noreorder
move $18,$31
jal $2
nop
RETDBL
j $18
nop
.set reorder
ENDFN (__mips16_call_stub_df_0)
#endif
#ifdef L_m16stubdf1
/* (float) */
STARTFN (__mips16_call_stub_df_1)
.set noreorder
mtc1 $4,$f12
move $18,$31
jal $2
nop
RETDBL
j $18
nop
.set reorder
ENDFN (__mips16_call_stub_df_1)
#endif
#ifdef L_m16stubdf2
/* (double) */
STARTFN (__mips16_call_stub_df_2)
.set noreorder
LDDBL1
move $18,$31
jal $2
nop
RETDBL
j $18
nop
.set reorder
ENDFN (__mips16_call_stub_df_2)
#endif
#ifdef L_m16stubdf5
/* (float, float) */
STARTFN (__mips16_call_stub_df_5)
.set noreorder
mtc1 $4,$f12
mtc1 $5,$f14
move $18,$31
jal $2
nop
RETDBL
j $18
nop
.set reorder
ENDFN (__mips16_call_stub_df_5)
#endif
#ifdef L_m16stubdf6
/* (double, float) */
STARTFN (__mips16_call_stub_df_6)
.set noreorder
LDDBL1
mtc1 $6,$f14
move $18,$31
jal $2
nop
RETDBL
j $18
nop
.set reorder
ENDFN (__mips16_call_stub_df_6)
#endif
#ifdef L_m16stubdf9
/* (float, double) */
STARTFN (__mips16_call_stub_df_9)
.set noreorder
mtc1 $4,$f12
LDDBL2
move $18,$31
jal $2
nop
RETDBL
j $18
nop
.set reorder
ENDFN (__mips16_call_stub_df_9)
#endif
#ifdef L_m16stubdf10
/* (double, double) */
STARTFN (__mips16_call_stub_df_10)
.set noreorder
LDDBL1
LDDBL2
move $18,$31
jal $2
nop
RETDBL
j $18
nop
.set reorder
ENDFN (__mips16_call_stub_df_10)
#endif
#endif /* !__mips_single_float */

414
gnu/dist/gcc/config/mips/netbsd.h vendored
View File

@ -1,414 +0,0 @@
/* Definitions for DECstation running BSD as target machine for GNU compiler.
Copyright (C) 1993, 1995, 1996, 1997 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* Define default target values. */
#ifdef TARGET_BIG_ENDIAN_DEFAULT
#define TARGET_ENDIAN_DEFAULT MASK_BIG_ENDIAN
#else
#define TARGET_ENDIAN_DEFAULT 0
#endif
#define TARGET_DEFAULT MASK_GAS
/* Get generic mips ELF definitions. */
#include <mips/elf.h>
/* NetBSD on mips uses elf. */
#undef OBJECT_FORMAT_COFF
/* Get generic NetBSD definitions. */
#define NETBSD_ELF
#include <netbsd.h>
/* Define mips-specific netbsd predefines... */
#undef CPP_PREDEFINES
#ifdef TARGET_BIG_ENDIAN_DEFAULT
#define CPP_PREDEFINES \
"-D__ANSI_COMPAT -DMIPSEB -DR3000 -DSYSTYPE_BSD -D_SYSTYPE_BSD \
-D__NetBSD__ -D__ELF__ -Dmips -D__NO_LEADING_UNDERSCORES__ -D__GP_SUPPORT__ \
-D_R3000 -Asystem(unix) -Asystem(NetBSD) -Amachine(mips)"
#else
#define CPP_PREDEFINES \
"-D__ANSI_COMPAT -DMIPSEL -DR3000 -DSYSTYPE_BSD -D_SYSTYPE_BSD \
-D__NetBSD__ -D__ELF__ -Dmips -D__NO_LEADING_UNDERSCORES__ -D__GP_SUPPORT__ \
-D_R3000 -Asystem(unix) -Asystem(NetBSD) -Amachine(mips)"
#endif
/* Always uses gas. */
#undef ASM_SPEC
#define ASM_SPEC \
"%{G*} %{EB} %{EL} %{mips1} %{mips2} %{mips3} %{v} \
%{noasmopt:-O0} \
%{!noasmopt:%{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3}} \
%{g} %{g0} %{g1} %{g2} %{g3} \
%{ggdb:-g} %{ggdb0:-g0} %{ggdb1:-g1} %{ggdb2:-g2} %{ggdb3:-g3} \
%{gstabs:-g} %{gstabs0:-g0} %{gstabs1:-g1} %{gstabs2:-g2} %{gstabs3:-g3} \
%{gstabs+:-g} %{gstabs+0:-g0} %{gstabs+1:-g1} %{gstabs+2:-g2} %{gstabs+3:-g3} \
%{gcoff:-g} %{gcoff0:-g0} %{gcoff1:-g1} %{gcoff2:-g2} %{gcoff3:-g3} \
%{membedded-pic} %{fPIC:-KPIC}"
/* Provide a LINK_SPEC appropriate for NetBSD. Here we provide support
for the special GCC options -static, -assert, and -nostdlib. */
#undef LINK_SPEC
#define LINK_SPEC \
"%{G*} %{EB} %{EL} %{mips1} %{mips2} %{mips3} \
%{bestGnum} %{shared} %{non_shared} \
%{call_shared} %{no_archive} %{exact_version} \
%{!shared: %{!non_shared: %{!call_shared: -non_shared}}} \
%{!dynamic-linker:-dynamic-linker /usr/libexec/ld.elf_so} \
%{!nostdlib:%{!r*:%{!e*:-e __start}}} -dc -dp \
%{R*} %{static:-Bstatic} %{!static:-Bdynamic} %{assert*}"
/*
* XXX: the stdlib line should be
* %{nostdlib:-nostdlib} %{!nostdlib:%{!r*:%{!e*:-e __start}}} -dc -dp \
* but "ld -nostdlib" n mips/elf binutils 2.x produces corrupt binaries.
*/
/* Provide CC1_SPEC appropriate for NetBSD/mips ELF platforms */
#undef CC1_SPEC
#define CC1_SPEC \
"%{gline:%{!g:%{!g0:%{!g1:%{!g2: -g1}}}}} \
%{mips1:-mfp32 -mgp32}%{mips2:-mfp32 -mgp32}\
%{mips3:%{!msingle-float:%{!m4650:-mfp64}} -mgp64} \
%{mips4:%{!msingle-float:%{!m4650:-mfp64}} -mgp64} \
%{mfp64:%{msingle-float:%emay not use both -mfp64 and -msingle-float}} \
%{mfp64:%{m4650:%emay not use both -mfp64 and -m4650}} \
%{m4650:-mcpu=r4650} \
%{G*} %{EB:-meb} %{EL:-mel} %{EB:%{EL:%emay not use both -EB and -EL}} \
%{pic-none: -mno-half-pic} \
%{pic-lib: -mhalf-pic} \
%{pic-extern: -mhalf-pic} \
%{pic-calls: -mhalf-pic} \
%{save-temps: }"
#undef CPP_SPEC
#define CPP_SPEC \
"%{posix:-D_POSIX_SOURCE} \
%{mlong64:-D__SIZE_TYPE__=long\\ unsigned\\ int -D__PTRDIFF_TYPE__=long\\ int} \
%{!mlong64:-D__SIZE_TYPE__=unsigned\\ int -D__PTRDIFF_TYPE__=int} \
%{mips3:-U__mips -D__mips=3 -D__mips64} \
%{mgp32:-U__mips64} %{mgp64:-D__mips64}"
/* This defines which switch letters take arguments. -G is a mips special. */
#undef SWITCH_TAKES_ARG
#define SWITCH_TAKES_ARG(CHAR) \
(DEFAULT_SWITCH_TAKES_ARG(CHAR) \
|| (CHAR) == 'R' || (CHAR) == 'G')
/* Trampoline code for closures should call _cacheflush()
to ensure I-cache consistency after writing trampoline code. */
#define MIPS_CACHEFLUSH_FUNC "_cacheflush"
/*
* Some imports from svr4.h in support of shared libraries.
* Currently, we need the DECLARE_OBJECT_SIZE stuff.
*/
/* Define the strings used for the special svr4 .type and .size directives.
These strings generally do not vary from one system running svr4 to
another, but if a given system (e.g. m88k running svr) needs to use
different pseudo-op names for these, they may be overridden in the
file which includes this one. */
#undef TYPE_ASM_OP
#undef SIZE_ASM_OP
#undef WEAK_ASM_OP
#define TYPE_ASM_OP ".type"
#define SIZE_ASM_OP ".size"
#define WEAK_ASM_OP ".weak"
/* The following macro defines the format used to output the second
operand of the .type assembler directive. Different svr4 assemblers
expect various different forms for this operand. The one given here
is just a default. You may need to override it in your machine-
specific tm.h file (depending upon the particulars of your assembler). */
#undef TYPE_OPERAND_FMT
#define TYPE_OPERAND_FMT "@%s"
/* Write the extra assembler code needed to declare a function's result.
Most svr4 assemblers don't require any special declaration of the
result value, but there are exceptions. */
#ifndef ASM_DECLARE_RESULT
#define ASM_DECLARE_RESULT(FILE, RESULT)
#endif
/* These macros generate the special .type and .size directives which
are used to set the corresponding fields of the linker symbol table
entries in an ELF object file under SVR4. These macros also output
the starting labels for the relevant functions/objects. */
/* Write the extra assembler code needed to declare a function properly.
Some svr4 assemblers need to also have something extra said about the
function's return value. We allow for that here. */
#undef ASM_DECLARE_FUNCTION_NAME
#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
do { \
fprintf (FILE, "\t%s\t ", TYPE_ASM_OP); \
assemble_name (FILE, NAME); \
putc (',', FILE); \
fprintf (FILE, TYPE_OPERAND_FMT, "function"); \
putc ('\n', FILE); \
ASM_DECLARE_RESULT (FILE, DECL_RESULT (DECL)); \
} while (0)
/* Write the extra assembler code needed to declare an object properly. */
#undef ASM_DECLARE_OBJECT_NAME
#define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
do { \
fprintf (FILE, "\t%s\t ", TYPE_ASM_OP); \
assemble_name (FILE, NAME); \
putc (',', FILE); \
fprintf (FILE, TYPE_OPERAND_FMT, "object"); \
putc ('\n', FILE); \
size_directive_output = 0; \
if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \
{ \
size_directive_output = 1; \
fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
assemble_name (FILE, NAME); \
fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL))); \
} \
ASM_OUTPUT_LABEL(FILE, NAME); \
} while (0)
/* Output the size directive for a decl in rest_of_decl_compilation
in the case where we did not do so before the initializer.
Once we find the error_mark_node, we know that the value of
size_directive_output was set
by ASM_DECLARE_OBJECT_NAME when it was run for the same decl. */
#undef ASM_FINISH_DECLARE_OBJECT
#define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
do { \
char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
&& ! AT_END && TOP_LEVEL \
&& DECL_INITIAL (DECL) == error_mark_node \
&& !size_directive_output) \
{ \
size_directive_output = 1; \
fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
assemble_name (FILE, name); \
fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL))); \
} \
} while (0)
/* This is how to declare the size of a function. */
#undef ASM_DECLARE_FUNCTION_SIZE
#define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
do { \
if (!flag_inhibit_size_directive) \
{ \
char label[256]; \
static int labelno; \
labelno++; \
ASM_GENERATE_INTERNAL_LABEL (label, "Lfe", labelno); \
ASM_OUTPUT_INTERNAL_LABEL (FILE, "Lfe", labelno); \
fprintf (FILE, "\t%s\t ", SIZE_ASM_OP); \
assemble_name (FILE, (FNAME)); \
fprintf (FILE, ","); \
assemble_name (FILE, label); \
fprintf (FILE, "-"); \
assemble_name (FILE, (FNAME)); \
putc ('\n', FILE); \
} \
} while (0)
/* -G is incompatible with -KPIC which is the default, so only allow objects
in the small data section if the user explicitly asks for it. */
#undef MIPS_DEFAULT_GVALUE
#define MIPS_DEFAULT_GVALUE 0
/* Avoid egcs-1.1 optimization bug where expr.c rev1.76 conflicts with
GO_IF_LEGITIMATE_ADDRESS: the former `exposes' the internals of of
address operands. But by default GO_IF_LEGITIMATE_ADDRESS accepts
addresses with immediate offsets > bits, relying on the assembler
to fix them up. But the backend has no output patterns which match
arithmetic on offests > 16 bits in non-address contexts: they cause
a coredump. Turn on TARGET_DBUG_A_MODE to stop
GO_IF_LEGITIMATE_ADDRESS ever accepting such addresses. */
#undef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_GAS|MASK_DEBUG_A|MASK_ABICALLS)
/* Since gas and gld are standard on NetBSD, we don't need these */
#undef ASM_FINAL_SPEC
/* XXXXXX see iris6.h for the following */
/* This is *NOT* how to equate one symbol to another symbol. The assembler
'=' syntax just equates a name to a constant expression.
See ASM_OUTPUT_WEAK_ALIAS. */
#undef ASM_OUTPUT_DEF
#undef SET_ASM_OP /* Has no equivalent. See ASM_OUTPUT_DEF below. */
/* Stuff for constructors. Start here. */
/* Like irix6 only different: using gas and ld with ELF, we *do* have
support for the .init and .fini sections, and we can put stuff in
there to be executed before and after `main'. We let crtstuff.c
and other files know this by defining the following symbols. The
definitions say how to change sections to the .init and .fini
sections. This is the same for all known svr4 assemblers.
(except for 32/64-bit support, if we stay compatible with IRIX?). */
#define CONST_SECTION_ASM_OP_32 "\t.rdata"
#define CONST_SECTION_ASM_OP_64 ".section\t.rodata"
/* Note that the following sections must be writable, so that
ld.so can relocate (and write into) shared-library .ctors/.dtors
sections after mapping them. */
#define CTORS_SECTION_ASM_OP ".section\t.ctors,\"aw\""
#define DTORS_SECTION_ASM_OP ".section\t.dtors,\"aw\""
#define BSS_SECTION_ASM_OP ".section\t.bss"
#define CONST_SECTION_ASM_OP_32 "\t.rdata"
#define CONST_SECTION_ASM_OP_64 ".section\t.rodata"
/* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
XXX do we need to make these writable? see svr4.h. */
#define INIT_SECTION_ASM_OP ".section\t.init"
#define FINI_SECTION_ASM_OP ".section\t.fini"
/* This is the pseudo-op used to generate a 32-bit word of data with a
specific value in some section. This is the same for all known svr4
assemblers. */
#define INT_ASM_OP ".word"
/* XXX mips64 targets? */
/* dwarf2out will handle padding this data properly. We definitely don't
want it 8-byte aligned on n32. */
#define EH_FRAME_SECTION_ASM_OP ".section\t.eh_frame"
/* A default list of other sections which we might be "in" at any given
time. For targets that use additional sections (e.g. .tdesc) you
should override this definition in the target-specific file which
includes this file. */
#undef EXTRA_SECTIONS
#define EXTRA_SECTIONS in_sdata, in_rdata, in_const, in_ctors, in_dtors
/* A default list of extra section function definitions. For targets
that use additional sections (e.g. .tdesc) you should override this
definition in the target-specific file which includes this file. */
/* ??? rdata_section is now same as svr4 const_section. */
#undef EXTRA_SECTION_FUNCTIONS
#define EXTRA_SECTION_FUNCTIONS \
void \
sdata_section () \
{ \
if (in_section != in_sdata) \
{ \
fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
in_section = in_sdata; \
} \
} \
\
void \
rdata_section () \
{ \
if (in_section != in_rdata) \
{ \
if (mips_abi != ABI_32) \
fprintf (asm_out_file, "%s\n", CONST_SECTION_ASM_OP_64); \
else \
fprintf (asm_out_file, "%s\n", CONST_SECTION_ASM_OP_32); \
in_section = in_rdata; \
} \
} \
CTORS_SECTION_FUNCTION \
DTORS_SECTION_FUNCTION
#define CTORS_SECTION_FUNCTION \
void \
ctors_section () \
{ \
if (in_section != in_ctors) \
{ \
fprintf (asm_out_file, "%s\n", CTORS_SECTION_ASM_OP); \
in_section = in_ctors; \
} \
}
#define DTORS_SECTION_FUNCTION \
void \
dtors_section () \
{ \
if (in_section != in_dtors) \
{ \
fprintf (asm_out_file, "%s\n", DTORS_SECTION_ASM_OP); \
in_section = in_dtors; \
} \
}
#define OBJECT_FORMAT_ELF
/* A C statement (sans semicolon) to output an element in the table of
global constructors. */
#define ASM_OUTPUT_CONSTRUCTOR(FILE,NAME) \
do { \
ctors_section (); \
fprintf (FILE, "\t%s\t ", \
TARGET_LONG64 ? ".dword" : ".word"); \
assemble_name (FILE, NAME); \
fprintf (FILE, "\n"); \
} while (0)
/* A C statement (sans semicolon) to output an element in the table of
global destructors. */
#define ASM_OUTPUT_DESTRUCTOR(FILE,NAME) \
do { \
dtors_section (); \
fprintf (FILE, "\t%s\t ", \
TARGET_LONG64 ? ".dword" : ".word"); \
assemble_name (FILE, NAME); \
fprintf (FILE, "\n"); \
} while (0)
/* Stuff for constructors. End here. */
/* Use sjlj exceptions. */
#define DWARF2_UNWIND_INFO 0

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# We have a premade insn-attrtab.c to save the hour it takes to run genattrtab.
# PREMADE_ATTRTAB = $(srcdir)/config/mips/mips-at.c
# PREMADE_ATTRTAB_MD = $(srcdir)/config/mips/mips-at.md
# Suppress building libgcc1.a, since the MIPS compiler port is complete
# and does not need anything from libgcc1.a.
LIBGCC1 =
CROSS_LIBGCC1 =

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# Suppress building libgcc1.a, since the MIPS compiler port is complete
# and does not need anything from libgcc1.a.
LIBGCC1 =
CROSS_LIBGCC1 =

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@ -1 +0,0 @@
T_CFLAGS +=-DTARGET_BIG_ENDIAN_DEFAULT

1
gnu/dist/gcc/config/mips/t-mipsel vendored
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@ -1 +0,0 @@
T_CFLAGS +=-DTARGET_LITTLE_ENDIAN_DEFAULT

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# Define CC and OLDCC as the same, so that the tests:
# if [ x"$(OLDCC)" = x"$(CC)" ] ...
#
# will succeed (if OLDCC != CC, it is assumed that GCC is
# being used in secondary stage builds). We need to pass
# the -Wf,-XNg1500 option so the compiler can compile the
# G++ file cp-parse.c. Otherwise it complains about
# too many case statements. -Olimit is so the user
# can use -O2. Down with fixed size tables!
CC = $(OLDCC)
OPT = -O1
OLDCC = cc -Wf,-XNg1500 -Olimit 3000 $(OPT)
# The bison output files are machine-indep,
# so different flags for a particular machine are not useful.
#BISONFLAGS = -l

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# Define CC and OLDCC as the same, so that the tests:
# if [ x"$(OLDCC)" = x"$(CC)" ] ...
#
# will succeed (if OLDCC != CC, it is assumed that GCC is
# being used in secondary stage builds). We need to pass
# the -Wf,-XNg1500 option so the compiler can compile the
# G++ file cp-parse.c. Otherwise it complains about
# too many case statements. -Olimit is so the user
# can use -O2. Down with fixed size tables!
# The -cckr is to turn off strict ANSI checking.
# These definitions are commented out because they cause trouble with
# autoconf. It is believed that they aren't needed anymore.
#CC = $(OLDCC)
#OPT = -O1
#OLDCC = cc -Wf,-XNh2000,-XNg1500 -Olimit 3000 -cckr $(OPT)
# The bison output files are machine-indep,
# so different flags for a particular machine are not useful.
#BISONFLAGS = -l
# -lmld is so we can link collect2 running native.
# -lmalloc is supposed to be faster than the normal malloc
CLIB = -lmld -lmalloc
# Show we need to use the C version of ALLOCA
ALLOCA = alloca.o
# Find all of the declarations from the header files
FIXPROTO_DEFINES= -D__EXTENSIONS__ -D_SGI_SOURCE -D_LANGUAGE_C_PLUS_PLUS

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# Define CC and OLDCC as the same, so that the tests:
# if [ x"$(OLDCC)" = x"$(CC)" ] ...
#
# will succeed (if OLDCC != CC, it is assumed that GCC is
# being used in secondary stage builds). We need to pass
# the -Wf,-XNg1500 option so the compiler can compile the
# G++ file cp-parse.c. Otherwise it complains about
# too many case statements. -Olimit is so the user
# can use -O2. Down with fixed size tables!
# In at least one version of Irix, v3.3.2, the compiler does not accept
# the -cckr option, so, lets try without it for all versions of Irix 3.x.
# The -cckr is to turn off strict ANSI checking.
# These definitions are commented out because they cause trouble with
# autoconf. It is believed that they aren't needed anymore.
#CC = $(OLDCC)
#OPT = -O1
#OLDCC = cc -Wf,-XNh2000,-XNg1500 -Olimit 3000 $(OPT)
# The bison output files are machine-indep,
# so different flags for a particular machine are not useful.
#BISONFLAGS = -l
# -lmld is so we can link collect2 running native.
# -lmalloc is supposed to be faster than the normal malloc
CLIB = -lmld -lmalloc
# Show we need to use the C version of ALLOCA
ALLOCA = alloca.o

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@ -1,11 +0,0 @@
# We force the use of the O32 ABI for two reasons.
# 1) For consistency, because some versions of Irix 6 default to the O32 ABI
# and some versions default to the N64 ABI.
# 2) To avoid SGI compiler bugs. The v6.x and v7.0 compilers from SGI have
# bugs that cause gcc to be miscompiled when the N32 or N64 ABIs are used.
# The O32 ABI is known to be OK.
CC = $(OLDCC)
OLDCC = cc -32
# Find all of the declarations from the header files
FIXPROTO_DEFINES= -D__EXTENSIONS__ -D_SGI_SOURCE -D_LANGUAGE_C_PLUS_PLUS

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# Define CC and OLDCC as the same, so that the tests:
# if [ x"$(OLDCC)" = x"$(CC)" ] ...
#
# will succeed (if OLDCC != CC, it is assumed that GCC is
# being used in secondary stage builds). We need to pass
# the -Wf,-XNg1500 option so the compiler can compile the
# G++ file cp-parse.c. Otherwise it complains about
# too many case statements. The -Olimit is so the user
# can use -O2. Down with fixed size tables!
CC = $(OLDCC)
OPT = -O1
OLDCC = cc -Wf,-XNg1500,-XNh2000 -Olimit 3000 $(OPT)
# The bison output files are machine-indep,
# so different flags for a particular machine are not useful.
#BISONFLAGS = -l
# This is so we can link collect2 running native.
CLIB = -lmld

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# Don't run fixproto
STMP_FIXPROTO =
# We don't need GCC's own include files.
USER_H = $(srcdir)/ginclude/stdarg.h $(srcdir)/ginclude/varargs.h \
$(srcdir)/ginclude/va-mips.h $(EXTRA_HEADERS) $(LANG_EXTRA_HEADERS)
XLIMITS_H =
# We don't need even the files GCC insists we need.
GENINCLUDES = Makefile.in
# A lot of stuff needs to go elsewhere.
includedir=$(exec_prefix)/include
infodir=$(exec_prefix)/share/info
tooldir=$(libdir)/cross/$(target)
mandir=$(exec_prefix)/share/man/man1

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@ -1,19 +0,0 @@
# Define CC and OLDCC as the same, so that the tests:
# if [ x"$(OLDCC)" = x"$(CC)" ] ...
#
# will succeed (if OLDCC != CC, it is assumed that GCC is
# being used in secondary stage builds). We need to pass
# the -Wf,-XNg1500 option so the compiler can compile the
# G++ file cp-parse.c. Otherwise it complains about
# too many case statements. Down with fixed size tables!
CC = $(OLDCC)
OLDCC = cc -Wf,-XNg1500
CCLIBFLAGS = -G 0
ALLOCA = alloca.o
# The bison output files are machine-indep,
# so different flags for a particular machine are not useful.
#BISONFLAGS = -l

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# Define CC and OLDCC as the same, so that the tests:
# if [ x"$(OLDCC)" = x"$(CC)" ] ...
#
# will succeed (if OLDCC != CC, it is assumed that GCC is
# being used in secondary stage builds).
BUILD =
CC = $(OLDCC)
CLIB = -lld
X_CFLAGS = $(DEB_OPT) $(MSTATS) $(SHLIB) $(X_DEFINES)
X_CFLAGS_NODEBUG = $(NO_DEBUG) $(MSTATS) $(OPT) $(PROFILE) $(SHLIB) $(X_DEFINES) $(XCFLAGS)
CCLIBFLAGS = -O -pic-extern
CPP_ABORT = # -Dabort=fancy_abort
CPPFLAGS = $(CPP_ABORT) $(SYSTEM_INCLUDES)
DEB_OPT = $(OPT) $(DEBUG) $(PROFILE)
DEBUG =
DEBUG_COLLECT = # -DDEBUG
CCLIBFLAGS = -O -DNO_HALF_PIC
GCC_CFLAGS = $(INTERNAL_CFLAGS) $(X_CFLAGS) $(T_CFLAGS) $(CFLAGS) -B./ -DPOSIX -DNO_HALF_PIC
LIBGCC2_CFLAGS = -O2 $(GCC_CFLAGS) -g1 -pic-extern
LDFLAGS =
MSTATS = # -mstats
OLDCC = /usr/ccs/gcc/gcc
OPT = -O2
PROFILE =
SHLIB = -pic-none
SYSTEM_INCLUDES = # -I${BUILD}/usr/include
X_DEFINES = -Dvfork=fork
libdir = /usr/ccs
mandir = /usr/ccs/gcc/$(target)/$(version)
bindir = /usr/ccs/gcc/$(target)/$(version)

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# Define CC and OLDCC as the same, so that the tests:
# if [ x"$(OLDCC)" = x"$(CC)" ] ...
#
# will succeed (if OLDCC != CC, it is assumed that GCC is
# being used in secondary stage builds).
# -Olimit is so the user can use -O2. Down with fixed
# size tables!
CC = $(OLDCC)
OPT =
OLDCC = cc -Olimit 3000 $(OPT)
X_CFLAGS = -DNO_SYS_SIGLIST
# Show we need to use the C version of ALLOCA
# The SVR3 configurations have it, but the SVR4 configurations don't.
# For now, just try using it for all SVR* configurations.
ALLOCA = alloca.o

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@ -1,18 +0,0 @@
# Make internal tables bigger.
OLDCC=cc -Wf,-XNg1500,-XNh2000 -Olimit 3000 $(OPT)
# Define CC and OLDCC as the same, so that the tests:
# if [ x"$(OLDCC)" = x"$(CC)" ] ...
#
# will succeed (if OLDCC != CC, it is assumed that GCC is
# being used in secondary stage builds). We need to pass
# the -Wf,-XNg1500 option so the compiler can compile the
# G++ file cp-parse.c. Otherwise it complains about
# too many case statements. The -Olimit is so the user
# can use -O2. Down with fixed size tables!
CC = $(OLDCC)
OPT = -O1
# This is so we can link collect2 running native.
CLIB = -lmld

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gnu/dist/gcc/config/mips/x-sysv vendored
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@ -1,26 +0,0 @@
# Define CC and OLDCC as the same, so that the tests:
# if [ x"$(OLDCC)" = x"$(CC)" ] ...
#
# will succeed (if OLDCC != CC, it is assumed that GCC is
# being used in secondary stage builds). We need to pass
# the -Wf,-XNg1500 option so the compiler can compile the
# G++ file cp-parse.c. Otherwise it complains about
# too many case statements. -Olimit is so the user
# can use -O2. Down with fixed size tables!
CC = $(OLDCC)
OPT = -O1
OLDCC = cc -Wf,-XNg1500,-XNh2000 -Olimit 3000 $(OPT)
# The bison output files are machine-indep,
# so different flags for a particular machine are not useful.
#BISONFLAGS = -l
# This enables collect2 to link.
# Some systems use version 2.11 of the compilers. Some use version 3.11.
CLIB= -L/usr/lib/cmplrs/cc2.11 -L/usr/lib/cmplrs/cc3.11 -lmld
# Show we need to use the C version of ALLOCA
# The SVR3 configurations have it, but the SVR4 configurations don't.
# For now, just try using it for all SVR* configurations.
ALLOCA = alloca.o

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gnu/dist/gcc/config/mips/x-ultrix vendored
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@ -1,17 +0,0 @@
# Define CC and OLDCC as the same, so that the tests:
# if [ x"$(OLDCC)" = x"$(CC)" ] ...
#
# will succeed (if OLDCC != CC, it is assumed that GCC is
# being used in secondary stage builds). We need to pass
# the -Wf,-XNg1500 option so the compiler can compile the
# G++ file cp-parse.c. Otherwise it complains about
# too many case statements. -Olimit is so the user
# can use -O2. Down with fixed size tables!
CC = $(OLDCC)
OPT = -O1
OLDCC = cc -Wf,-XNg1500 -Olimit 3000 $(OPT)
# The bison output files are machine-indep,
# so different flags for a particular machine are not useful.
#BISONFLAGS = -l

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gnu/dist/gcc/config/mips/xm-iris3.h vendored
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#include "mips/xm-mips.h"
#define USG

13
gnu/dist/gcc/config/mips/xm-iris4.h vendored
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#include "mips/xm-mips.h"
#define USG
#if 0
#ifdef __GNUC__
/* The normal irix compiler requires alloca.h or alloca doesn't work.
However, the IRIX compiler doesn't allow alloca to be stored in
something like ptr->field = alloca(), so we just use the normal
C alloca. */
#include <alloca.h>
#endif
#endif

9
gnu/dist/gcc/config/mips/xm-iris5.h vendored
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#include "mips/xm-mips.h"
/* On SGI IRIX 5.3, inttypes.h clashes with sys/types.h, but the clash
(when compiled with GCC) is a warning, so configure.in thinks it's OK
to use it. Work around this problem. */
#ifdef HAVE_INTTYPES_H
#undef HAVE_INTTYPES_H
#endif

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#define MIPS_OVERRIDE_ALLOCA
#ifndef __GNUC__
#include <alloca.h>
#else
extern void *alloca ();
#endif
#include "mips/xm-mips.h"
#define USG
#undef HOST_BITS_PER_LONG
#define HOST_BITS_PER_LONG _MIPS_SZLONG
#ifndef inhibit_libc
#include "string.h"
#endif

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/* Configuration for GNU C-compiler for MIPS Rx000 family
Copyright (C) 1989, 1990, 1991, 1993, 1997 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* #defines that need visibility everywhere. */
#define FALSE 0
#define TRUE 1
/* This describes the machine the compiler is hosted on. */
#define HOST_BITS_PER_CHAR 8
#define HOST_BITS_PER_SHORT 16
#define HOST_BITS_PER_INT 32
#define HOST_BITS_PER_LONG 32
#define HOST_BITS_PER_LONGLONG 64
#if !defined(MIPSEL) && !defined(__MIPSEL__)
#define HOST_WORDS_BIG_ENDIAN
#endif
/* Enable host-conditionals for MIPS machines. */
#ifndef MIPS
#define MIPS 1
#endif
/* A code distinguishing the floating point format of the host
machine. There are three defined values: IEEE_FLOAT_FORMAT,
VAX_FLOAT_FORMAT, and UNKNOWN_FLOAT_FORMAT. */
#define HOST_FLOAT_FORMAT IEEE_FLOAT_FORMAT
/* target machine dependencies.
tm.h is a symbolic link to the actual target specific file. */
#include "tm.h"
/* Arguments to use with `exit'. */
#define SUCCESS_EXIT_CODE 0
#define FATAL_EXIT_CODE 33
#ifndef __GNUC__
/* The MIPS compiler gets it wrong, and treats enumerated bitfields
as signed quantities, making it impossible to use an 8-bit enum
for compiling GNU C++. */
#define ONLY_INT_FIELDS 1
#endif
#ifndef MIPS_OVERRIDE_ALLOCA
#ifndef __GNUC__
#define USE_C_ALLOCA
#ifdef __STDC__
extern void * alloca ();
#else
extern char * alloca ();
#endif
/* for the emacs version of alloca */
#define STACK_DIRECTION -1
#endif
#endif /* not MIPS_OVERRIDE_ALLOCA */

2
gnu/dist/gcc/config/mips/xm-netbsd.h vendored
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@ -1,2 +0,0 @@
#include "mips/xm-mips.h"
#include "config/xm-netbsd.h"

8
gnu/dist/gcc/config/mips/xm-news.h vendored
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@ -1,8 +0,0 @@
/* This file is for the Sony Mips News running "NewsOS Version 5",
which is really System V. */
#include "mips/xm-sysv.h"
/* Sony has a funny name for this symbol. */
#define sys_siglist _sys_siglist
#undef SYS_SIGLIST_DECLARED
#define SYS_SIGLIST_DECLARED

9
gnu/dist/gcc/config/mips/xm-nws3250v4.h vendored
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@ -1,9 +0,0 @@
#define USG
#include "xm-mips.h"
/* If compiling with mips compiler, we are probably using alloca.c,
so help it work right. */
#ifndef __GNUC__
#define USE_C_ALLOCA
#endif

30
gnu/dist/gcc/config/mips/xm-sysv.h vendored
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@ -1,30 +0,0 @@
/* Configuration for GNU C-compiler for UMIPS operating system
Copyright (C) 1989, 1990, 1991, 1997 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/*
* Notes for compiling gcc on umips (v3.0)
* - change the -g in the CFLAGS to a -g3 or take it out all together.
* - do not define DBX_DEBUGGING_INFO in tm.h, it doesn't exist (unless
* you get one from a bsd system)
*/
#define USG
#include "mips/xm-mips.h"

7
gnu/dist/gcc/config/mips/xm-sysv4.h vendored
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@ -1,7 +0,0 @@
#include "mips/xm-sysv.h"
/* SVR4 provides no sys_siglist,
but does offer the same data under another name. */
#define sys_siglist _sys_siglist
#undef SYS_SIGLIST_DECLARED
#define SYS_SIGLIST_DECLARED

50
gnu/dist/gcc/config/mn10200/divmod.c vendored
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@ -1,50 +0,0 @@
long udivmodsi4 ();
long
__divsi3 (long a, long b)
{
int neg = 0;
long res;
if (a < 0)
{
a = -a;
neg = !neg;
}
if (b < 0)
{
b = -b;
neg = !neg;
}
res = udivmodsi4 (a, b, 0);
if (neg)
res = -res;
return res;
}
long
__modsi3 (long a, long b)
{
int neg = 0;
long res;
if (a < 0)
{
a = -a;
neg = 1;
}
if (b < 0)
b = -b;
res = udivmodsi4 (a, b, 1);
if (neg)
res = -res;
return res;
}

609
gnu/dist/gcc/config/mn10200/lib1funcs.asm vendored
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@ -1,609 +0,0 @@
/* libgcc1 routines for Matsushita mn10200.
Copyright (C) 1997 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the
Free Software Foundation; either version 2, or (at your option) any
later version.
In addition to the permissions in the GNU General Public License, the
Free Software Foundation gives you unlimited permission to link the
compiled version of this file with other programs, and to distribute
those programs without any restriction coming from the use of this
file. (The General Public License restrictions do apply in other
respects; for example, they cover modification of the file, and
distribution when not linked into another program.)
This file is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* As a special exception, if you link this library with files
compiled with GCC to produce an executable, this does not cause
the resulting executable to be covered by the GNU General Public License.
This exception does not however invalidate any other reasons why
the executable file might be covered by the GNU General Public License. */
#ifdef L_divhi3
/* Derive signed division/modulo from unsigned "divu" instruction. */
.text
.globl ___divhi3
.type ___divhi3,@function
___divhi3:
/* We're going to need some scratch registers, so save d2/d3
into the stack. */
add -8,a3
movx d2,(0,a3)
movx d3,(4,a3)
/* Loading zeros into registers now allows us to use them
in the compare instructions, which saves a total of
two bytes (egad). */
sub d3,d3
sub d2,d2
sub a0,a0
/* If first operand is negative, then make it positive.
It will be contained in d2 just before .L1.
a0 tells us if the first operand was negated. */
cmp d2,d0
bge .L0
sub d0,d2
mov 1,a0
bra .L1
.L0:
mov d0,d2
.L1:
/* If the second operand is negative, then make it positive.
It will be contained in d3 just before .L3.
d0 tells us if the second operand was negated. */
cmp d3,d1
bge .L2
sub d1,d3
mov 1,d0
bra .L3
.L2:
sub d0,d0
mov d1,d3
.L3:
/* Loading d1 with zero here allows us to save one byte
in the comparison below. */
sub d1,d1
/* Make sure to clear the mdr register, then do the unsigned
division. Result will be in d2/mdr. */
mov d1,mdr
divu d3,d2
/* Negate the remainder based on the first argument negation
flag only. */
cmp d1,a0
beq .L4
mov mdr,d3
sub d3,d1
bra .L5
.L4:
mov mdr,d1
.L5:
/* Negate the result if either, but not both of the inputs
were negated. */
mov a0,d3
xor d3,d0
beq .L6
sub d0,d0
sub d2,d0
bra .L7
.L6:
mov d2,d0
.L7:
/* Restore our scratch registers, deallocate our stack and return. */
movx (0,a3),d2
movx (4,a3),d3
add 8,a3
rts
.size ___divhi3,.-___divhi3
#endif
#ifdef L_modhi3
.text
.globl ___modhi3
.type ___modhi3,@function
___modhi3:
jsr ___divhi3
mov d1,d0
rts
.size ___modhi3,.-___modhi3
#endif
#ifdef L_addsi3
.text
.globl ___addsi3
.type ___addsi3,@function
___addsi3:
add -4,a3
movx d2,(0,a3)
mov (8,a3),d2
add d2,d0
mov (10,a3),d2
addc d2,d1
movx (0,a3),d2
add 4,a3
rts
.size ___addsi3,.-___addsi3
#endif
#ifdef L_subsi3
.text
.globl ___subsi3
.type ___subsi3,@function
___subsi3:
add -4,a3
movx d2,(0,a3)
mov (8,a3),d2
sub d2,d0
mov (10,a3),d2
subc d2,d1
movx (0,a3),d2
add 4,a3
rts
.size ___subsi3,.-___subsi3
#endif
#ifdef L_mulsi3
.text
.globl ___mulsi3
.type ___mulsi3,@function
___mulsi3:
add -4,a3
mov a1,(0,a3)
mov d0,a0
/* Multiply arg0 msb with arg1 lsb.
arg0 msb is in register d1,
arg1 lsb is in memory. */
mov (8,a3),d0
mulu d0,d1
mov d1,a1
/* Multiply arg0 lsb with arg1 msb.
arg0 msb is in register a0,
arg1 lsb is in memory. */
mov a0,d0
mov (10,a3),d1
mulu d0,d1
/* Add the cross products. */
add d1,a1
/* Now multiply arg0 lsb with arg1 lsb. */
mov (8,a3),d1
mulu d1,d0
/* Add in the upper 16 bits to the cross product sum. */
mov mdr,d1
add a1,d1
mov (0,a3),a1
add 4,a3
rts
.size ___mulsi3,.-___mulsi3
#endif
#ifdef L_ashlsi3
.text
.globl ___ashlsi3
.type ___ashlsi3,@function
___ashlsi3:
mov (4,a3),a0
cmp 0,a0
beq .L0
.L1:
add d0,d0
addc d1,d1
add -1,a0
bne .L1
.L0:
rts
.size ___ashlsi3,.-___ashlsi3
#endif
#ifdef L_lshrsi3
.text
.globl ___lshrsi3
.type ___lshrsi3,@function
___lshrsi3:
mov (4,a3),a0
cmp 0,a0
beq .L0
.L1:
lsr d1
ror d0
add -1,a0
bne .L1
.L0:
rts
.size ___lshrsi3,.-___lshrsi3
#endif
#ifdef L_ashrsi3
.text
.globl ___ashrsi3
.type ___ashrsi3,@function
___ashrsi3:
mov (4,a3),a0
cmp 0,a0
beq .L0
.L1:
asr d1
ror d0
add -1,a0
bne .L1
.L0:
rts
.size ___ashrsi3,.-___ashrsi3
#endif
/* All functions beyond this point pass their arguments in registers! */
#ifdef L_negsi2_d0
.text
.globl ___negsi2_d0
.type ___negsi2_d0,@function
___negsi2_d0:
add -8,a3
movx d3,(0,a3)
movx d2,(4,a3)
mov d0,d2
mov d1,d3
sub d0,d0
sub d1,d1
sub d2,d0
subc d3,d1
movx (0,a3),d3
movx (4,a3),d2
add 8,a3
rts
.size ___negsi2_d0,.-___negsi2_d0
#endif
#ifdef L_negsi2_d2
.text
.globl ___negsi2_d2
.type ___negsi2_d2,@function
___negsi2_d2:
add -8,a3
movx d1,(0,a3)
movx d0,(4,a3)
mov d2,d0
mov d3,d1
sub d2,d2
sub d3,d3
sub d0,d2
subc d1,d3
movx (0,a3),d1
movx (4,a3),d0
add 8,a3
rts
.size ___negsi2_d2,.-___negsi2_d2
#endif
#ifdef L_zero_extendpsisi2_d0
.text
.globl ___zero_extendpsisi2_d0
.type ___zero_extendpsisi2_d0,@function
___zero_extendpsisi2_d0:
add -4,a3
movx d0,(0,a3)
movbu (2,a3),d1
add 4,a3
rts
.size ___zero_extendpsisi2_d0,.-___zero_extendpsisi2_d0
#endif
#ifdef L_zero_extendpsisi2_d2
.text
.globl ___zero_extendpsisi2_d2
.type ___zero_extendpsisi2_d2,@function
___zero_extendpsisi2_d2:
add -4,a3
movx d2,(0,a3)
movbu (2,a3),d3
add 4,a3
rts
.size ___zero_extendpsisi2_d2,.-___zero_extendpsisi2_d2
#endif
#ifdef L_sign_extendpsisi2_d0
.text
.globl ___sign_extendpsisi2_d0
.type ___sign_extendpsisi2_d0,@function
___sign_extendpsisi2_d0:
add -4,a3
movx d0,(0,a3)
movb (2,a3),d1
add 4,a3
rts
.size ___sign_extendpsisi2_d0,.-___sign_extendpsisi2_d0
#endif
#ifdef L_sign_extendpsisi2_d2
.text
.globl ___sign_extendpsisi2_d2
.type ___sign_extendpsisi2_d2,@function
___sign_extendpsisi2_d2:
add -4,a3
movx d2,(0,a3)
movb (2,a3),d3
add 4,a3
rts
.size ___sign_extendpsisi2_d2,.-___sign_extendpsisi2_d2
#endif
#ifdef L_truncsipsi2_d0_d0
.text
.globl ___truncsipsi2_d0_d0
.type ___truncsipsi2_d0_d0,@function
___truncsipsi2_d0_d0:
add -4,a3
mov d0,(a3)
mov d1,(2,a3)
movx (0,a3),d0
add 4,a3
rts
.size ___truncsipsi2_d0_d0,.-___truncsipsi2_d0_d0
#endif
#ifdef L_truncsipsi2_d0_d1
.text
.globl ___truncsipsi2_d0_d1
.type ___truncsipsi2_d0_d1,@function
___truncsipsi2_d0_d1:
add -4,a3
mov d0,(a3)
mov d1,(2,a3)
movx (0,a3),d1
add 4,a3
rts
.size ___truncsipsi2_d0_d1,.-___truncsipsi2_d0_d1
#endif
#ifdef L_truncsipsi2_d0_d2
.text
.globl ___truncsipsi2_d0_d2
.type ___truncsipsi2_d0_d2,@function
___truncsipsi2_d0_d2:
add -4,a3
mov d0,(a3)
mov d1,(2,a3)
movx (0,a3),d2
add 4,a3
rts
.size ___truncsipsi2_d0_d2,.-___truncsipsi2_d0_d2
#endif
#ifdef L_truncsipsi2_d0_d3
.text
.globl ___truncsipsi2_d0_d3
.type ___truncsipsi2_d0_d3,@function
___truncsipsi2_d0_d3:
add -4,a3
mov d0,(a3)
mov d1,(2,a3)
movx (0,a3),d3
add 4,a3
rts
.size ___truncsipsi2_d0_d3,.-___truncsipsi2_d0_d3
#endif
#ifdef L_truncsipsi2_d2_d0
.text
.globl ___truncsipsi2_d2_d0
.type ___truncsipsi2_d2_d0,@function
___truncsipsi2_d2_d0:
add -4,a3
mov d2,(a3)
mov d3,(2,a3)
movx (0,a3),d0
add 4,a3
rts
.size ___truncsipsi2_d2_d0,.-___truncsipsi2_d2_d0
#endif
#ifdef L_truncsipsi2_d2_d1
.text
.globl ___truncsipsi2_d2_d1
.type ___truncsipsi2_d2_d1,@function
___truncsipsi2_d2_d1:
add -4,a3
mov d2,(a3)
mov d3,(2,a3)
movx (0,a3),d1
add 4,a3
rts
.size ___truncsipsi2_d2_d1,.-___truncsipsi2_d2_d1
#endif
#ifdef L_truncsipsi2_d2_d2
.text
.globl ___truncsipsi2_d2_d2
.type ___truncsipsi2_d2_d2,@function
___truncsipsi2_d2_d2:
add -4,a3
mov d2,(a3)
mov d3,(2,a3)
movx (0,a3),d2
add 4,a3
rts
.size ___truncsipsi2_d2_d2,.-___truncsipsi2_d2_d2
#endif
#ifdef L_truncsipsi2_d2_d3
.text
.globl ___truncsipsi2_d2_d3
.type ___truncsipsi2_d2_d3,@function
___truncsipsi2_d2_d3:
add -4,a3
mov d2,(a3)
mov d3,(2,a3)
movx (0,a3),d3
add 4,a3
rts
.size ___truncsipsi2_d2_d3,.-___truncsipsi2_d2_d3
#endif
#ifdef L_cmpsi2
.text
.globl ___cmpsi2
.type ___cmpsi2,@function
___cmpsi2:
add -4,a3
mov a1,(0,a3)
mov (10,a3),a1
mov (8,a3),a0
cmp a1,d1
blt .L9
bgt .L6
cmp a0,d0
bcc .L5
.L9:
sub d0,d0
jmp .L8
.L5:
cmp a0,d0
bhi .L6
mov 1,d0
jmp .L8
.L6:
mov 2,d0
.L8:
mov (0,a3),a1
add 4,a3
rts
.size ___cmpsi2,.-___cmpsi2
#endif
#ifdef L_ucmpsi2
.text
.globl ___ucmpsi2
.type ___ucmpsi2,@function
___ucmpsi2:
add -4,a3
mov a1,(0,a3)
mov (10,a3),a1
mov (8,a3),a0
cmp a1,d1
bcs .L9
bhi .L6
cmp a0,d0
bcc .L5
.L9:
sub d0,d0
jmp .L8
.L5:
cmp a0,d0
bhi .L6
mov 1,d0
jmp .L8
.L6:
mov 2,d0
.L8:
mov (0,a3),a1
add 4,a3
rts
.size ___ucmpsi2,.-___ucmpsi2
#endif
#ifdef L_prologue
.text
.globl ___prologue
.type ___prologue,@function
___prologue:
mov (0,a3),a0
add -16,a3
movx d2,(4,a3)
movx d3,(8,a3)
mov a1,(12,a3)
mov a2,(16,a3)
mov a0,(0,a3)
rts
.size ___prologue,.-___prologue
#endif
#ifdef L_epilogue_a0
.text
.globl ___epilogue_a0
.type ___epilogue_a0,@function
___epilogue_a0:
mov (0,a3),a0
movx (4,a3),d2
movx (8,a3),d3
mov (12,a3),a1
mov (16,a3),a2
add 16,a3
mov a0,(0,a3)
rts
.size ___epilogue_a0,.-___epilogue_a0
#endif
#ifdef L_epilogue_d0
.text
.globl ___epilogue_d0
.type ___epilogue_d0,@function
___epilogue_d0:
movx (0,a3),d0
movx (4,a3),d2
movx (8,a3),d3
mov (12,a3),a1
mov (16,a3),a2
add 16,a3
movx d0,(0,a3)
rts
.size ___epilogue_d0,.-___epilogue_d0
#endif
#ifdef L_epilogue_noreturn
.text
.globl ___epilogue_noreturn
.type ___epilogue_noreturn,@function
___epilogue_noreturn:
movx (0,a3),d2
movx (4,a3),d3
mov (8,a3),a1
mov (12,a3),a2
add 16,a3
rts
.size ___epilogue_noreturn,.-___epilogue_noreturn
#endif

1532
gnu/dist/gcc/config/mn10200/mn10200.c vendored
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1078
gnu/dist/gcc/config/mn10200/mn10200.h vendored
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1978
gnu/dist/gcc/config/mn10200/mn10200.md vendored
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File diff suppressed because it is too large Load Diff

55
gnu/dist/gcc/config/mn10200/t-mn10200 vendored
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@ -1,55 +0,0 @@
LIBGCC1=libgcc1.null
CROSS_LIBGCC1 = libgcc1-asm.a
LIB1ASMSRC = mn10200/lib1funcs.asm
LIB1ASMFUNCS = _divhi3 \
_modhi3 \
_addsi3 \
_subsi3 \
_mulsi3 \
_ashlsi3 \
_lshrsi3 \
_ashrsi3 \
_negsi2_d0 \
_negsi2_d2 \
_zero_extendpsisi2_d0 \
_zero_extendpsisi2_d2 \
_sign_extendpsisi2_d0 \
_sign_extendpsisi2_d2 \
_truncsipsi2_d0_d0 \
_truncsipsi2_d0_d1 \
_truncsipsi2_d0_d2 \
_truncsipsi2_d0_d3 \
_truncsipsi2_d2_d0 \
_truncsipsi2_d2_d1 \
_truncsipsi2_d2_d2 \
_truncsipsi2_d2_d3 \
_cmpsi2 \
_ucmpsi2 \
_prologue \
_epilogue_a0 \
_epilogue_d0 \
_epilogue_noreturn
# These are really part of libgcc1, but this will cause them to be
# built correctly, so...
# We do not have DF or DI types, so fake out the libgcc2 compilation.
TARGET_LIBGCC2_CFLAGS=-DDF=SF -DDI=SI
LIB2FUNCS_EXTRA = $(srcdir)/config/mn10200/udivmodsi4.c \
$(srcdir)/config/mn10200/divmod.c $(srcdir)/config/mn10200/udivmod.c
# We want fine grained libraries, so use the new code to build the
# floating point emulation libraries. The mn10200 only has single
# precision floating point.
FPBIT = fp-bit.c
fp-bit.c: $(srcdir)/config/fp-bit.c
echo '#define FLOAT' > fp-bit.c
echo '#define FLOAT_ONLY' >> fp-bit.c
echo '#define SMALL_MACHINE' >> fp-bit.c
echo '#define CMPtype HItype' >> fp-bit.c
echo '#ifdef __LITTLE_ENDIAN__' >> fp-bit.c
echo '#define FLOAT_BIT_ORDER_MISMATCH' >>fp-bit.c
echo '#endif' >> fp-bit.c
cat $(srcdir)/config/fp-bit.c >> fp-bit.c

14
gnu/dist/gcc/config/mn10200/udivmod.c vendored
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@ -1,14 +0,0 @@
long udivmodsi4 ();
long
__udivsi3 (long a, long b)
{
return udivmodsi4 (a, b, 0);
}
long
__umodsi3 (long a, long b)
{
return udivmodsi4 (a, b, 1);
}

24
gnu/dist/gcc/config/mn10200/udivmodsi4.c vendored
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@ -1,24 +0,0 @@
unsigned long
udivmodsi4(unsigned long num, unsigned long den, int modwanted)
{
unsigned long bit = 1;
unsigned long res = 0;
while (den < num && bit && !(den & (1L<<31)))
{
den <<=1;
bit <<=1;
}
while (bit)
{
if (num >= den)
{
num -= den;
res |= bit;
}
bit >>=1;
den >>=1;
}
if (modwanted) return num;
return res;
}

47
gnu/dist/gcc/config/mn10200/xm-mn10200.h vendored
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@ -1,47 +0,0 @@
/* Configuration for Matsushita MN10200.
Copyright (C) 1997 Free Software Foundation, Inc.
Contributed by Cygnus Support.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* #defines that need visibility everywhere. */
#define FALSE 0
#define TRUE 1
/* This describes the machine the compiler is hosted on. */
#define HOST_BITS_PER_CHAR 8
#define HOST_BITS_PER_SHORT 16
#define HOST_BITS_PER_INT 16
#define HOST_BITS_PER_LONG 32
#define HOST_BITS_PER_LONGLONG 64
/* Arguments to use with `exit'. */
#define SUCCESS_EXIT_CODE 0
#define FATAL_EXIT_CODE 33
/* target machine dependencies.
tm.h is a symbolic link to the actual target specific file. */
#include "tm.h"
#ifndef __STDC__
extern char *malloc (), *realloc (), *calloc ();
#else
extern void *malloc (), *realloc (), *calloc ();
#endif
extern void free ();

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gnu/dist/gcc/config/mn10300/mn10300.h vendored
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gnu/dist/gcc/config/mn10300/t-mn10300 vendored
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@ -1,23 +0,0 @@
LIBGCC1=libgcc1.null
CROSS_LIBGCC1=libgcc1.null
# These are really part of libgcc1, but this will cause them to be
# built correctly, so...
# We want fine grained libraries, so use the new code to build the
# floating point emulation libraries.
FPBIT = fp-bit.c
DPBIT = dp-bit.c
dp-bit.c: $(srcdir)/config/fp-bit.c
echo '#ifdef __LITTLE_ENDIAN__' > dp-bit.c
echo '#define FLOAT_BIT_ORDER_MISMATCH' >>dp-bit.c
echo '#endif' >> dp-bit.c
cat $(srcdir)/config/fp-bit.c >> dp-bit.c
fp-bit.c: $(srcdir)/config/fp-bit.c
echo '#define FLOAT' > fp-bit.c
echo '#ifdef __LITTLE_ENDIAN__' >> fp-bit.c
echo '#define FLOAT_BIT_ORDER_MISMATCH' >>fp-bit.c
echo '#endif' >> fp-bit.c
cat $(srcdir)/config/fp-bit.c >> fp-bit.c

47
gnu/dist/gcc/config/mn10300/xm-mn10300.h vendored
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@ -1,47 +0,0 @@
/* Configuration for Matsushita MN10300.
Copyright (C) 1996 Free Software Foundation, Inc.
Contributed by Cygnus Support.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* #defines that need visibility everywhere. */
#define FALSE 0
#define TRUE 1
/* This describes the machine the compiler is hosted on. */
#define HOST_BITS_PER_CHAR 8
#define HOST_BITS_PER_SHORT 16
#define HOST_BITS_PER_INT 32
#define HOST_BITS_PER_LONG 32
#define HOST_BITS_PER_LONGLONG 64
/* Arguments to use with `exit'. */
#define SUCCESS_EXIT_CODE 0
#define FATAL_EXIT_CODE 33
/* target machine dependencies.
tm.h is a symbolic link to the actual target specific file. */
#include "tm.h"
#ifndef __STDC__
extern char *malloc (), *realloc (), *calloc ();
#else
extern void *malloc (), *realloc (), *calloc ();
#endif
extern void free ();

113
gnu/dist/gcc/config/ns32k/netbsd.h vendored
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/* Configuration for a ns32532 running NetBSD as the target machine.
Copyright (C) 1988, 1994, 1995, 1996, 1998 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA.
*/
#include <ns32k/ns32k.h>
/* Compile for the floating point unit & 32532 by default;
Don't assume SB is zero;
Don't use bitfield instructions;
FPU is 32381; */
#define TARGET_DEFAULT (1 + 24 + 32 + 64 + 256)
/* 32-bit alignment for efficiency */
#undef POINTER_BOUNDARY
#define POINTER_BOUNDARY 32
/* 32-bit alignment for efficiency */
#undef FUNCTION_BOUNDARY
#define FUNCTION_BOUNDARY 32
/* 32532 spec says it can handle any alignment. Rumor from tm-ns32k.h
tells this might not be actually true (but it's for 32032, perhaps
National has fixed the bug for 32532). You might have to change this
if the bug still exists. */
#undef STRICT_ALIGNMENT
#define STRICT_ALIGNMENT 0
/* Use pc relative addressing whenever possible,
it's more efficient than absolute (ns32k.c)
You have to fix a bug in gas 1.38.1 to make this work with gas,
patch available from jkp@cs.hut.fi.
(NetBSD's gas version has this patch already applied) */
#define PC_RELATIVE
/* Operand of bsr or jsr should be just the address. */
#define CALL_MEMREF_IMPLICIT
/* movd insns may have floating point constant operands. */
#define MOVD_FLOAT_OK
/* Get generic NetBSD definitions. */
#include <netbsd.h>
/* Names to predefine in the preprocessor for this target machine. */
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-Dns32k -Dns32000 -Dns32532 -D__NetBSD__ -Dpc532 -D__ns32k__ -D__KPRINTF_ATTRIBUTE__ -Asystem(unix) -Asystem(NetBSD) -Acpu(ns32k) -Amachine(ns32k)"
/* Make gcc agree with <machine/ansi.h> */
#undef SIZE_TYPE
#define SIZE_TYPE "unsigned int"
#undef PTRDIFF_TYPE
#define PTRDIFF_TYPE "int"
#undef WCHAR_TYPE
#define WCHAR_TYPE "int"
#undef WCHAR_UNSIGNED
#define WCHAR_UNSIGNED 0
#undef WCHAR_TYPE_SIZE
#define WCHAR_TYPE_SIZE 32
/* This is BSD, so it wants DBX format. */
#define DBX_DEBUGGING_INFO
/* Do not break .stabs pseudos into continuations. */
#define DBX_CONTIN_LENGTH 0
/* This is the char to use for continuation (in case we need to turn
continuation back on). */
#define DBX_CONTIN_CHAR '?'
/* Don't default to pcc-struct-return, because gcc is the only compiler, and
we want to retain compatibility with older gcc versions. */
#undef PCC_STATIC_STRUCT_RETURN
#define DEFAULT_PCC_STRUCT_RETURN 0
/* Until they use ELF or something that handles dwarf2 unwinds
and initialization stuff better. */
#define DWARF2_UNWIND_INFO 0

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gnu/dist/gcc/config/ns32k/x-genix vendored
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@ -1,6 +0,0 @@
# Makefile modifications for compilation on Genix.
ALLOCA=alloca.o
MALLOC = malloc.o
# You must get malloc.c and getpagesize.h from GNU Emacs.

5
gnu/dist/gcc/config/ns32k/xm-genix.h vendored
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@ -1,5 +0,0 @@
/* Config file for ns32k running system V. */
#include "ns32k/xm-ns32k.h"
#define USG

10
gnu/dist/gcc/config/ns32k/xm-netbsd.h vendored
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@ -1,10 +0,0 @@
/* Configuration for GCC for ns32k running NetBSD as host. */
#include <ns32k/xm-ns32k.h>
/* ns32k/xm-ns32k.h defines these macros, but we don't need them */
#undef memcmp
#undef memcpy
#undef memset
#include <xm-netbsd.h>

42
gnu/dist/gcc/config/ns32k/xm-ns32k.h vendored
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@ -1,42 +0,0 @@
/* Configuration for GNU C-compiler for Vax.
Copyright (C) 1987, 1993 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* #defines that need visibility everywhere. */
#define FALSE 0
#define TRUE 1
/* target machine dependencies.
tm.h is a symbolic link to the actual target specific file. */
#include "tm.h"
/* This describes the machine the compiler is hosted on. */
#define HOST_BITS_PER_CHAR 8
#define HOST_BITS_PER_SHORT 16
#define HOST_BITS_PER_INT 32
#define HOST_BITS_PER_LONG 32
#define HOST_BITS_PER_LONGLONG 64
/* Arguments to use with `exit'. */
#define SUCCESS_EXIT_CODE 0
#define FATAL_EXIT_CODE 33
#define memcpy(src,dst,len) bcopy ((dst),(src),(len))
#define memset gcc_memset
#define memcmp(left,right,len) bcmp ((left),(right),(len))

7
gnu/dist/gcc/config/ns32k/xm-pc532-min.h vendored
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@ -1,7 +0,0 @@
#ifndef HZ
#define HZ 60
#endif
#ifndef MAXPATHLEN
#define MAXPATHLEN 1024
#endif

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gnu/dist/gcc/config/pa/ee.asm vendored
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; Subroutines for out of line prologues and epilogues on for the HPPA
; Copyright (C) 1994, 1995, 1996 Free Software Foundation, Inc.
; This file is part of GNU CC.
; GNU CC is free software; you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
; the Free Software Foundation; either version 2, or (at your option)
; any later version.
; GNU CC is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; GNU General Public License for more details.
; You should have received a copy of the GNU General Public License
; along with GNU CC; see the file COPYING. If not, write to
; the Free Software Foundation, 59 Temple Place - Suite 330,
; Boston, MA 02111-1307, USA.
.SPACE $PRIVATE$
.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31
.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82
.SPACE $TEXT$
.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44
.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY
.SUBSPA $MILLICODE$,QUAD=0,ALIGN=8,ACCESS=44,SORT=8
; This is an out-of-line prologue.
;
; It performs the following operations:
;
; * Saves the return pointer at sp - 20
;
; * Creates a new stack frame (sp'), size of the frame is passed in %r21
;
; * The old stack pointer is saved at sp (frame pointer version only).
;
; * Saves grs (passed in low 16 bits of %r22 into the stack frame
; at sp' + local_fsize (passed in %r19).
;
; * Saves frs (passed in high 16 bits of %r22) into the stack
; frame at sp' + local_fsize (passed in %r19).
;
; * Sets up a frame pointer (in %r3) (frame pointer version only).
;
; * Returns to the instruction _immediately_ after the call to
; this function.
.SPACE $TEXT$
.SUBSPA $MILLICODE$
.EXPORT __outline_prologue,MILLICODE
.align 32
__outline_prologue
.PROC
.CALLINFO FRAME=0,NO_CALLS
.ENTRY
copy %r30,%r20
; Subtract 4 from our return pointer so that we return to
; the right location.
ldo -4(%r31),%r31
; Save off %r2
stw %r2,-20(0,%r30)
; Make our new frame.
add %r21,%r30,%r30
; Add in local_fsize to our frame pointer so we do register
; saves into the right place
add %r20,%r19,%r20
; %r22 tells us what registers we need to save. The upper half
; is for fp registers, the lower half for integer registers.
; We put the lower half in %r1 and the upper half into %r22
; for later use.
extru %r22,31,16,%r1
extrs %r22,15,16,%r22
; %r1 now olds a value 0-18 which corresponds to the number
; of grs we need to save. We need to reverse that value so
; we can just into the table and straight-line execute to the
; end of the gr saves.
comb,= %r0,%r1,L$0000
subi 18,%r1,%r1
blr,n %r1,%r0
b,n L$0000
stws,ma %r18,4(0,%r20)
nop
stws,ma %r17,4(0,%r20)
nop
stws,ma %r16,4(0,%r20)
nop
stws,ma %r15,4(0,%r20)
nop
stws,ma %r14,4(0,%r20)
nop
stws,ma %r13,4(0,%r20)
nop
stws,ma %r12,4(0,%r20)
nop
stws,ma %r11,4(0,%r20)
nop
stws,ma %r10,4(0,%r20)
nop
stws,ma %r9,4(0,%r20)
nop
stws,ma %r8,4(0,%r20)
nop
stws,ma %r7,4(0,%r20)
nop
stws,ma %r6,4(0,%r20)
nop
stws,ma %r5,4(0,%r20)
nop
stws,ma %r4,4(0,%r20)
nop
stws,ma %r3,4(0,%r20)
nop
L$0000
; All gr saves are done. Align the temporary frame pointer and
; do the fr saves.
ldo 7(%r20),%r20
depi 0,31,3,%r20
comb,= %r0,%r22,L$0001
subi 21,%r22,%r22
blr,n %r22,%r0
b,n L$0001
fstws,ma %fr21,8(0,%r20)
nop
fstws,ma %fr20,8(0,%r20)
nop
fstws,ma %fr19,8(0,%r20)
nop
fstws,ma %fr18,8(0,%r20)
nop
fstws,ma %fr17,8(0,%r20)
nop
fstws,ma %fr16,8(0,%r20)
nop
fstws,ma %fr15,8(0,%r20)
nop
fstws,ma %fr14,8(0,%r20)
nop
fstws,ma %fr13,8(0,%r20)
nop
fstws,ma %fr12,8(0,%r20)
nop
L$0001
; Return
bv,n 0(%r31)
.EXIT
.PROCEND
.EXPORT __outline_epilogue,MILLICODE
.align 32
__outline_epilogue
.PROC
.CALLINFO FRAME=0,NO_CALLS
.ENTRY
; Get our original stack pointer and put it in %r20
sub %r30,%r21,%r20
; Subtract 4 from our return pointer so that we return to
; the right location.
ldo -4(%r31),%r31
; Reload %r2
ldw -20(0,%r20),%r2
; Add in local_fsize (%r19) to the frame pointer to find
; the saved registers.
add %r20,%r19,%r20
; %r22 tells us what registers we need to restore. The upper half
; is for fp registers, the lower half for integer registers.
; We put the lower half in %r1 and the upper half into %r22
; for later use.
extru %r22,31,16,%r1
extrs %r22,15,16,%r22
; %r1 now olds a value 0-18 which corresponds to the number
; of grs we need to restore. We need to reverse that value so
; we can just into the table and straight-line execute to the
; end of the gr restore.
comb,= %r0,%r1,L$0004
subi 18,%r1,%r1
blr,n %r1,%r0
b,n L$0004
ldws,ma 4(0,%r20),%r18
nop
ldws,ma 4(0,%r20),%r17
nop
ldws,ma 4(0,%r20),%r16
nop
ldws,ma 4(0,%r20),%r15
nop
ldws,ma 4(0,%r20),%r14
nop
ldws,ma 4(0,%r20),%r13
nop
ldws,ma 4(0,%r20),%r12
nop
ldws,ma 4(0,%r20),%r11
nop
ldws,ma 4(0,%r20),%r10
nop
ldws,ma 4(0,%r20),%r9
nop
ldws,ma 4(0,%r20),%r8
nop
ldws,ma 4(0,%r20),%r7
nop
ldws,ma 4(0,%r20),%r6
nop
ldws,ma 4(0,%r20),%r5
nop
ldws,ma 4(0,%r20),%r4
nop
ldws,ma 4(0,%r20),%r3
nop
L$0004
; All gr restore are done. Align the temporary frame pointer and
; do the fr restore.
ldo 7(%r20),%r20
depi 0,31,3,%r20
comb,= %r0,%r22,L$0005
subi 21,%r22,%r22
blr,n %r22,%r0
b,n L$0005
fldws,ma 8(0,%r20),%fr21
nop
fldws,ma 8(0,%r20),%fr20
nop
fldws,ma 8(0,%r20),%fr19
nop
fldws,ma 8(0,%r20),%fr18
nop
fldws,ma 8(0,%r20),%fr17
nop
fldws,ma 8(0,%r20),%fr16
nop
fldws,ma 8(0,%r20),%fr15
nop
fldws,ma 8(0,%r20),%fr14
nop
fldws,ma 8(0,%r20),%fr13
nop
fldws,ma 8(0,%r20),%fr12
nop
L$0005
; Return and deallocate our frame.
bv 0(%r31)
sub %r30,%r21,%r30
.EXIT
.PROCEND

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gnu/dist/gcc/config/pa/ee_fp.asm vendored
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@ -1,274 +0,0 @@
; Subroutines for out of line prologues and epilogues on for the HPPA
; Copyright (C) 1994, 1995, 1996 Free Software Foundation, Inc.
; This file is part of GNU CC.
; GNU CC is free software; you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
; the Free Software Foundation; either version 2, or (at your option)
; any later version.
; GNU CC is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; GNU General Public License for more details.
; You should have received a copy of the GNU General Public License
; along with GNU CC; see the file COPYING. If not, write to
; the Free Software Foundation, 59 Temple Place - Suite 330,
; Boston, MA 02111-1307, USA.
.SPACE $PRIVATE$
.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31
.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82
.SPACE $TEXT$
.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44
.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY
.SUBSPA $MILLICODE$,QUAD=0,ALIGN=8,ACCESS=44,SORT=8
; This is an out-of-line prologue.
;
; It performs the following operations:
;
; * Saves the return pointer at sp - 20
;
; * Creates a new stack frame (sp'), size of the frame is passed in %r21
;
; * The old stack pointer is saved at sp (frame pointer version only).
;
; * Saves grs (passed in low 16 bits of %r22 into the stack frame
; at sp' + local_fsize (passed in %r19).
;
; * Saves frs (passed in high 16 bits of %r22) into the stack
; frame at sp' + local_fsize (passed in %r19).
;
; * Sets up a frame pointer (in %r3) (frame pointer version only).
;
; * Returns to the instruction _immediately_ after the call to
; this function.
.SPACE $TEXT$
.SUBSPA $MILLICODE$
.EXPORT __outline_prologue_fp,MILLICODE
.align 32
__outline_prologue_fp
.PROC
.CALLINFO FRAME=0,NO_CALLS
.ENTRY
copy %r30,%r20
; Subtract 4 from our return pointer so that we return to
; the right location.
ldo -4(%r31),%r31
; Save off %r2
stw %r2,-20(0,%r30)
; Make our new frame.
add %r21,%r30,%r30
; Save our old stack pointer.
stw %r20,0(0,%r20)
; Add in local_fsize to our frame pointer so we do register
; saves into the right place
add %r20,%r19,%r20
; %r22 tells us what registers we need to save. The upper half
; is for fp registers, the lower half for integer registers.
; We put the lower half in %r1 and the upper half into %r22
; for later use.
extru %r22,31,16,%r1
extrs %r22,15,16,%r22
; %r1 now olds a value 0-18 which corresponds to the number
; of grs we need to save. We need to reverse that value so
; we can just into the table and straight-line execute to the
; end of the gr saves.
comb,= %r0,%r1,L$0002
subi 18,%r1,%r1
blr,n %r1,%r0
b,n L$0002
stws,ma %r18,4(0,%r20)
nop
stws,ma %r17,4(0,%r20)
nop
stws,ma %r16,4(0,%r20)
nop
stws,ma %r15,4(0,%r20)
nop
stws,ma %r14,4(0,%r20)
nop
stws,ma %r13,4(0,%r20)
nop
stws,ma %r12,4(0,%r20)
nop
stws,ma %r11,4(0,%r20)
nop
stws,ma %r10,4(0,%r20)
nop
stws,ma %r9,4(0,%r20)
nop
stws,ma %r8,4(0,%r20)
nop
stws,ma %r7,4(0,%r20)
nop
stws,ma %r6,4(0,%r20)
nop
stws,ma %r5,4(0,%r20)
nop
stws,ma %r4,4(0,%r20)
nop
stws,ma %r3,4(0,%r20)
nop
L$0002
; All gr saves are done. Align the temporary frame pointer and
; do the fr saves.
ldo 7(%r20),%r20
depi 0,31,3,%r20
comb,= %r0,%r22,L$0003
subi 21,%r22,%r22
blr,n %r22,%r0
b,n L$0003
fstws,ma %fr21,8(0,%r20)
nop
fstws,ma %fr20,8(0,%r20)
nop
fstws,ma %fr19,8(0,%r20)
nop
fstws,ma %fr18,8(0,%r20)
nop
fstws,ma %fr17,8(0,%r20)
nop
fstws,ma %fr16,8(0,%r20)
nop
fstws,ma %fr15,8(0,%r20)
nop
fstws,ma %fr14,8(0,%r20)
nop
fstws,ma %fr13,8(0,%r20)
nop
fstws,ma %fr12,8(0,%r20)
nop
L$0003
; Return, setting up a frame pointer in the delay slot
bv 0(%r31)
sub %r30,%r21,%r3
.EXIT
.PROCEND
; This is an out-of-line epilogue. It's operation is basically the reverse
; of the out-of-line prologue.
.EXPORT __outline_epilogue_fp,MILLICODE
.align 32
__outline_epilogue_fp
.PROC
.CALLINFO FRAME=0,NO_CALLS
.ENTRY
; Make a copy of our frame pointer into %r20
copy %r3,%r20
; Subtract 4 from our return pointer so that we return to
; the right location.
ldo -4(%r31),%r31
; Reload %r2
; First save off %r2
ldw -20(0,%r20),%r2
; Load our old stack pointer, save it in %r21.
ldw 0(0,%r20),%r21
; Add in local_fsize (%r19) to the frame pointer to find
; the saved registers.
add %r20,%r19,%r20
; %r22 tells us what registers we need to restore. The upper half
; is for fp registers, the lower half for integer registers.
; We put the lower half in %r1 and the upper half into %r22
; for later use.
extru %r22,31,16,%r1
extrs %r22,15,16,%r22
; %r1 now olds a value 0-18 which corresponds to the number
; of grs we need to restore. We need to reverse that value so
; we can just into the table and straight-line execute to the
; end of the gr restore.
comb,= %r0,%r1,L$0006
subi 18,%r1,%r1
blr,n %r1,%r0
b,n L$0006
ldws,ma 4(0,%r20),%r18
nop
ldws,ma 4(0,%r20),%r17
nop
ldws,ma 4(0,%r20),%r16
nop
ldws,ma 4(0,%r20),%r15
nop
ldws,ma 4(0,%r20),%r14
nop
ldws,ma 4(0,%r20),%r13
nop
ldws,ma 4(0,%r20),%r12
nop
ldws,ma 4(0,%r20),%r11
nop
ldws,ma 4(0,%r20),%r10
nop
ldws,ma 4(0,%r20),%r9
nop
ldws,ma 4(0,%r20),%r8
nop
ldws,ma 4(0,%r20),%r7
nop
ldws,ma 4(0,%r20),%r6
nop
ldws,ma 4(0,%r20),%r5
nop
ldws,ma 4(0,%r20),%r4
nop
ldws,ma 4(0,%r20),%r3
nop
L$0006
; All gr restore are done. Align the temporary frame pointer and
; do the fr restore.
ldo 7(%r20),%r20
depi 0,31,3,%r20
comb,= %r0,%r22,L$0007
subi 21,%r22,%r22
blr,n %r22,%r0
b,n L$0007
fldws,ma 8(0,%r20),%fr21
nop
fldws,ma 8(0,%r20),%fr20
nop
fldws,ma 8(0,%r20),%fr19
nop
fldws,ma 8(0,%r20),%fr18
nop
fldws,ma 8(0,%r20),%fr17
nop
fldws,ma 8(0,%r20),%fr16
nop
fldws,ma 8(0,%r20),%fr15
nop
fldws,ma 8(0,%r20),%fr14
nop
fldws,ma 8(0,%r20),%fr13
nop
fldws,ma 8(0,%r20),%fr12
nop
L$0007
; Return and deallocate our frame.
bv 0(%r31)
copy %r21,%r30
.EXIT
.PROCEND

1146
gnu/dist/gcc/config/pa/lib1funcs.asm vendored
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