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Pull up following revision(s) (requested by riastradh in ticket #998): 

sys/dev/pci/agp_i810var.h: revision 1.7
	sys/external/bsd/drm2/i915drm/intel_gtt.c: revision 1.7
	sys/dev/pci/agp_i810.c: revision 1.123

Restore gtt page table control register on resume.

Additional subroutine agp_i810_reset is used by i915drmkms to make
sure it happens early enough, since i915drmkms resumes before agp.

XXX pullup-7
XXX pullup-8
This commit is contained in:
martin 2018-08-31 17:51:15 +00:00
parent 850bae5755
commit 1b7aa52fd8
3 changed files with 26 additions and 15 deletions
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21
sys/dev/pci/agp_i810.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: agp_i810.c,v 1.122 2016/05/01 04:22:50 nonaka Exp $ */
/* $NetBSD: agp_i810.c,v 1.122.10.1 2018/08/31 17:51:15 martin Exp $ */
/*-
* Copyright (c) 2000 Doug Rabson
@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.122 2016/05/01 04:22:50 nonaka Exp $");
__KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.122.10.1 2018/08/31 17:51:15 martin Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -1490,17 +1490,24 @@ agp_i810_unbind_memory(struct agp_softc *sc, struct agp_memory *mem)
return 0;
}
void
agp_i810_reset(struct agp_i810_softc *isc)
{
/* Restore the page table control register. */
bus_space_write_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL,
isc->pgtblctl);
agp_flush_cache();
}
static bool
agp_i810_resume(device_t dv, const pmf_qual_t *qual)
{
struct agp_softc *sc = device_private(dv);
struct agp_i810_softc *isc = sc->as_chipc;
/*
* XXX Nothing uses this! Save on suspend, restore on resume?
*/
isc->pgtblctl_resume_hack = READ4(AGP_I810_PGTBL_CTL);
agp_flush_cache();
agp_i810_reset(isc);
return true;
}

8
sys/dev/pci/agp_i810var.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: agp_i810var.h,v 1.6 2015/03/06 22:03:06 riastradh Exp $ */
/* $NetBSD: agp_i810var.h,v 1.6.10.1 2018/08/31 17:51:15 martin Exp $ */
/*-
* Copyright (c) 2000 Doug Rabson
@ -58,11 +58,8 @@ struct agp_i810_softc {
struct agp_gatt *gatt; /* i810-only OS-allocated GTT */
uint32_t dcache_size; /* i810-only on-chip memory size */
/* XXX Kludge to work around broken X servers. */
/* Cached pgtblctl register for resume. */
pcireg_t pgtblctl;
/* XXX Vestige of unfinished powerhook? */
uint32_t pgtblctl_resume_hack;
};
extern struct agp_softc *agp_i810_sc;
@ -75,3 +72,4 @@ int agp_i810_write_gtt_entry(struct agp_i810_softc *, off_t, bus_addr_t,
int);
void agp_i810_post_gtt_entry(struct agp_i810_softc *, off_t);
void agp_i810_chipset_flush(struct agp_i810_softc *);
void agp_i810_reset(struct agp_i810_softc *);

12
sys/external/bsd/drm2/i915drm/intel_gtt.c vendored
View File

@ -1,4 +1,4 @@
/* $NetBSD: intel_gtt.c,v 1.5.10.1 2018/08/31 17:43:03 martin Exp $ */
/* $NetBSD: intel_gtt.c,v 1.5.10.2 2018/08/31 17:51:15 martin Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@ -32,7 +32,7 @@
/* Intel GTT stubs */
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: intel_gtt.c,v 1.5.10.1 2018/08/31 17:43:03 martin Exp $");
__KERNEL_RCSID(0, "$NetBSD: intel_gtt.c,v 1.5.10.2 2018/08/31 17:51:15 martin Exp $");
#include <sys/types.h>
#include <sys/bus.h>
@ -125,8 +125,14 @@ intel_gmch_remove(void)
bool
intel_enable_gtt(void)
{
struct agp_softc *sc = agp_i810_sc;
struct agp_i810_softc *isc;
return (agp_i810_sc != NULL);
if (sc == NULL)
return false;
isc = sc->as_chipc;
agp_i810_reset(isc);
return true;
}
void