Allow alpha_print_instruction() to be called from outside DDB, and
allow the caller to supply a buffer to contain the pretty-printed insn string, rather than db_printf() (which is used if there is no supplied buffer).
This commit is contained in:
thorpej
parent
df33d65f6d
commit
1a35e5d35f
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@ -1,4 +1,4 @@
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/* $NetBSD: db_disasm.c,v 1.16 2014/03/20 20:51:40 christos Exp $ */
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/* $NetBSD: db_disasm.c,v 1.17 2021/06/21 02:01:13 thorpej Exp $ */
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/*
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* Mach Operating System
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@ -48,7 +48,7 @@
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: db_disasm.c,v 1.16 2014/03/20 20:51:40 christos Exp $");
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__KERNEL_RCSID(0, "$NetBSD: db_disasm.c,v 1.17 2021/06/21 02:01:13 thorpej Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -781,31 +781,47 @@ static const char * const name_of_register[32] = {
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"t10", "t11", "ra", "pv", "at", "gp", "sp", "zero"
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};
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static int regcount; /* how many regs used in this inst */
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static int regnum[3]; /* which regs used in this inst */
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static const char *
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register_name(int ireg)
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register_name(struct alpha_print_instruction_context *ctx, int ireg)
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{
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int i;
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for (i = 0; i < regcount; i++)
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if (regnum[i] == ireg)
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for (i = 0; i < ctx->regcount; i++)
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if (ctx->regnum[i] == ireg)
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break;
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if (i >= regcount)
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regnum[regcount++] = ireg;
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if (i >= ctx->regcount)
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ctx->regnum[ctx->regcount++] = ireg;
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return (name_of_register[ireg]);
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}
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static void
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insn_printf(struct alpha_print_instruction_context *ctx,
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const char *fmt, ...)
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{
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va_list ap;
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va_start(ap, fmt);
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if (ctx->buf != NULL) {
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if (ctx->cursor < ctx->bufsize) {
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ctx->cursor += vsnprintf(ctx->buf + ctx->cursor,
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ctx->bufsize - ctx->cursor, fmt, ap);
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}
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} else {
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db_vprintf(fmt, ap);
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}
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va_end(ap);
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}
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/*
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* Disassemble instruction at 'loc'. 'altfmt' specifies an
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* (optional) alternate format. Return address of start of
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* next instruction.
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*/
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static int
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alpha_print_instruction(db_addr_t iadr, alpha_instruction i,
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bool showregs)
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int
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alpha_print_instruction(struct alpha_print_instruction_context *ctx)
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{
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const char *opcode;
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int ireg;
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@ -813,18 +829,19 @@ alpha_print_instruction(db_addr_t iadr, alpha_instruction i,
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bool fstore;
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pal_instruction p;
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regcount = 0;
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ctx->regcount = 0;
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fstore = false;
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opcode = op_name[i.mem_format.opcode];
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opcode = op_name[ctx->insn.mem_format.opcode];
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/*
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* Dispatch directly on the opcode, save code
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* duplication sometimes via "harmless gotos".
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*/
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switch (i.mem_format.opcode) {
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switch (ctx->insn.mem_format.opcode) {
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case op_pal:
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/* "call_pal" is a long string; just use a space. */
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db_printf("%s %s", opcode, pal_opname(i.pal_format.function));
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insn_printf(ctx, "%s %s", opcode,
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pal_opname(ctx->insn.pal_format.function));
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break;
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case op_lda:
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case op_ldah:
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@ -846,49 +863,54 @@ alpha_print_instruction(db_addr_t iadr, alpha_instruction i,
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* For this and the following three groups we
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* just need different opcode strings
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*/
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opcode = arit_name(i.operate_lit_format.function);
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opcode = arit_name(ctx->insn.operate_lit_format.function);
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goto operate;
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break;
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case op_logical:
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opcode = logical_name(i.operate_lit_format.function);
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opcode = logical_name(ctx->insn.operate_lit_format.function);
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goto operate;
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break;
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case op_bit:
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opcode = bitop_name(i.operate_lit_format.function);
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opcode = bitop_name(ctx->insn.operate_lit_format.function);
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goto operate;
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break;
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case op_mul:
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opcode = mul_name(i.operate_lit_format.function);
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opcode = mul_name(ctx->insn.operate_lit_format.function);
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operate:
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/*
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* Nice and uniform, just check for literals
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*/
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db_printf("%s\t%s,", opcode,
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register_name(i.operate_lit_format.ra));
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if (i.operate_lit_format.one)
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db_printf("#0x%x", i.operate_lit_format.literal);
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else
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db_printf("%s", register_name(i.operate_reg_format.rb));
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db_printf(",%s", register_name(i.operate_lit_format.rc));
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insn_printf(ctx, "%s\t%s,", opcode,
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register_name(ctx, ctx->insn.operate_lit_format.ra));
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if (ctx->insn.operate_lit_format.one) {
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insn_printf(ctx, "#0x%x",
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ctx->insn.operate_lit_format.literal);
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} else {
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insn_printf(ctx, "%s",
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register_name(ctx,
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ctx->insn.operate_reg_format.rb));
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}
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insn_printf(ctx, ",%s",
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register_name(ctx, ctx->insn.operate_lit_format.rc));
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break;
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case op_vax_float:
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/*
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* The three floating point groups are even simpler
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*/
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opcode = vaxf_name(i.float_format.function);
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opcode = vaxf_name(ctx->insn.float_format.function);
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goto foperate;
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break;
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case op_ieee_float:
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opcode = ieeef_name(i.float_format.function);
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opcode = ieeef_name(ctx->insn.float_format.function);
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goto foperate;
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break;
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case op_any_float:
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opcode = anyf_name(i.float_format.function);
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opcode = anyf_name(ctx->insn.float_format.function);
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foperate:
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db_printf("%s\tf%d,f%d,f%d", opcode,
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i.float_format.fa,
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i.float_format.fb,
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i.float_format.fc);
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insn_printf(ctx, "%s\tf%d,f%d,f%d", opcode,
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ctx->insn.float_format.fa,
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ctx->insn.float_format.fb,
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ctx->insn.float_format.fc);
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break;
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case op_special:
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/*
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@ -897,27 +919,30 @@ foperate:
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{
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register unsigned int code;
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code = (i.mem_format.displacement)&0xffff;
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code = (ctx->insn.mem_format.displacement)&0xffff;
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opcode = special_name(code);
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switch (code) {
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case op_ecb:
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db_printf("%s\t(%s)", opcode,
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register_name(i.mem_format.rb));
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insn_printf(ctx, "%s\t(%s)", opcode,
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register_name(ctx,
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ctx->insn.mem_format.rb));
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break;
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case op_fetch:
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case op_fetch_m:
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db_printf("%s\t0(%s)", opcode,
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register_name(i.mem_format.rb));
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insn_printf(ctx, "%s\t0(%s)", opcode,
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register_name(ctx,
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ctx->insn.mem_format.rb));
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break;
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case op_rpcc:
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case op_rc:
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case op_rs:
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db_printf("%s\t%s", opcode,
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register_name(i.mem_format.ra));
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insn_printf(ctx, "%s\t%s", opcode,
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register_name(ctx,
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ctx->insn.mem_format.ra));
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break;
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default:
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db_printf("%s", opcode);
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insn_printf(ctx, "%s", opcode);
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break;
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}
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}
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@ -927,21 +952,21 @@ foperate:
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* Jump instructions really are of two sorts,
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* depending on the use of the hint info.
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*/
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opcode = jump_name(i.jump_format.action);
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switch (i.jump_format.action) {
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opcode = jump_name(ctx->insn.jump_format.action);
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switch (ctx->insn.jump_format.action) {
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case op_jmp:
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case op_jsr:
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db_printf("%s\t%s,(%s),", opcode,
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register_name(i.jump_format.ra),
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register_name(i.jump_format.rb));
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signed_immediate = i.jump_format.hint;
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insn_printf(ctx, "%s\t%s,(%s),", opcode,
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register_name(ctx, ctx->insn.jump_format.ra),
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register_name(ctx, ctx->insn.jump_format.rb));
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signed_immediate = ctx->insn.jump_format.hint;
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goto branch_displacement;
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break;
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case op_ret:
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case op_jcr:
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db_printf("%s\t%s,(%s)", opcode,
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register_name(i.jump_format.ra),
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register_name(i.jump_format.rb));
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insn_printf(ctx, "%s\t%s,(%s)", opcode,
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register_name(ctx, ctx->insn.jump_format.ra),
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register_name(ctx, ctx->insn.jump_format.rb));
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break;
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}
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break;
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@ -949,30 +974,30 @@ foperate:
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/*
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* These are just in "operate" format.
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*/
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opcode = intmisc_name(i.operate_lit_format.function);
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opcode = intmisc_name(ctx->insn.operate_lit_format.function);
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goto operate;
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break;
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/* HW instructions, possibly chip-specific XXXX */
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case op_pal19: /* "hw_mfpr" */
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case op_pal1d: /* "hw_mtpr" */
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p.bits = i.bits;
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db_printf("\t%s%s\t%s, %d", opcode,
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p.bits = ctx->insn.bits;
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insn_printf(ctx, "\t%s%s\t%s, %d", opcode,
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mXpr_name[p.mXpr_format.regset],
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register_name(p.mXpr_format.rd),
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register_name(ctx, p.mXpr_format.rd),
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p.mXpr_format.index);
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break;
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case op_pal1b: /* "hw_ld" */
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case op_pal1f: /* "hw_st" */
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p.bits = i.bits;
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db_printf("\t%s%c%s\t%s,", opcode,
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p.bits = ctx->insn.bits;
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insn_printf(ctx, "\t%s%c%s\t%s,", opcode,
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(p.mem_format.qw) ? 'q' : 'l',
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hwlds_name[p.mem_format.qualif],
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register_name(p.mem_format.rd));
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register_name(ctx, p.mem_format.rd));
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signed_immediate = (long)p.mem_format.displacement;
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goto loadstore_address;
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case op_pal1e: /* "hw_rei" */
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db_printf("\t%s", opcode);
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insn_printf(ctx, "\t%s", opcode);
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break;
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case op_ldf:
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@ -997,28 +1022,31 @@ foperate:
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* Memory operations, including floats
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*/
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loadstore:
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if (fstore)
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db_printf("%s\tf%d,", opcode, i.mem_format.ra);
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else
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db_printf("%s\t%s,", opcode,
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register_name(i.mem_format.ra));
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signed_immediate = (long)i.mem_format.displacement;
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if (fstore) {
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insn_printf(ctx, "%s\tf%d,", opcode,
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ctx->insn.mem_format.ra);
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} else {
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insn_printf(ctx, "%s\t%s,", opcode,
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register_name(ctx, ctx->insn.mem_format.ra));
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}
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signed_immediate = (long)ctx->insn.mem_format.displacement;
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loadstore_address:
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{
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char tbuf[24];
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db_format_hex(tbuf, 24, signed_immediate, false);
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db_printf("%s(%s)", tbuf,
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register_name(i.mem_format.rb));
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insn_printf(ctx, "%s(%s)", tbuf,
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register_name(ctx, ctx->insn.mem_format.rb));
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}
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/*
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* For convenience, do the address computation
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*/
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if (showregs) {
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if (i.mem_format.opcode == op_ldah)
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if (ctx->showregs) {
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if (ctx->insn.mem_format.opcode == op_ldah)
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signed_immediate <<= 16;
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db_printf(" <0x%lx>", signed_immediate +
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db_register_value(DDB_REGS, i.mem_format.rb));
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insn_printf(ctx, " <0x%lx>", signed_immediate +
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db_register_value(DDB_REGS,
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ctx->insn.mem_format.rb));
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}
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break;
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case op_br:
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@ -1040,45 +1068,54 @@ loadstore_address:
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/*
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* We want to know where we are branching to
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*/
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signed_immediate = (long)i.branch_format.displacement;
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db_printf("%s\t%s,", opcode,
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register_name(i.branch_format.ra));
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signed_immediate = (long)ctx->insn.branch_format.displacement;
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insn_printf(ctx, "%s\t%s,", opcode,
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register_name(ctx, ctx->insn.branch_format.ra));
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branch_displacement:
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db_printsym(iadr + sizeof(alpha_instruction) +
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(signed_immediate << 2), DB_STGY_PROC, db_printf);
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if (ctx->buf == NULL) {
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db_printsym(ctx->pc + sizeof(alpha_instruction) +
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(signed_immediate << 2), DB_STGY_PROC, db_printf);
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}
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break;
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default:
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/*
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* Shouldn't happen
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*/
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db_printf("? 0x%x ?", i.bits);
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insn_printf(ctx, "? 0x%x ?", ctx->insn.bits);
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}
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/*
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* Print out the registers used in this instruction
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*/
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if (showregs && regcount > 0) {
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db_printf("\t<");
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for (ireg = 0; ireg < regcount; ireg++) {
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if (ctx->showregs && ctx->regcount > 0) {
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insn_printf(ctx, "\t<");
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for (ireg = 0; ireg < ctx->regcount; ireg++) {
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if (ireg != 0)
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db_printf(",");
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db_printf("%s=0x%lx",
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name_of_register[regnum[ireg]],
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db_register_value(DDB_REGS, regnum[ireg]));
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insn_printf(ctx, ",");
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insn_printf(ctx, "%s=0x%lx",
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name_of_register[ctx->regnum[ireg]],
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db_register_value(DDB_REGS, ctx->regnum[ireg]));
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}
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db_printf(">");
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insn_printf(ctx, ">");
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}
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db_printf("\n");
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/* If printing into a buffer, skip the newline. */
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if (ctx->buf == NULL) {
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insn_printf(ctx, "\n");
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}
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return (sizeof(alpha_instruction));
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}
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db_addr_t
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db_disasm(db_addr_t loc, bool altfmt)
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{
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alpha_instruction inst;
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struct alpha_print_instruction_context ctx = {
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.insn.bits = db_get_value(loc, 4, 0),
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.pc = loc,
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.showregs = altfmt,
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};
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inst.bits = db_get_value(loc, 4, 0);
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loc += alpha_print_instruction(loc, inst, altfmt);
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return (loc);
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loc += alpha_print_instruction(&ctx);
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return loc;
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}
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|
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@ -1,4 +1,4 @@
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/* $NetBSD: db_instruction.h,v 1.10 2020/07/21 13:37:18 thorpej Exp $ */
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/* $NetBSD: db_instruction.h,v 1.11 2021/06/21 02:01:13 thorpej Exp $ */
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/*
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* Copyright (c) 1999 Christopher G. Demetriou. All rights reserved.
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@ -741,5 +741,19 @@ typedef union {
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#define op_cvtgd_su 0x5ad
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#define op_cvtgqg_sv 0x5af
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#ifdef _KERNEL
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struct alpha_print_instruction_context {
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unsigned long pc; /* address of insn */
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alpha_instruction insn; /* instruction bits */
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char *buf; /* output buffer (if not DDB) */
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size_t bufsize; /* size of output buffer */
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size_t cursor; /* current next output location */
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int regcount; /* how many rebgs used in this insn */
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int regnum[3]; /* which regs are used in this insn */
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bool showregs; /* show registers */
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};
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int alpha_print_instruction(struct alpha_print_instruction_context *);
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#endif /* _KERNEL */
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#endif /* _ALPHA_INSTRUCTION_H_ */
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