Perform icache syncs for ARM_MMU_EXTENDED as well. This helps the PT_STEP
code in pr/52119 and probably other things.
This commit is contained in:
skrll
parent
2dfbe8243d
commit
18f3f67857
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@ -1,4 +1,4 @@
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/* $NetBSD: pmap.c,v 1.344 2017/02/25 16:48:03 christos Exp $ */
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/* $NetBSD: pmap.c,v 1.345 2017/04/17 14:52:52 skrll Exp $ */
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/*
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* Copyright 2003 Wasabi Systems, Inc.
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@ -217,7 +217,7 @@
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#include <arm/locore.h>
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__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.344 2017/02/25 16:48:03 christos Exp $");
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__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.345 2017/04/17 14:52:52 skrll Exp $");
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//#define PMAP_DEBUG
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#ifdef PMAP_DEBUG
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@ -424,13 +424,13 @@ static struct evcnt pmap_ev_exec_synced =
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PMAP_EVCNT_INITIALIZER("exec pages synced");
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static struct evcnt pmap_ev_exec_synced_map =
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PMAP_EVCNT_INITIALIZER("exec pages synced (MP)");
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#ifndef ARM_MMU_EXTENDED
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static struct evcnt pmap_ev_exec_synced_unmap =
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PMAP_EVCNT_INITIALIZER("exec pages synced (UM)");
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static struct evcnt pmap_ev_exec_synced_remap =
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PMAP_EVCNT_INITIALIZER("exec pages synced (RM)");
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static struct evcnt pmap_ev_exec_synced_clearbit =
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PMAP_EVCNT_INITIALIZER("exec pages synced (DG)");
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#ifndef ARM_MMU_EXTENDED
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static struct evcnt pmap_ev_exec_synced_kremove =
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PMAP_EVCNT_INITIALIZER("exec pages synced (KU)");
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#endif
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@ -1052,12 +1052,10 @@ pmap_enter_pv(struct vm_page_md *md, paddr_t pa, struct pv_entry *pv, pmap_t pm,
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* for this page, make sure to sync the I-cache.
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*/
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if (PV_IS_EXEC_P(flags)) {
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#ifndef ARM_MMU_EXTENDED
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if (!PV_IS_EXEC_P(md->pvh_attrs)) {
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pmap_syncicache_page(md, pa);
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PMAPCOUNT(exec_synced_map);
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}
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#endif
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PMAPCOUNT(exec_mappings);
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}
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#endif
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@ -1131,26 +1129,19 @@ pmap_remove_pv(struct vm_page_md *md, paddr_t pa, pmap_t pm, vaddr_t va)
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PMAPCOUNT(unmappings);
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#ifdef PMAP_CACHE_VIPT
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if (!(pv->pv_flags & PVF_WRITE))
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break;
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/*
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* If this page has had an exec mapping, then if
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* this was the last mapping, discard the contents,
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* otherwise sync the i-cache for this page.
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*/
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if (PV_IS_EXEC_P(md->pvh_attrs)) {
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#ifdef ARM_MMU_EXTENDED
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md->pvh_attrs &= ~PVF_EXEC;
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PMAPCOUNT(exec_discarded_unmap);
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#else
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if (SLIST_EMPTY(&md->pvh_list)) {
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md->pvh_attrs &= ~PVF_EXEC;
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PMAPCOUNT(exec_discarded_unmap);
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} else {
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} else if (pv->pv_flags & PVF_WRITE) {
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pmap_syncicache_page(md, pa);
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PMAPCOUNT(exec_synced_unmap);
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}
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#endif /* ARM_MMU_EXTENDED */
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}
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#endif /* PMAP_CACHE_VIPT */
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break;
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@ -1262,7 +1253,6 @@ pmap_modify_pv(struct vm_page_md *md, paddr_t pa, pmap_t pm, vaddr_t va,
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md->pvh_attrs |= PVF_WRITE;
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}
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}
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#ifndef ARM_MMU_EXTENDED
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/*
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* We have two cases here: the first is from enter_pv (new exec
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* page), the second is a combined pmap_remove_pv/pmap_enter_pv.
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@ -1275,6 +1265,7 @@ pmap_modify_pv(struct vm_page_md *md, paddr_t pa, pmap_t pm, vaddr_t va,
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pmap_syncicache_page(md, pa);
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PMAPCOUNT(exec_synced_remap);
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}
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#ifndef ARM_MMU_EXTENDED
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KASSERT((md->pvh_attrs & PVF_DMOD) == 0 || (md->pvh_attrs & (PVF_DIRTY|PVF_NC)));
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#endif /* !ARM_MMU_EXTENDED */
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#endif /* PMAP_CACHE_VIPT */
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@ -2324,12 +2315,12 @@ pmap_clearbit(struct vm_page_md *md, paddr_t pa, u_int maskbits)
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struct pv_entry *pv;
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#ifdef PMAP_CACHE_VIPT
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const bool want_syncicache = PV_IS_EXEC_P(md->pvh_attrs);
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bool need_syncicache = false;
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#ifdef ARM_MMU_EXTENDED
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const u_int execbits = (maskbits & PVF_EXEC) ? L2_XS_XN : 0;
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#else
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const u_int execbits = 0;
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bool need_vac_me_harder = false;
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bool need_syncicache = false;
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#endif
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#else
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const u_int execbits = 0;
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@ -2345,12 +2336,9 @@ pmap_clearbit(struct vm_page_md *md, paddr_t pa, u_int maskbits)
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* then we know we definitely need to sync or discard it.
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*/
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if (want_syncicache) {
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#ifdef ARM_MMU_EXTENDED
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if (md->pvh_attrs & PVF_MOD)
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md->pvh_attrs &= ~PVF_EXEC;
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#else
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need_syncicache = md->pvh_attrs & PVF_MOD;
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#endif
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if (md->pvh_attrs & PVF_MOD) {
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need_syncicache = true;
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}
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}
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#endif
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KASSERT(pmap_page_locked_p(md));
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@ -2361,7 +2349,7 @@ pmap_clearbit(struct vm_page_md *md, paddr_t pa, u_int maskbits)
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md->pvh_attrs &= ~(maskbits & (PVF_MOD | PVF_REF));
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if (SLIST_EMPTY(&md->pvh_list)) {
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#if defined(PMAP_CACHE_VIPT) && !defined(ARM_MMU_EXTENDED)
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#if defined(PMAP_CACHE_VIPT)
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if (need_syncicache) {
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/*
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* No one has it mapped, so just discard it. The next
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@ -2472,9 +2460,9 @@ pmap_clearbit(struct vm_page_md *md, paddr_t pa, u_int maskbits)
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PMAP_VALIDATE_MD_PAGE(md);
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}
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}
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#ifndef ARM_MMU_EXTENDED
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if (want_syncicache)
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need_syncicache = true;
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#ifndef ARM_MMU_EXTENDED
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need_vac_me_harder = true;
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#endif
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#endif /* PMAP_CACHE_VIPT */
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@ -2528,7 +2516,7 @@ pmap_clearbit(struct vm_page_md *md, paddr_t pa, u_int maskbits)
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pm, va, opte, npte));
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}
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#if defined(PMAP_CACHE_VIPT) && !defined(ARM_MMU_EXTENDED)
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#if defined(PMAP_CACHE_VIPT)
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/*
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* If we need to sync the I-cache and we haven't done it yet, do it.
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*/
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@ -2538,7 +2526,7 @@ pmap_clearbit(struct vm_page_md *md, paddr_t pa, u_int maskbits)
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pmap_acquire_page_lock(md);
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PMAPCOUNT(exec_synced_clearbit);
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}
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#ifndef ARM_MMU_EXTENDED
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/*
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* If we are changing this to read-only, we need to call vac_me_harder
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* so we can change all the read-only pages to cacheable. We pretend
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@ -2548,7 +2536,8 @@ pmap_clearbit(struct vm_page_md *md, paddr_t pa, u_int maskbits)
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if (md->pvh_attrs & PVF_NC)
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pmap_vac_me_harder(md, pa, NULL, 0);
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}
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#endif /* PMAP_CACHE_VIPT && !ARM_MMU_EXTENDED */
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#endif /* !ARM_MMU_EXTENDED */
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#endif /* PMAP_CACHE_VIPT */
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}
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/*
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@ -4730,9 +4719,12 @@ out:
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void
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pmap_procwr(struct proc *p, vaddr_t va, int len)
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{
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#ifndef ARM_MMU_EXTENDED
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/* We only need to do anything if it is the current process. */
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if (p == curproc)
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cpu_icache_sync_range(va, len);
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#endif
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}
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/*
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