Add driver for On-chip General Purpose I/O.
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shige
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924b155d98
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/* $NetBSD: gpio_opb.c,v 1.1 2005/01/23 19:22:22 shige Exp $ */
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/*
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* Copyright (c) 2004 Shigeyuki Fukushima.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* 3. The name of the author may not be used to endorse or promote
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* products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
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* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
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* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "locators.h"
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/systm.h>
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#include <machine/pio.h>
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#include <powerpc/ibm4xx/dcr405gp.h>
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#include <powerpc/ibm4xx/dev/opbvar.h>
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#include <powerpc/ibm4xx/dev/gpioreg.h>
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#include <powerpc/ibm4xx/dev/gpiovar.h>
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struct gpio_softc {
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struct device sc_dev; /* device generic */
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struct gpio_controller sc_gpio; /* GPIO controller */
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u_long sc_addr; /* GPIO controller address */
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};
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static int gpio_print(void *, const char *);
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static int gpio_search(struct device *, struct cfdata *,
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const locdesc_t *ldesc, void *aux);
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static int gpio_match(struct device *, struct cfdata *, void *);
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static void gpio_attach(struct device *, struct device *, void *);
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static int gpio_or_read(void *, int);
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static int gpio_tcr_read(void *, int);
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static int gpio_odr_read(void *, int);
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static int gpio_ir_read(void *, int);
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static void gpio_or_write(void *arg, int addr, int bit);
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static void gpio_tcr_write(void *arg, int addr, int bit);
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static void gpio_odr_write(void *arg, int addr, int bit);
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static int gpio_read_bit(void *, int, int);
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static void gpio_write_bit(void *, int, int, int);
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static uint32_t gpio_read(void *, int);
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static void gpio_write(void *, int, uint32_t);
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CFATTACH_DECL(gpio, sizeof(struct gpio_softc),
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gpio_match, gpio_attach, NULL, NULL);
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static int
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gpio_print(void *aux, const char *pnp)
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{
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struct gpio_attach_args *gaa = aux;
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aprint_normal(" addr GPIO#%d", gaa->ga_addr);
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return (UNCONF);
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}
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static int
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gpio_search(struct device *parent, struct cfdata *cf,
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const locdesc_t *ldesc, void *aux)
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{
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struct gpio_softc *sc = (void *)parent;
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struct gpio_attach_args gaa;
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gaa.ga_tag = &sc->sc_gpio;
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gaa.ga_addr = cf->cf_loc[GPIOCF_ADDR];
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if (config_match(parent, cf, &gaa) > 0)
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config_attach(parent, cf, &gaa, gpio_print);
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return (0);
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}
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static int
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gpio_match(struct device *parent, struct cfdata *cf, void *args)
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{
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struct opb_attach_args *oaa = args;
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if (strcmp(oaa->opb_name, cf->cf_name) != 0)
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return (0);
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return (1);
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}
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static void
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gpio_attach(struct device *parent, struct device *self, void *aux)
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{
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struct gpio_softc *sc = (struct gpio_softc *)self;
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struct opb_attach_args *oaa = aux;
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aprint_naive(": GPIO controller\n");
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aprint_normal(": On-Chip GPIO controller\n");
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sc->sc_addr = oaa->opb_addr;
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sc->sc_gpio.cookie = sc;
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sc->sc_gpio.io_or_read = gpio_or_read;
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sc->sc_gpio.io_tcr_read = gpio_tcr_read;
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sc->sc_gpio.io_odr_read = gpio_odr_read;
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sc->sc_gpio.io_ir_read = gpio_ir_read;
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sc->sc_gpio.io_or_write = gpio_or_write;
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sc->sc_gpio.io_tcr_write = gpio_tcr_write;
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sc->sc_gpio.io_odr_write = gpio_odr_write;
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(void) config_search_ia(gpio_search, self, "gpio", NULL);
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}
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static int
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gpio_or_read(void *arg, int addr)
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{
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return (gpio_read_bit(arg, GPIO_OR, addr));
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}
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static int
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gpio_tcr_read(void *arg, int addr)
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{
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return (gpio_read_bit(arg, GPIO_TCR, addr));
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}
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static int
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gpio_odr_read(void *arg, int addr)
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{
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return (gpio_read_bit(arg, GPIO_ODR, addr));
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}
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static int
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gpio_ir_read(void *arg, int addr)
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{
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gpio_write_bit(arg, GPIO_ODR, addr, 0);
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gpio_write_bit(arg, GPIO_TCR, addr, 0);
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return (gpio_read_bit(arg, GPIO_ODR, addr));
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}
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static void
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gpio_or_write(void *arg, int addr, int bit)
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{
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gpio_write_bit(arg, GPIO_ODR, addr, 0);
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gpio_write_bit(arg, GPIO_TCR, addr, 1);
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gpio_write_bit(arg, GPIO_OR, addr, bit);
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}
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static void
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gpio_tcr_write(void *arg, int addr, int bit)
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{
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gpio_write_bit(arg, GPIO_TCR, addr, bit);
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}
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static void
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gpio_odr_write(void *arg, int addr, int bit)
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{
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gpio_write_bit(arg, GPIO_ODR, addr, bit);
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}
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static int
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gpio_read_bit(void *arg, int offset, int addr)
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{
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uint32_t rv = gpio_read(arg, offset);
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uint32_t mask = GPIO_SBIT(addr);
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return ((rv & mask) >> GPIO_SHIFT(addr));
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}
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void
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gpio_write_bit(void *arg, int offset, int addr, int bit)
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{
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uint32_t rv = gpio_read(arg, offset);
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uint32_t mask = GPIO_SBIT(addr);
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rv = rv & ~mask;
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rv = rv | ((bit << GPIO_SHIFT(addr)) & mask);
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gpio_write(arg, offset, rv);
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}
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static uint32_t
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gpio_read(void *arg, int offset)
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{
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struct gpio_softc *sc = arg;
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uint32_t rv;
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rv = inl(sc->sc_addr + offset);
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return rv;
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}
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static void
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gpio_write(void *arg, int offset, uint32_t out)
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{
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struct gpio_softc *sc = arg;
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outl((sc->sc_addr + offset), out);
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: gpioreg.h,v 1.1 2002/08/13 04:57:49 simonb Exp $ */
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/* $NetBSD: gpioreg.h,v 1.2 2005/01/23 19:22:22 shige Exp $ */
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/*
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* Copyright 2001 Wasabi Systems, Inc.
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@ -38,9 +38,30 @@
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#ifndef _IBM4XX_GPIOREG_H_
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#define _IBM4XX_GPIOREG_H_
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/* GPIO Registers */
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#define GPIO_OR 0x00 /* Output */
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#define GPIO_TCR 0x04 /* Three-State Control */
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#define GPIO_ODR 0x18 /* Open Drain */
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#define GPIO_IR 0x1c /* Input */
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/*
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* GPIO Registers
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*/
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/*
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* GPIO ODR Control Logic:
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* ODR OR Out TCR TS_Ctrl Module I/O 3-State Driver
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* 0 X X 0 0 Forced to high impedance state
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* 0 0 0 1 1 Drive 0
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* 0 1 1 1 1 Drive 1
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* 1 0 0 X 1 Drive 0
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* 1 1 0 X 0 Forced to high impedance state
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*/
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/* GPIO Registers 0x00-0x7f */
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#define GPIO_NREG (0x80)
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#define GPIO_SHIFT(n) (31 - n)
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#define GPIO_SBIT(n) (1 << GPIO_SHIFT(n))
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/* Offset */
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#define GPIO_OR (0x00) /* Output */
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#define GPIO_TCR (0x04) /* Three-State Control */
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#define GPIO_ODR (0x18) /* Open Drain */
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#define GPIO_IR (0x1c) /* Input */
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#endif /* _IBM4XX_GPIOREG_H_ */
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@ -0,0 +1,63 @@
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/* $NetBSD: gpiovar.h,v 1.1 2005/01/23 19:22:22 shige Exp $ */
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/*
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* Copyright (c) 2003 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Steve C. Woodford and Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _IBM4XX_DEV_GPIOVAR_H_
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#define _IBM4XX_DEV_GPIOVAR_H_
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#include <sys/device.h>
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/*
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* This structure provides the interface of ibm4xx GPIO controller.
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*/
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typedef struct gpio_controller {
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int (*io_or_read)(void *, int);
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int (*io_tcr_read)(void *, int);
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int (*io_odr_read)(void *, int);
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int (*io_ir_read)(void *, int);
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void (*io_or_write)(void *, int, int);
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void (*io_tcr_write)(void *, int, int);
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void (*io_odr_write)(void *, int, int);
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void *cookie;
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} *gpio_tag_t;
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/* Used to attach devices on the GPIO controller */
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struct gpio_attach_args {
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gpio_tag_t ga_tag; /* our controller */
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int ga_addr; /* address of device */
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};
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#endif /* _IBM4XX_DEV_GPIOVAR_H_ */
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