- use options PIC_MPCSOC to replace PIC_OPENPIC.
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nisimura
parent
6d35cad5db
commit
17c789b4ca
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@ -1,4 +1,4 @@
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# $NetBSD: ENCPP1,v 1.5 2008/11/24 11:41:14 ad Exp $
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# $NetBSD: ENCPP1,v 1.6 2009/08/19 06:28:06 nisimura Exp $
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#
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# Ampro EnCorePP1 machine description file
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#
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@ -19,10 +19,11 @@
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# device.
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include "arch/sandpoint/conf/std.sandpoint"
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options PIC_I8259
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options INCLUDE_CONFIG_FILE # embed config file in kernel binary
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#ident "ENCPP1-$Revision: 1.5 $"
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#ident "ENCPP1-$Revision: 1.6 $"
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maxusers 32
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@ -1,4 +1,4 @@
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# $NetBSD: GENERIC,v 1.43 2009/01/24 05:06:07 mrg Exp $
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# $NetBSD: GENERIC,v 1.44 2009/08/19 06:28:06 nisimura Exp $
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#
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# GENERIC machine description file
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#
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@ -19,10 +19,11 @@
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# device.
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include "arch/sandpoint/conf/std.sandpoint"
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options PIC_I8259
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options INCLUDE_CONFIG_FILE # embed config file in kernel binary
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#ident "GENERIC-$Revision: 1.43 $"
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#ident "GENERIC-$Revision: 1.44 $"
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maxusers 32
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@ -238,32 +239,12 @@ com0 at isa? port 0x3f8 irq 4 # standard PC serial ports
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com1 at isa? port 0x2f8 irq 3
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#lpt0 at isa? port 0x278 irq 7 # standard PC parallel ports
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#fdc0 at isa? port 0x3f0 irq 6 drq 2 # standard PC floppy controllers
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#fd* at fdc? drive ? # the drives themselves
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#adw* at pci? dev ? function ? # AdvanSys 9x0UW[D], 3940U[2,3]W SCSI
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#dpt* at pci? dev ? function ? # DPT SmartCache/SmartRAID
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siop* at pci? dev ? function ? # NCR/Symbios 53c8xx SCSI
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#scsibus* at adw?
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#scsibus* at dpt?
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scsibus* at siop?
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scsibus* at umass?
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sd* at scsibus? target ? lun ? # SCSI disk drives
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#st* at scsibus? target ? lun ? # SCSI tape drives
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#cd* at scsibus? target ? lun ? # SCSI CD-ROM drives
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#ch* at scsibus? target ? lun ? # SCSI autochangers
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#ses* at scsibus? target ? lun ? # SCSI Enclosure Services devices
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#ss* at scsibus? target ? lun ? # SCSI scanners
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#uk* at scsibus? target ? lun ? # SCSI unknown
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#atapibus* at atapi?
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#cd* at atapibus? drive ? flags 0x0000 # ATAPI CD-ROM drives
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#sd* at atapibus? drive ? flags 0x0000 # ATAPI disk drives
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#st* at atapibus? drive ? flags 0x0000 # ATAPI tape drives
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#uk* at atapibus? drive ? flags 0x0000 # ATAPI unknown
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# Veriexec
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#
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@ -1,4 +1,4 @@
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# $NetBSD: SANDPOINT,v 1.4 2008/11/24 11:41:14 ad Exp $
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# $NetBSD: SANDPOINT,v 1.5 2009/08/19 06:28:06 nisimura Exp $
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#
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# Sandpoint X3/X2 machine description file
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#
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@ -19,10 +19,11 @@
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# device.
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include "arch/sandpoint/conf/std.sandpoint"
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options PIC_I8259
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options INCLUDE_CONFIG_FILE # embed config file in kernel binary
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#ident "SANDPOINT-$Revision: 1.4 $"
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#ident "SANDPOINT-$Revision: 1.5 $"
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maxusers 32
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@ -1,4 +1,4 @@
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# $NetBSD: std.sandpoint,v 1.13 2007/10/27 15:36:29 nisimura Exp $
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# $NetBSD: std.sandpoint,v 1.14 2009/08/19 06:28:06 nisimura Exp $
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#
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# standard, required NetBSD/sandpoint 'options'
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@ -12,8 +12,7 @@ makeoptions PPCDIR="oea" # Tell Makefile.powerpc what dir to use
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options EXEC_ELF32 # exec ELF binaries
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options EXEC_SCRIPT # exec #! scripts
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options PIC_OPENPIC
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options PIC_I8259
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options PIC_MPCSOC
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options INTSTK=0x2000
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@ -1,4 +1,4 @@
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/* $NetBSD: openpicreg.h,v 1.4 2007/10/17 19:56:56 garbled Exp $ */
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/* $NetBSD: openpicreg.h,v 1.5 2009/08/19 06:28:06 nisimura Exp $ */
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/*
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* Copyright 2001 Wasabi Systems, Inc.
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@ -35,16 +35,4 @@
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* This file provides an interface between OPENPIC code and
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* MPC107/MPC824x EPIC register definition. Consult machdep.c
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* to see EPIC register location.
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*/
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/* XXX XXX XXX */
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extern unsigned epicsteer[];
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#define OPENPIC_SRC_VECTOR(irq) (epicsteer[(irq)])
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#define OPENPIC_IDEST(irq) (epicsteer[(irq)] + 0x10)
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#include <powerpc/openpicreg.h>
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@ -1,4 +1,4 @@
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/* $NetBSD: machdep.c,v 1.47 2009/07/03 10:35:31 nisimura Exp $ */
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/* $NetBSD: machdep.c,v 1.48 2009/08/19 06:28:07 nisimura Exp $ */
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/*
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* Copyright (C) 1995, 1996 Wolfgang Solfrank.
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@ -32,12 +32,13 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.47 2009/07/03 10:35:31 nisimura Exp $");
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__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.48 2009/08/19 06:28:07 nisimura Exp $");
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#include "opt_compat_netbsd.h"
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#include "opt_ddb.h"
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#include "opt_ipkdb.h"
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#include "opt_modular.h"
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#include "opt_interrupt.h"
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#include <sys/param.h>
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#include <sys/buf.h>
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@ -239,16 +240,20 @@ cpu_startup(void)
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*/
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baseaddr = (void *)(SANDPOINT_BUS_SPACE_EUMB + 0x40000);
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pic_init();
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isa_pic = setup_i8259();
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(void)setup_openpic(baseaddr, 0);
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primary_pic = 1;
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#if (NPCIB > 0)
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#ifdef PIC_I8259
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isa_pic = setup_i8259();
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(void)setup_mpcpic(baseaddr);
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primary_pic = 1;
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/*
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* set up i8259 as a cascade on EPIC irq 0.
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* XXX exceptional SP2 has 17
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*/
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intr_establish(16, IST_LEVEL, IPL_NONE, pic_handle_intr, isa_pic);
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#else
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mpcpic_reserv16();
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(void)setup_mpcpic(baseaddr);
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primary_pic = 0;
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#endif
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oea_install_extint(pic_ext_intr);
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@ -489,37 +494,6 @@ mpc107memsize(void)
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return (end + 1); /* recongize this as the amount of SDRAM */
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}
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/* XXX needs to make openpic.c implementation-neutral XXX */
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unsigned epicsteer[] = {
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0x10200, /* external irq 0 direct/serial */
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0x10220, /* external irq 1 direct/serial */
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0x10240, /* external irq 2 direct/serial */
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0x10260, /* external irq 3 direct/serial */
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0x10280, /* external irq 4 direct/serial */
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0x102a0, /* external irq 5 serial mode */
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0x102c0, /* external irq 6 serial mode */
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0x102e0, /* external irq 7 serial mode */
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0x10300, /* external irq 8 serial mode */
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0x10320, /* external irq 9 serial mode */
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0x10340, /* external irq 10 serial mode */
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0x10360, /* external irq 11 serial mode */
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0x10380, /* external irq 12 serial mode */
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0x103a0, /* external irq 13 serial mode */
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0x103c0, /* external irq 14 serial mode */
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0x103e0, /* external irq 15 serial mode */
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0x11020, /* I2C */
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0x11040, /* DMA 0 */
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0x11060, /* DMA 1 */
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0x110c0, /* MU/I2O */
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0x01120, /* Timer 0 */
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0x01160, /* Timer 1 */
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0x011a0, /* Timer 2 */
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0x011e0, /* Timer 3 */
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0x11120, /* DUART 0, MPC8245 */
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0x11140, /* DUART 1, MPC8245 */
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};
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/* XXX XXX debug purpose only XXX XXX */
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static dev_type_cninit(kcomcninit);
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