Small simplification to the splx() code path when dealing with soft
interrupts, and fix a couple of nits in the generic soft interrupt code. Soft interrupts now work.
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@ -1,4 +1,4 @@
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/* $NetBSD: exception.S,v 1.5 2002/08/28 21:05:25 scw Exp $ */
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/* $NetBSD: exception.S,v 1.6 2002/08/31 08:42:00 scw Exp $ */
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/*
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* Copyright 2002 Wasabi Systems, Inc.
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@ -1180,29 +1180,6 @@ Ltlbmiss_dotrap:
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/******************************************************************************
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*
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* void check_softint_loweripl(int newipl)
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*
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* [Note: Do not call directly from C code]
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*
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* Check for pending soft interrupt BEFORE lowering the interrupt priority
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* to "newipl" in r2. Called from splx().
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*/
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Lcheck_softint_loweripl:
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ptabs/l r18, tr0 /* Return address to tr0 */
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pta/l Lcheck_softint_lower, tr1
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LEA(_C_LABEL(ssir), r0) /* Get bitmap of pending soft ints */
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ld.l r0, 0, r1
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beq/l r1, r63, tr0 /* Return if no soft ints pending */
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pta/u 1f, tr0
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blink tr1, r63
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1: ptabs/l r18, tr0 /* Return address to tr0 */
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putcon r2, sr
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blink tr0, r63
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/******************************************************************************
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*
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* void Lcheck_softint(void) [Note: Do not call directly from C code]
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@ -1223,23 +1200,17 @@ Lcheck_softint:
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getcon sr, r2
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Lcheck_softint_lower:
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pta/u 1f, tr1 /* Preload the exit path */
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ori r2, SH5_CONREG_SR_IMASK_ALL, r3
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putcon r3, sr /* Disable interrupts */
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shlri r2, SH5_CONREG_SR_IMASK_SHIFT, r3
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andi r3, SH5_CONREG_SR_IMASK_MASK, r3 /* current spl to r3 */
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ld.l r0, 0, r1 /* Re-fetch ssir */
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movi 1, r4
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shlld r4, r3, r4 /* r4 = 1 << curspl */
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addi r4, -1, r4
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andc r1, r4, r1 /* r1 &= ~((1 << curspl) - 1) */
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beq/l r1, r63, tr0 /* Return if ipl is too high */
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/*
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* Disable interrupts and re-check in case we were pre-emted.
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*/
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pta/u 1f, tr1
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ori r2, SH5_CONREG_SR_IMASK_ALL, r3
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putcon r3, sr
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ld.l r0, 0, r1 /* Re-fetch softint-pending bitmap */
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andc r1, r4, r1 /* r1 &= ~((1 << curspl) - 1) */
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beq/u r1, r63, tr1 /* Exit if we were pre-emted */
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beq/l r1, r63, tr1 /* Return if ipl is too high */
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/*
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* Raise spl to the level of the highest priority pending soft int.
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@ -1264,6 +1235,7 @@ Lcheck_softint_lower:
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and r2, r0, r2
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and r3, r0, r3
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blink tr0, r63
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1: putcon r2, sr
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blink tr0, r63
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@ -1,4 +1,4 @@
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/* $NetBSD: locore_subr.S,v 1.4 2002/08/30 10:45:31 scw Exp $ */
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/* $NetBSD: locore_subr.S,v 1.5 2002/08/31 08:42:00 scw Exp $ */
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/*
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* Copyright 2002 Wasabi Systems, Inc.
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@ -243,14 +243,18 @@ ENTRY_NOPROFILE(_cpu_intr_set)
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* the lowered spl permits them.
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*/
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ENTRY_NOPROFILE(splx)
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ptabs/l r18, tr0
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pta/u Lcheck_softint_lower, tr1
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getcon sr, r4
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LEAF(Lcheck_softint_loweripl, r0)
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ptabs/l r0, tr0
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LEA(_C_LABEL(ssir), r0) /* Get bitmap of pending soft ints */
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movi SH5_CONREG_SR_IMASK_ALL, r3
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shlli r2, SH5_CONREG_SR_IMASK_SHIFT, r2
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andc r4, r3, r4
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and r2, r3, r2
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or r4, r2, r2
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ld.l r0, 0, r1
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bne/u r1, r63, tr1 /* Go deal with them if any pending */
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putcon r2, sr /* Restore interrupt level */
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blink tr0, r63
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@ -1,4 +1,4 @@
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/* $NetBSD: softintr.c,v 1.1 2002/07/05 13:32:06 scw Exp $ */
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/* $NetBSD: softintr.c,v 1.2 2002/08/31 08:42:00 scw Exp $ */
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/*
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* Copyright 2002 Wasabi Systems, Inc.
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@ -128,7 +128,7 @@ softintr_init(void)
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simple_lock_init(&si->si_slock);
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si->si_evcnt = &_sh5_intr_events[i];
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si->si_ipl = soft_intr_prio[i];
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si->si_ipl = soft_intr_prio[i] - 1;
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}
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ssir = 0;
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@ -221,6 +221,7 @@ netintr(void *arg)
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n = netisr;
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netisr = 0;
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splx(s);
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#include <net/netisr_dispatch.h>
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#undef DONETISR
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@ -247,11 +248,11 @@ softintr_dispatch(u_int oldspl, u_int softspl)
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KDASSERT(softspl > oldspl);
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for (i = _IPL_NSOFT - 1, softspl -= 1; i >= 0; i--)
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for (i = _IPL_NSOFT - 1; i >= 0; i--)
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if (softspl == soft_intr_prio[i])
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break;
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KDASSERT(i != _IPL_NSOFT);
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KDASSERT(i >= 0);
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for ( ; i >= 0 && soft_intr_prio[i] > oldspl; i--) {
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si = &soft_intrs[i];
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