Fix recurent typo: shed->sched
This commit is contained in:
parent
e353a6d9b2
commit
171adcf634
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@ -1,4 +1,4 @@
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/* $NetBSD: siop.c,v 1.28 2000/10/06 16:35:13 bouyer Exp $ */
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/* $NetBSD: siop.c,v 1.29 2000/10/06 16:39:04 bouyer Exp $ */
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/*
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* Copyright (c) 2000 Manuel Bouyer.
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@ -122,13 +122,13 @@ siop_table_sync(siop_cmd, ops)
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sizeof(struct siop_xfer), ops);
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}
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static __inline__ void siop_shed_sync __P((struct siop_softc *, int));
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static __inline__ void siop_sched_sync __P((struct siop_softc *, int));
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static __inline__ void
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siop_shed_sync(sc, ops)
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siop_sched_sync(sc, ops)
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struct siop_softc *sc;
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int ops;
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{
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bus_dmamap_sync(sc->sc_dmat, sc->sc_sheddma, 0, 2*NBPG, ops);
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bus_dmamap_sync(sc->sc_dmat, sc->sc_scheddma, 0, 2*NBPG, ops);
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}
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static __inline__ void siop_resel_sync __P((struct siop_softc *, int));
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@ -137,7 +137,7 @@ siop_resel_sync(sc, ops)
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struct siop_softc *sc;
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int ops;
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{
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bus_dmamap_sync(sc->sc_dmat, sc->sc_sheddma, NBPG, NBPG, ops);
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bus_dmamap_sync(sc->sc_dmat, sc->sc_scheddma, NBPG, NBPG, ops);
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}
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void
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@ -192,35 +192,35 @@ siop_attach(sc)
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return;
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}
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error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 2 * NBPG,
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(caddr_t *)&sc->sc_shed, BUS_DMA_NOWAIT|BUS_DMA_COHERENT);
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(caddr_t *)&sc->sc_sched, BUS_DMA_NOWAIT|BUS_DMA_COHERENT);
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if (error) {
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printf("%s: unable to map scheduler DMA memory, error = %d\n",
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sc->sc_dev.dv_xname, error);
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return;
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}
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error = bus_dmamap_create(sc->sc_dmat, 2 * NBPG, 1,
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2 * NBPG, 0, BUS_DMA_NOWAIT, &sc->sc_sheddma);
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2 * NBPG, 0, BUS_DMA_NOWAIT, &sc->sc_scheddma);
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if (error) {
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printf("%s: unable to create scheduler DMA map, error = %d\n",
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sc->sc_dev.dv_xname, error);
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return;
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}
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error = bus_dmamap_load(sc->sc_dmat, sc->sc_sheddma, sc->sc_shed,
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error = bus_dmamap_load(sc->sc_dmat, sc->sc_scheddma, sc->sc_sched,
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2 * NBPG, NULL, BUS_DMA_NOWAIT);
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if (error) {
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printf("%s: unable to load scheduler DMA map, error = %d\n",
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sc->sc_dev.dv_xname, error);
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return;
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}
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sc->sc_resel = &sc->sc_shed[NBPG / sizeof(int32_t)];
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sc->sc_resel = &sc->sc_sched[NBPG / sizeof(int32_t)];
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TAILQ_INIT(&sc->free_list);
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TAILQ_INIT(&sc->cmds);
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/* compute number of scheduler slots */
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sc->sc_nshedslots = (
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sc->sc_nschedslots = (
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NBPG /* memory size allocated for scheduler */
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- sizeof(endslot_script) /* memory needed at end of scheduler */
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) / (sizeof(slot_script) - 8);
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sc->sc_currshedslot = 0;
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sc->sc_currschedslot = 0;
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/* compute number of reselect slots */
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sc->sc_nreselslots = (
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NBPG /* memory size allocated for reselect script */
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@ -230,7 +230,7 @@ siop_attach(sc)
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printf("%s: script size = %d, PHY addr=0x%x, VIRT=%p nslots %d "
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"nresel %d\n",
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sc->sc_dev.dv_xname, (int)sizeof(siop_script),
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(u_int32_t)sc->sc_scriptaddr, sc->sc_script, sc->sc_nshedslots,
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(u_int32_t)sc->sc_scriptaddr, sc->sc_script, sc->sc_nschedslots,
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sc->sc_nreselslots);
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#endif
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@ -295,12 +295,12 @@ siop_reset(sc)
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bus_space_write_region_4(sc->sc_ramt, sc->sc_ramh, 0,
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siop_script, sizeof(siop_script) / sizeof(siop_script[0]));
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for (j = 0; j <
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(sizeof(E_script_abs_shed_Used) /
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sizeof(E_script_abs_shed_Used[0]));
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(sizeof(E_script_abs_sched_Used) /
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sizeof(E_script_abs_sched_Used[0]));
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j++) {
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bus_space_write_4(sc->sc_ramt, sc->sc_ramh,
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E_script_abs_shed_Used[j] * 4,
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sc->sc_sheddma->dm_segs[0].ds_addr);
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E_script_abs_sched_Used[j] * 4,
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sc->sc_scheddma->dm_segs[0].ds_addr);
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}
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for (j = 0; j <
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(sizeof(E_abs_find_dsa_Used) /
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@ -308,7 +308,7 @@ siop_reset(sc)
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j++) {
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bus_space_write_4(sc->sc_ramt, sc->sc_ramh,
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E_abs_find_dsa_Used[j] * 4,
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sc->sc_sheddma->dm_segs[0].ds_addr + NBPG);
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sc->sc_scheddma->dm_segs[0].ds_addr + NBPG);
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}
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} else {
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for (j = 0;
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@ -316,24 +316,24 @@ siop_reset(sc)
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sc->sc_script[j] = htole32(siop_script[j]);
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}
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for (j = 0; j <
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(sizeof(E_script_abs_shed_Used) /
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sizeof(E_script_abs_shed_Used[0]));
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(sizeof(E_script_abs_sched_Used) /
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sizeof(E_script_abs_sched_Used[0]));
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j++) {
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sc->sc_script[E_script_abs_shed_Used[j]] =
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htole32(sc->sc_sheddma->dm_segs[0].ds_addr);
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sc->sc_script[E_script_abs_sched_Used[j]] =
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htole32(sc->sc_scheddma->dm_segs[0].ds_addr);
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}
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for (j = 0; j <
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(sizeof(E_abs_find_dsa_Used) /
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sizeof(E_abs_find_dsa_Used[0]));
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j++) {
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sc->sc_script[E_abs_find_dsa_Used[j]] =
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htole32(sc->sc_sheddma->dm_segs[0].ds_addr + NBPG);
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htole32(sc->sc_scheddma->dm_segs[0].ds_addr + NBPG);
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}
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}
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/* copy and init the scheduler slots script */
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for (i = 0; i < sc->sc_nshedslots; i++) {
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scr = &sc->sc_shed[(Ent_nextslot / 4) * i];
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physaddr = sc->sc_sheddma->dm_segs[0].ds_addr +
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for (i = 0; i < sc->sc_nschedslots; i++) {
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scr = &sc->sc_sched[(Ent_nextslot / 4) * i];
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physaddr = sc->sc_scheddma->dm_segs[0].ds_addr +
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Ent_nextslot * i;
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for (j = 0; j < (sizeof(slot_script) / sizeof(slot_script[0]));
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j++) {
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@ -345,7 +345,7 @@ siop_reset(sc)
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*/
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scr[Ent_slotdata/4 + 1] = scr[Ent_slot/4 + 1];
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scr[E_slot_nextp_Used[0]] = htole32(physaddr + Ent_slot + 4);
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scr[E_slot_shed_addrsrc_Used[0]] = htole32(physaddr +
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scr[E_slot_sched_addrsrc_Used[0]] = htole32(physaddr +
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Ent_slotdata + 4);
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/* JUMP selected, in main script */
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scr[E_slot_abs_selected_Used[0]] =
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@ -355,7 +355,7 @@ siop_reset(sc)
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htole32(sc->sc_scriptaddr + Ent_reselect);
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}
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/* Now the final JUMP */
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scr = &sc->sc_shed[(Ent_nextslot / 4) * sc->sc_nshedslots];
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scr = &sc->sc_sched[(Ent_nextslot / 4) * sc->sc_nschedslots];
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for (j = 0; j < (sizeof(endslot_script) / sizeof(endslot_script[0]));
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j++) {
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scr[j] = htole32(endslot_script[j]);
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@ -387,7 +387,7 @@ siop_reset(sc)
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bus_dmamap_sync(sc->sc_dmat, sc->sc_scriptdma, 0, NBPG,
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BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
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}
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siop_shed_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
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siop_sched_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
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bus_space_write_4(sc->sc_rt, sc->sc_rh, SIOP_DSP,
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sc->sc_scriptaddr + Ent_reselect);
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}
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@ -947,12 +947,12 @@ scintr:
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BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
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}
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bus_space_write_4(sc->sc_rt, sc->sc_rh, SIOP_DSP,
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sc->sc_sheddma->dm_segs[0].ds_addr);
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sc->sc_scheddma->dm_segs[0].ds_addr);
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return 1;
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case A_int_resfail:
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printf("reselect failed\n");
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bus_space_write_4(sc->sc_rt, sc->sc_rh, SIOP_DSP,
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sc->sc_sheddma->dm_segs[0].ds_addr);
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sc->sc_scheddma->dm_segs[0].ds_addr);
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return 1;
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case A_int_done:
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if (xs == NULL) {
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@ -961,7 +961,7 @@ scintr:
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siop_cmd->status = CMDST_FREE;
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bus_space_write_4(sc->sc_rt, sc->sc_rh,
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SIOP_DSP,
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sc->sc_sheddma->dm_segs[0].ds_addr);
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sc->sc_scheddma->dm_segs[0].ds_addr);
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siop_start(sc);
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return 1;
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}
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@ -1021,7 +1021,7 @@ check_sense:
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return 1;
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end:
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bus_space_write_4(sc->sc_rt, sc->sc_rh, SIOP_DSP,
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sc->sc_sheddma->dm_segs[0].ds_addr);
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sc->sc_scheddma->dm_segs[0].ds_addr);
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lun = siop_cmd->xs->sc_link->scsipi_scsi.lun;
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siop_scsicmd_end(siop_cmd);
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if (siop_cmd->status == CMDST_FREE) {
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@ -1340,7 +1340,7 @@ siop_start(sc)
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/*
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* first make sure to read valid data
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*/
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siop_shed_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
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siop_sched_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
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/*
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* The queue management here is a bit tricky: the script always looks
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@ -1353,15 +1353,15 @@ siop_start(sc)
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* but using only 53c720 features this can be "interesting".
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* A mid-way solution could be to implement 2 queues and swap orders.
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*/
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slot = sc->sc_currshedslot;
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scr = &sc->sc_shed[(Ent_nextslot / 4) * slot];
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slot = sc->sc_currschedslot;
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scr = &sc->sc_sched[(Ent_nextslot / 4) * slot];
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/*
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* if relative addr of first jump is not 0 the slot is free. As this is
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* the last used slot, all previous slots are free, we can restart
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* from 0.
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*/
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if (scr[Ent_slot / 4 + 1] != 0) {
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slot = sc->sc_currshedslot = 0;
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slot = sc->sc_currschedslot = 0;
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} else {
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slot++;
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}
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@ -1395,8 +1395,8 @@ siop_start(sc)
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goto end; /* no free slot */
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}
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/* find a free scheduler slot and load it */
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for (; slot < sc->sc_nshedslots; slot++) {
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scr = &sc->sc_shed[(Ent_nextslot / 4) * slot];
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for (; slot < sc->sc_nschedslots; slot++) {
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scr = &sc->sc_sched[(Ent_nextslot / 4) * slot];
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/*
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* if relative addr of first jump is 0 the
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* slot isn't free
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@ -1480,10 +1480,10 @@ siop_start(sc)
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break;
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}
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/* no more free slot, no need to continue */
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if (slot == sc->sc_nshedslots) {
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if (slot == sc->sc_nschedslots) {
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goto end;
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}
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sc->sc_currshedslot = slot;
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sc->sc_currschedslot = slot;
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}
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}
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end:
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@ -1491,7 +1491,7 @@ end:
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if (newcmd == 0)
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return;
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/* make sure SCRIPT processor will read valid data */
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siop_shed_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
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siop_sched_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
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/* Signal script it has some work to do */
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bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, ISTAT_SIGP);
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/* and wait for IRQ */
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@ -1532,7 +1532,7 @@ siop_dump_script(sc)
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struct siop_softc *sc;
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{
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int i;
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siop_shed_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
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siop_sched_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
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for (i = 0; i < NBPG / 4; i += 2) {
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printf("0x%04x: 0x%08x 0x%08x", i * 4,
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le32toh(sc->sc_script[i]), le32toh(sc->sc_script[i+1]));
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@ -1,4 +1,4 @@
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/* $NetBSD: siop_common.c,v 1.7 2000/10/06 16:35:13 bouyer Exp $ */
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/* $NetBSD: siop_common.c,v 1.8 2000/10/06 16:39:04 bouyer Exp $ */
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/*
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* Copyright (c) 2000 Manuel Bouyer.
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@ -208,7 +208,7 @@ siop_wdtr_neg(siop_cmd)
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(sc->targets[target]->id >> 24) & 0xff);
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/*
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* we did reset wide parameters, so fall back to async,
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* but don't shedule a sync neg, target should initiate it
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* but don't schedule a sync neg, target should initiate it
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*/
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siop_target->status = TARST_OK;
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siop_cmd->siop_table->msg_out[0] = MSG_EXTENDED;
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@ -1,4 +1,4 @@
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/* $NetBSD: siopvar.h,v 1.9 2000/10/06 16:35:13 bouyer Exp $ */
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/* $NetBSD: siopvar.h,v 1.10 2000/10/06 16:39:04 bouyer Exp $ */
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/*
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* Copyright (c) 2000 Manuel Bouyer.
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@ -55,12 +55,12 @@ struct siop_softc {
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bus_dma_tag_t sc_dmat; /* bus DMA tag */
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void (*sc_reset) __P((struct siop_softc*)); /* reset callback */
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bus_dmamap_t sc_scriptdma; /* DMA map for script */
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bus_dmamap_t sc_sheddma; /* DMA map for sched and resel script */
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bus_dmamap_t sc_scheddma; /* DMA map for sched and resel script */
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u_int32_t *sc_script; /* script location in memory */
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u_int32_t *sc_shed; /* script scheduler location in mem */
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u_int32_t *sc_sched; /* script scheduler location in mem */
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u_int32_t *sc_resel; /* reselect script location in mem */
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int sc_nshedslots; /* number of scheduler slots */
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int sc_currshedslot; /* current scheduler slot */
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int sc_nschedslots; /* number of scheduler slots */
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int sc_currschedslot; /* current scheduler slot */
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int sc_nreselslots; /* number of reselect slots */
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struct cbd_list cmds; /* list of command block descriptors */
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struct cmd_list free_list; /* cmd descr free list */
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@ -1,4 +1,4 @@
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; $NetBSD: siop.ss,v 1.8 2000/10/06 16:31:17 bouyer Exp $
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; $NetBSD: siop.ss,v 1.9 2000/10/06 16:39:04 bouyer Exp $
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;
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; Copyright (c) 2000 Manuel Bouyer.
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@ -79,9 +79,9 @@ ENTRY slotdata;
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ENTRY nextslot;
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ENTRY endslot;
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EXTERN script_abs_shed;
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EXTERN script_abs_sched;
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EXTERN slot_nextp;
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EXTERN slot_shed_addrsrc;
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EXTERN slot_sched_addrsrc;
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EXTERN slot_abs_reselect;
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EXTERN slot_abs_selected;
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@ -128,7 +128,7 @@ reselect_fail:
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; check that host asserted SIGP, this'll clear SIGP in ISTAT
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MOVE CTEST2 & 0x40 TO SFBR;
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INT int_resfail, IF 0x00;
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JUMP script_abs_shed;
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JUMP script_abs_sched;
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msgin:
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CLEAR ATN
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@ -219,9 +219,9 @@ handle_dis:
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CALL REL(disconnect);
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; if we didn't get sdp, or if offset is 0, no need to interrupt
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MOVE SCRATCHA0 & flag_sdp TO SFBR;
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JUMP script_abs_shed, if 0x00;
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JUMP script_abs_sched, if 0x00;
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MOVE SCRATCHA1 TO SFBR;
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JUMP script_abs_shed, if 0x00;
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JUMP script_abs_sched, if 0x00;
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; Ok, we need to save data pointers
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INT int_disc;
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@ -265,7 +265,7 @@ idsa2:
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idsa3:
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MOVE 0x03 to dsa3;
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SELECT ATN FROM t_id, slot_abs_reselect;
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MOVE MEMORY 4, slot_shed_addrsrc, slot_nextp;
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MOVE MEMORY 4, slot_sched_addrsrc, slot_nextp;
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JUMP slot_abs_selected;
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slotdata:
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NOP; slot variables: dsa & jumppatchp
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