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Take a stab at making this more reliable.

This commit is contained in:
briggs 1997-04-15 03:22:50 +00:00
parent 76ea50410b
commit 16865d719a
1 changed files with 22 additions and 16 deletions
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36
sys/arch/mac68k/dev/mac68k5380.c
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@ -1,4 +1,4 @@
/* $NetBSD: mac68k5380.c,v 1.29 1997/02/28 15:50:50 scottr Exp $ */
/* $NetBSD: mac68k5380.c,v 1.30 1997/04/15 03:22:50 briggs Exp $ */
/*
* Copyright (c) 1995 Allen Briggs
@ -430,13 +430,13 @@ extern int *nofault, mac68k_buserr_addr;
long_data = (u_int32_t *) pending_5380_data;
#define R4 *long_data++ = *long_drq++
while ( count >= 64 ) {
while ( count > 64 ) {
R4; R4; R4; R4; R4; R4; R4; R4;
R4; R4; R4; R4; R4; R4; R4; R4; /* 64 */
count -= 64;
}
while (count >= 4) {
R4; count -= 4;
while (count > 8) {
R4; R4; count -= 8;
}
#undef R4
data = (u_int8_t *) long_data;
@ -449,6 +449,12 @@ extern int *nofault, mac68k_buserr_addr;
pending_5380_count -= dcount;
pending_5380_data += dcount;
}
/*
* OK. No bus error occurred above. Clear the nofault flag
* so we no longer short-circuit bus errors.
*/
nofault = (int *) 0;
} else {
int resid;
@ -480,13 +486,14 @@ extern int *nofault, mac68k_buserr_addr;
long_data = (u_int32_t *) pending_5380_data;
#define W4 *long_drq++ = *long_data++
while ( count >= 64 ) {
while ( count > 64 ) {
W4; W4; W4; W4; W4; W4; W4; W4;
W4; W4; W4; W4; W4; W4; W4; W4; /* 64 */
count -= 64;
}
while (count >= 4) {
W4; count -= 4;
while ( count > 8 ) {
W4; W4;
count -= 8;
}
#undef W4
data = (u_int8_t *) long_data;
@ -499,22 +506,21 @@ extern int *nofault, mac68k_buserr_addr;
pending_5380_count -= dcount;
pending_5380_data += dcount;
}
PID("write complete");
drq = (volatile u_int8_t *) ncr_5380_with_drq;
tmp_data = *drq;
PID("read a byte?");
nofault = (int *) 0;
}
/*
* OK. No bus error occurred above. Clear the nofault flag
* so we no longer short-circuit bus errors.
*/
nofault = (int *) 0;
drq = (volatile u_int8_t *) ncr_5380_with_drq;
tmp_data = *drq;
PID("read a byte to force a phase change");
}
PID("end drq");
return;
#else