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Fix merge mistake so that we can compile.

This commit is contained in:
skrll 2003-09-26 19:38:38 +00:00
parent 0229f57aee
commit 15b3a0696e
1 changed files with 4 additions and 76 deletions
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80
gnu/dist/gdb/gdb/arm-tdep.c vendored
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@ -225,57 +225,12 @@ arm_pc_is_thumb_dummy (CORE_ADDR memaddr)
static CORE_ADDR
arm_addr_bits_remove (CORE_ADDR val)
{
if (!arm_apcs_32)
return (val & 0x03fffffc);
else if (arm_pc_is_thumb (val))
return (val & 0xfffffffe);
if (arm_pc_is_thumb (val))
return (val & (arm_apcs_32 ? 0xfffffffe : 0x03fffffe));
else
return (val & 0xfffffffc);
return (val & (arm_apcs_32 ? 0xfffffffc : 0x03fffffc));
}
#ifdef ARM_26BIT_R15
#define R15_PC 0x03fffffc
#define R15_PSR_DIRECT 0xf0000003 /* Bits in the same places in R15 & PSR */
#define R15_IF 0x0c000000 /* Bits which must be shifted... */
#define PSR_IF 0x000000c0
#define IF_SHIFT 20 /* ... by this much */
/* Functions to unpack and pack R15 on 26-bit ARMs. Within GDB, R15
is always stored with the program counter in PC_REGNUM, and the
flags in PS_REGNUM. PS_REGNUM has the I and F flags in their
32-bit positions. Targets can use these functions to convert
between this format and the format used on 26-bit processors, where
the PC and PSR are packed into R15. */
void
arm_supply_26bit_r15 (char *val)
{
ULONGEST r15, pc, psr;
char rawpc[4], rawpsr[4];
r15 = extract_unsigned_integer (val, 4);
pc = r15 & R15_PC;
store_unsigned_integer (rawpc, 4, pc);
supply_register (PC_REGNUM, rawpc);
psr = (r15 & R15_PSR_DIRECT) | ((r15 & R15_IF) >> IF_SHIFT);
store_unsigned_integer (rawpsr, 4, psr);
supply_register (PS_REGNUM, rawpsr);
}
void
arm_read_26bit_r15 (char *myaddr)
{
ULONGEST r15, pc, psr;
pc = read_register (PC_REGNUM);
psr = read_register (PS_REGNUM);
r15 = pc | (psr & R15_PSR_DIRECT) | ((psr & PSR_IF) << IF_SHIFT);
store_unsigned_integer (myaddr, r15, 4);
}
#endif
/* When reading symbols, we need to zap the low bit of the address,
which may be set to 1 for Thumb functions. */
static CORE_ADDR
@ -1273,7 +1228,7 @@ arm_frame_saved_pc (struct frame_info *fi)
else
{
CORE_ADDR pc = arm_find_callers_reg (fi, ARM_LR_REGNUM);
return arm_addr_bits_remove(pc);
return IS_THUMB_ADDR (pc) ? UNMAKE_THUMB_ADDR (pc) : pc;
}
}
@ -1800,7 +1755,6 @@ condition_true (unsigned long cond, unsigned long status_reg)
return 1;
}
#if SOFTWARE_SINGLE_STEP_P
/* Support routines for single stepping. Calculate the next PC value. */
#define submask(x) ((1L << ((x) + 1)) - 1)
#define bit(obj,st) (((obj) >> (st)) & 1)
@ -1861,32 +1815,6 @@ shifted_reg_val (unsigned long inst, int carry, unsigned long pc_val,
return res & 0xffffffff;
}
/* single_step() is called just before we want to resume the inferior,
if we want to single-step it but there is no hardware or kernel
single-step support. We find the target of the coming instruction
and breakpoint it.
single_step is also called just after the inferior stops. If we had
set up a simulated single-step, we undo our damage. */
void
arm_software_single_step (ignore, insert_bpt)
int ignore; /* Signal, not needed */
int insert_bpt;
{
static int next_pc; /* State between setting and unsetting. */
static char break_mem[BREAKPOINT_MAX]; /* Temporary storage for mem@bpt */
if (insert_bpt)
{
next_pc = arm_get_next_pc (read_register (PC_REGNUM));
target_insert_breakpoint (next_pc, break_mem);
}
else
target_remove_breakpoint (next_pc, break_mem);
}
#endif /* SOFTWARE_SINGLE_STEP_P */
/* Return number of 1-bits in VAL. */
static int