Use common mips generic software interrupt routines.

This commit is contained in:
tsutsui 2003-09-12 17:55:40 +00:00
parent 0e1a71bba5
commit 14b42ecf3b
12 changed files with 104 additions and 126 deletions

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@ -1,4 +1,4 @@
/* $NetBSD: autoconf.c,v 1.10 2003/07/15 01:29:21 lukem Exp $ */
/* $NetBSD: autoconf.c,v 1.11 2003/09/12 17:55:44 tsutsui Exp $ */
/*
* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.10 2003/07/15 01:29:21 lukem Exp $");
__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.11 2003/09/12 17:55:44 tsutsui Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -49,6 +49,9 @@ int cpuspeed = 100; /* Until we know more precisely. */
void
cpu_configure()
{
softintr_init();
(void)splhigh();
if (config_rootfound("mainbus", "mainbus") == NULL)

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@ -1,4 +1,4 @@
/* $NetBSD: locore_machdep.S,v 1.3 2000/03/31 14:51:49 soren Exp $ */
/* $NetBSD: locore_machdep.S,v 1.4 2003/09/12 17:55:44 tsutsui Exp $ */
/*
* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
@ -37,12 +37,7 @@
.globl _C_LABEL(eintrnames)
_C_LABEL(intrnames):
.asciiz "softclock"
.asciiz "softnet"
_C_LABEL(eintrnames):
.align 2
_C_LABEL(intrcnt):
.word 0,0
_C_LABEL(eintrcnt):
.word 0

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@ -1,4 +1,4 @@
/* $NetBSD: machdep.c,v 1.46 2003/09/12 15:29:48 tsutsui Exp $ */
/* $NetBSD: machdep.c,v 1.47 2003/09/12 17:55:45 tsutsui Exp $ */
/*
* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.46 2003/09/12 15:29:48 tsutsui Exp $");
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.47 2003/09/12 17:55:45 tsutsui Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@ -61,7 +61,6 @@ __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.46 2003/09/12 15:29:48 tsutsui Exp $")
#include <machine/pte.h>
#include <machine/autoconf.h>
#include <machine/intr.h>
#include <machine/intr_machdep.h>
#include <mips/locore.h>
#include <machine/nvram.h>
@ -422,7 +421,14 @@ delay(n)
#define NINTR 6
static struct cobalt_intr intrtab[NINTR];
static struct cobalt_intrhand intrtab[NINTR];
const u_int32_t mips_ipl_si_to_sr[_IPL_NSOFT] = {
MIPS_SOFT_INT_MASK_0, /* IPL_SOFT */
MIPS_SOFT_INT_MASK_0, /* IPL_SOFTCLOCK */
MIPS_SOFT_INT_MASK_1, /* IPL_SOFTNET */
MIPS_SOFT_INT_MASK_1, /* IPL_SOFTSERIAL */
};
void *
cpu_intr_establish(level, ipl, func, arg)
@ -434,12 +440,12 @@ cpu_intr_establish(level, ipl, func, arg)
if (level < 0 || level >= NINTR)
panic("invalid interrupt level");
if (intrtab[level].func != NULL)
if (intrtab[level].ih_func != NULL)
panic("cannot share CPU interrupts");
intrtab[level].cookie_type = COBALT_COOKIE_TYPE_CPU;
intrtab[level].func = func;
intrtab[level].arg = arg;
intrtab[level].ih_func = func;
intrtab[level].ih_arg = arg;
return &intrtab[level];
}
@ -448,11 +454,11 @@ void
cpu_intr_disestablish(cookie)
void *cookie;
{
struct cobalt_intr *p = cookie;
struct cobalt_intrhand *ih = cookie;
if (p->cookie_type == COBALT_COOKIE_TYPE_CPU) {
p->func = NULL;
p->arg = NULL;
if (ih->cookie_type == COBALT_COOKIE_TYPE_CPU) {
ih->ih_func = NULL;
ih->ih_arg = NULL;
}
}
@ -486,8 +492,8 @@ cpu_intr(status, cause, pc, ipending)
for (i = 0; i < 5; i++) {
if (ipending & (MIPS_INT_MASK_0 << i))
if (intrtab[i].func != NULL)
if ((*intrtab[i].func)(intrtab[i].arg))
if (intrtab[i].ih_func != NULL)
if ((*intrtab[i].ih_func)(intrtab[i].ih_arg))
cause &= ~(MIPS_INT_MASK_0 << i);
}
@ -506,20 +512,14 @@ cpu_intr(status, cause, pc, ipending)
_splset((status & ~cause & MIPS_HARD_INT_MASK) | MIPS_SR_INT_IE);
/* 'softnet' interrupt */
if (ipending & MIPS_SOFT_INT_MASK_1) {
clearsoftnet();
uvmexp.softs++;
netintr();
}
/* software interrupt */
ipending &= (MIPS_SOFT_INT_MASK_1|MIPS_SOFT_INT_MASK_0);
if (ipending == 0)
return;
/* 'softclock' interrupt */
if (ipending & MIPS_SOFT_INT_MASK_0) {
clearsoftclock();
uvmexp.softs++;
intrcnt[SOFTCLOCK_INTR]++;
softclock(NULL);
}
_clrsoftintr(ipending);
softintr_dispatch(ipending);
}

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@ -1,4 +1,4 @@
# $NetBSD: files.cobalt,v 1.16 2003/07/27 01:19:25 thorpej Exp $
# $NetBSD: files.cobalt,v 1.17 2003/09/12 17:55:47 tsutsui Exp $
maxpartitions 16
@ -30,6 +30,8 @@ file arch/cobalt/cobalt/console.c
file arch/cobalt/cobalt/disksubr.c
file arch/cobalt/cobalt/machdep.c
file arch/mips/mips/softintr.c
file dev/md_root.c memory_disk_hooks
file dev/cons.c

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@ -1,4 +1,4 @@
# $NetBSD: std.cobalt,v 1.7 2003/08/30 22:44:39 chs Exp $
# $NetBSD: std.cobalt,v 1.8 2003/09/12 17:55:48 tsutsui Exp $
machine cobalt mips
makeoptions MACHINE_ARCH="mipsel"
@ -10,6 +10,4 @@ options MIPS3_L2CACHE_ABSENT
options EXEC_ELF32 # exec ELF32 binaries
options EXEC_SCRIPT # exec #! scripts
options __NO_SOFT_SERIAL_INTERRUPT
makeoptions DEFTEXTADDR="0x80001000"

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@ -1,4 +1,4 @@
/* $NetBSD: com_mainbus.c,v 1.6 2003/07/15 01:29:23 lukem Exp $ */
/* $NetBSD: com_mainbus.c,v 1.7 2003/09/12 17:55:50 tsutsui Exp $ */
/*
* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: com_mainbus.c,v 1.6 2003/07/15 01:29:23 lukem Exp $");
__KERNEL_RCSID(0, "$NetBSD: com_mainbus.c,v 1.7 2003/09/12 17:55:50 tsutsui Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -45,7 +45,6 @@ __KERNEL_RCSID(0, "$NetBSD: com_mainbus.c,v 1.6 2003/07/15 01:29:23 lukem Exp $"
#include <machine/autoconf.h>
#include <machine/intr.h>
#include <machine/intr_machdep.h>
#include <machine/bus.h>
#include <dev/ic/comreg.h>

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@ -1,4 +1,4 @@
/* $NetBSD: intr.h,v 1.14 2003/09/12 15:03:24 tsutsui Exp $ */
/* $NetBSD: intr.h,v 1.15 2003/09/12 17:55:42 tsutsui Exp $ */
/*
* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
@ -32,6 +32,7 @@
#define IPL_BIO 1 /* Disable block I/O interrupts. */
#define IPL_NET 2 /* Disable network interrupts. */
#define IPL_TTY 3 /* Disable terminal interrupts. */
#define IPL_SERIAL 3 /* Disable serial hardware interrupts. */
#define IPL_VM 4 /* Memory allocation */
#define IPL_CLOCK 5 /* Disable clock interrupts. */
#define IPL_STATCLOCK 6 /* Disable profiling interrupts. */
@ -44,12 +45,19 @@
#define IST_EDGE 2 /* edge-triggered */
#define IST_LEVEL 3 /* level-triggered */
/* Soft interrupt masks. */
#define SIR_CLOCK 31
#define SIR_NET 30
#define SIR_CLOCKMASK ((1 << SIR_CLOCK))
#define SIR_NETMASK ((1 << SIR_NET) | SIR_CLOCKMASK)
#define SIR_ALLMASK (SIR_CLOCKMASK | SIR_NETMASK)
/* Soft interrupt numbers. */
#define IPL_SOFT 0 /* generic software interrupts */
#define IPL_SOFTSERIAL 1 /* serial software interrupts */
#define IPL_SOFTNET 2 /* network software interrupts */
#define IPL_SOFTCLOCK 3 /* clock software interrupts */
#define _IPL_NSOFT 4
#define IPL_SOFTNAMES { \
"misc", \
"serial", \
"net", \
"clock", \
}
#ifdef _KERNEL
#ifndef _LOCORE
@ -64,35 +72,48 @@ extern void _splnone(void);
extern void _setsoftintr(int);
extern void _clrsoftintr(int);
#define setsoftclock() _setsoftintr(MIPS_SOFT_INT_MASK_0)
#define setsoftnet() _setsoftintr(MIPS_SOFT_INT_MASK_1)
#define clearsoftclock() _clrsoftintr(MIPS_SOFT_INT_MASK_0)
#define clearsoftnet() _clrsoftintr(MIPS_SOFT_INT_MASK_1)
#define splhigh() _splraise(MIPS_INT_MASK)
#define spl0() (void)_spllower(0)
#define splx(s) (void)_splset(s)
#define SPLSOFT MIPS_SOFT_INT_MASK_0 | MIPS_SOFT_INT_MASK_1
#define SPLBIO SPLSOFT | MIPS_INT_MASK_4
#define SPLNET SPLBIO | MIPS_INT_MASK_1 | MIPS_INT_MASK_2
#define SPLTTY SPLNET | MIPS_INT_MASK_3
#define SPLCLOCK SPLTTY | MIPS_INT_MASK_0 | MIPS_INT_MASK_5
#define splbio() _splraise(SPLBIO)
#define splnet() _splraise(SPLNET)
#define spltty() _splraise(SPLTTY)
#define splclock() _splraise(SPLCLOCK)
#define SPLSOFT (MIPS_SOFT_INT_MASK_0 | MIPS_SOFT_INT_MASK_1)
#define SPLBIO (SPLSOFT | MIPS_INT_MASK_4)
#define SPLNET (SPLBIO | MIPS_INT_MASK_1 | MIPS_INT_MASK_2)
#define SPLTTY (SPLNET | MIPS_INT_MASK_3)
#define SPLCLOCK (SPLTTY | MIPS_INT_MASK_0 | MIPS_INT_MASK_5)
#define splbio() _splraise(SPLBIO)
#define splnet() _splraise(SPLNET)
#define spltty() _splraise(SPLTTY)
#define splserial() _splraise(SPLTTY)
#define splclock() _splraise(SPLCLOCK)
#define splvm() splclock()
#define splstatclock() splclock()
#define splsoftclock() _splraise(MIPS_SOFT_INT_MASK_0)
#define splsoftnet() _splraise(MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
#define splstatclock() splclock()
#define spllowersoftclock() _spllower(MIPS_SOFT_INT_MASK_0)
#define splsched() splhigh()
#define spllock() splhigh()
#define splsoft() _splraise(MIPS_SOFT_INT_MASK_0)
#define splsoftclock() _splraise(MIPS_SOFT_INT_MASK_0)
#define splsoftnet() _splraise(MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
#define splsoftserial() _splraise(MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
extern unsigned int intrcnt[];
#define SOFTCLOCK_INTR 0
#define SOFTNET_INTR 1
struct cobalt_intrhand {
LIST_ENTRY(cobalt_intrhand) ih_q;
int (*ih_func)(void *);
void *ih_arg;
int cookie_type;
#define COBALT_COOKIE_TYPE_CPU 0x1
#define COBALT_COOKIE_TYPE_ICU 0x2
};
#include <mips/softintr.h>
void *cpu_intr_establish(int, int, int (*)(void *), void *);
void *icu_intr_establish(int, int, int, int (*)(void *), void *);
void cpu_intr_disestablish(void *);
void icu_intr_disestablish(void *);
#endif /* !_LOCORE */
#endif /* _LOCORE */

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@ -1,39 +0,0 @@
/* $NetBSD: intr_machdep.h,v 1.1 2002/01/13 23:02:34 augustss Exp $ */
/*
* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions, and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
struct cobalt_intr {
int cookie_type;
#define COBALT_COOKIE_TYPE_CPU 0x1
#define COBALT_COOKIE_TYPE_ICU 0x2
int (*func)(void *);
void *arg;
};
extern void * cpu_intr_establish(int, int, int (*)(void *), void *);
extern void * icu_intr_establish(int, int, int, int (*)(void *), void *);
extern void cpu_intr_disestablish(void *);
extern void icu_intr_disestablish(void *);

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@ -1,5 +1,6 @@
/* $NetBSD: types.h,v 1.3 2002/02/28 03:17:26 simonb Exp $ */
/* $NetBSD: types.h,v 1.4 2003/09/12 17:55:42 tsutsui Exp $ */
#include <mips/types.h>
#define __HAVE_DEVICE_REGISTER
#define __HAVE_GENERIC_SOFT_INTERRUPTS

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@ -1,4 +1,4 @@
/* $NetBSD: pci_machdep.c,v 1.14 2003/09/12 14:59:15 tsutsui Exp $ */
/* $NetBSD: pci_machdep.c,v 1.15 2003/09/12 17:55:52 tsutsui Exp $ */
/*
* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.14 2003/09/12 14:59:15 tsutsui Exp $");
__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.15 2003/09/12 17:55:52 tsutsui Exp $");
#include <sys/types.h>
#include <sys/param.h>
@ -38,7 +38,6 @@ __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.14 2003/09/12 14:59:15 tsutsui Exp
#define _COBALT_BUS_DMA_PRIVATE
#include <machine/bus.h>
#include <machine/intr.h>
#include <machine/intr_machdep.h>
#include <dev/pci/pcivar.h>
#include <dev/pci/pcireg.h>

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@ -1,4 +1,4 @@
/* $NetBSD: pcib.c,v 1.8 2003/09/12 14:59:15 tsutsui Exp $ */
/* $NetBSD: pcib.c,v 1.9 2003/09/12 17:55:53 tsutsui Exp $ */
/*
* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: pcib.c,v 1.8 2003/09/12 14:59:15 tsutsui Exp $");
__KERNEL_RCSID(0, "$NetBSD: pcib.c,v 1.9 2003/09/12 17:55:53 tsutsui Exp $");
#include <sys/types.h>
#include <sys/param.h>
@ -38,7 +38,6 @@ __KERNEL_RCSID(0, "$NetBSD: pcib.c,v 1.8 2003/09/12 14:59:15 tsutsui Exp $");
#include <machine/bus.h>
#include <machine/autoconf.h>
#include <machine/intr.h>
#include <machine/intr_machdep.h>
#include <dev/pci/pcivar.h>
#include <dev/pci/pcireg.h>
@ -53,7 +52,7 @@ static int icu_intr(void *);
CFATTACH_DECL(pcib, sizeof(struct device),
pcib_match, pcib_attach, NULL, NULL);
static struct cobalt_intr icu[IO_ICUSIZE];
static struct cobalt_intrhand icu[IO_ICUSIZE];
static int
pcib_match(parent, match, aux)
@ -107,10 +106,10 @@ icu_intr_establish(irq, type, level, func, arg)
int i;
for (i = 0; i < IO_ICUSIZE; i++) {
if (icu[i].func == NULL) {
if (icu[i].ih_func == NULL) {
icu[i].cookie_type = COBALT_COOKIE_TYPE_ICU;
icu[i].func = func;
icu[i].arg = arg;
icu[i].ih_func = func;
icu[i].ih_arg = arg;
return &icu[i];
}
}
@ -122,11 +121,11 @@ void
icu_intr_disestablish(cookie)
void *cookie;
{
struct cobalt_intr *p = cookie;
struct cobalt_intrhand *ih = cookie;
if (p->cookie_type == COBALT_COOKIE_TYPE_ICU) {
p->func = NULL;
p->arg = NULL;
if (ih->cookie_type == COBALT_COOKIE_TYPE_ICU) {
ih->ih_func = NULL;
ih->ih_arg = NULL;
}
}
@ -137,10 +136,10 @@ icu_intr(arg)
int i;
for (i = 0; i < IO_ICUSIZE; i++) {
if (icu[i].func == NULL)
if (icu[i].ih_func == NULL)
return 0;
(*icu[i].func)(icu[i].arg);
(*icu[i].ih_func)(icu[i].ih_arg);
}
return 0;

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@ -1,4 +1,4 @@
/* $NetBSD: pciide_machdep.c,v 1.4 2003/07/15 01:29:23 lukem Exp $ */
/* $NetBSD: pciide_machdep.c,v 1.5 2003/09/12 17:55:54 tsutsui Exp $ */
/*
* Copyright (c) 2000 Soren S. Jorvang. All rights reserved.
@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: pciide_machdep.c,v 1.4 2003/07/15 01:29:23 lukem Exp $");
__KERNEL_RCSID(0, "$NetBSD: pciide_machdep.c,v 1.5 2003/09/12 17:55:54 tsutsui Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -37,7 +37,7 @@ __KERNEL_RCSID(0, "$NetBSD: pciide_machdep.c,v 1.4 2003/07/15 01:29:23 lukem Exp
#include <dev/pci/pciidereg.h>
#include <dev/pci/pciidevar.h>
#include <machine/intr_machdep.h>
#include <machine/intr.h>
void *
pciide_machdep_compat_intr_establish(dev, pa, chan, func, arg)